~
BEGIN
outf: IO.STREAM;
lineCount : CARD;
nr:INT = 7; --number of colums in the right side of the line
nl:INT = 7; --number of colums in the left side of the line
NbRight : TYPE = [0..nr);
NbLeft : TYPE = [0..nl);
RightLine: TYPE = ARRAY NbRight OF Rope.ROPE;
LeftLine: TYPE = ARRAY NbLeft OF Rope.ROPE;
rl: RightLine;
ll: LeftLine;
comment: Rope.ROPE;
Special variables of the Debug-Bus
Signal : TYPE = {T,F,X};
nDSerialOut,MDSerialIn,MDExecute,MDAddress : Signal;
MDShiftCK,MnFreeze,MnDReset : Signal;
MDSerialOut,nDSerialIn,nDExecute,nDAddress : Signal;
nDShiftClock,DFreeze,DReset : Signal;
Init:
PROC []
RETURNS [] ~ {
nDSerialOut ← F;
MDSerialIn ← F;
MDExecute ← F;
MDAddress ← F;
MDShiftCK ← F;
MnFreeze ← F;
MnDReset ← F;
MDSerialOut ← X;
nDSerialIn ← X;
nDExecute ← X;
nDAddress ← X;
nDShiftClock ← X;
DFreeze ← X;
DReset ← X;
};
RopeFromSignal:
PROC [s: Signal]
RETURNS [r: Rope.
ROPE] ~ {
Convert a signal {F,T,X} into the corresponding Rope {0,1,X}
SELECT s
FROM
F => r ← "0";
T => r ← "1";
ENDCASE => r ← "X";
};
Inv:
PROC [s: Signal]
RETURNS [t: Signal] ~ {
t gets the invert of s
SELECT s
FROM
F => t ← T;
T => t ← F;
ENDCASE => t ← X;
};
MergeOut:
PROC []
RETURNS [] ~ {
This proc merge into two Rope Right and Left different elements of the line
and write the result in the output stream
column : INT;
r : Rope.ROPE;
r ← " ";
FOR column
IN [0..nl)
DO r ← Rope.Cat[r,ll[column]," "];
ENDLOOP;
r ← Rope.Cat[r," | "];
FOR column
IN [0..nr)
DO r ← Rope.Cat[r,rl[column]," "];
ENDLOOP;
outf.PutF["%g -- %g %g \n",IO.rope[r],IO.rope[Convert.RopeFromInt[lineCount]],IO.rope[comment]];
comment ← ""
};
Send:
PROC []
RETURNS [] ~ {
This Proc convert the variables into ropes rl[i] & ll[i] for generating the line
then call MergeOut for writing the line
nDSerialIn ← Inv[MDSerialIn];
nDExecute ← Inv[MDExecute];
nDAddress ← Inv[MDAddress];
nDShiftClock ← Inv[MDShiftCK];
DFreeze ← Inv[MnFreeze];
DReset ← Inv[MnDReset];
ll[0] ← RopeFromSignal[nDSerialOut];
ll[1] ← RopeFromSignal[MDSerialIn];
ll[2] ← RopeFromSignal[MDExecute];
ll[3] ← RopeFromSignal[MDAddress];
ll[4] ← RopeFromSignal[MDShiftCK];
ll[5] ← RopeFromSignal[MnFreeze];
ll[6] ← RopeFromSignal[MnDReset];
rl[0] ← RopeFromSignal[MDSerialOut];
rl[1] ← RopeFromSignal[nDSerialIn];
rl[2] ← RopeFromSignal[nDExecute];
rl[3] ← RopeFromSignal[nDAddress];
rl[4] ← RopeFromSignal[nDShiftClock];
rl[5] ← RopeFromSignal[DFreeze];
rl[6] ← RopeFromSignal[DReset];
MergeOut;
lineCount ← lineCount+ 1;
};
SendAddress:
PROC [address:
CARDINAL]
RETURNS [] ~ {
This Proc send an address on the DebugBus
adrs: CARDINAL ← address;
s: INT;
MDAddress ← T;
MDSerialOut ← X;
FOR s
IN [0..16)
DO
MDShiftCK ← F;
IF (BitOps.WShift[adrs,s-15] MOD 2) = 0 THEN MDSerialIn ← F
ELSE MDSerialIn ← T;
Send;
MDShiftCK ← T;
Send;
ENDLOOP;
MDAddress ← F;
MDShiftCK ← F;
Send;
};
ReadandCheck:
PROC [v:
CARD, c:
INT ← 16]
RETURNS [] ~ {
Reading of a path with c transitions of ShiftCK
s: INT;
value: CARD ← v;
MDAddress ← F;
MDShiftCK ← F;
IF (BitOps.WShift[value,1-c] MOD 2) = 0 THEN MDSerialOut ← F
ELSE MDSerialOut ← T;
Send;
FOR s
IN [1..c)
DO
MDShiftCK ← T;
IF (BitOps.WShift[value,s-c+1] MOD 2) = 0 THEN MDSerialOut ← F
ELSE MDSerialOut ← T;
Send;
MDShiftCK ← F;
Send;
ENDLOOP;
};
SendReset:
PROC []
RETURNS [] ~ {
This proc set the Reset line at active and remove it
MnDReset ← F;
Send;
MnDReset ← T;
Send;
};
AdDBus: PROC [bd,hyb,Int,ci,pth: CARDINAL 𡤀] RETURNS [ad: CARDINAL 𡤀] ~ {
Address in the DBus is :
<BoardNum:4><HybridNum:4><InterfaceNum:3><ChipNum:2><PathNum:3>
<ChipNum>=0 is for BIC
ad ← BitOps.WShift[bd,12]+BitOps.WShift[hyb,8];
ad ← ad+BitOps.WShift[Int,5]+BitOps.WShift[ci,3]+pth;
};
IdCte:
PROC [t,v:
CARDINAL]
RETURNS [id:
CARDINAL] ~ {
The structure of the Identificator is "0101 cccc ccrr rrrr"
cccccc is the Type, rrrrrr is the Version
id ← 5000H + BitOps.WShift[t,6] + v;
};
Start of the Program
Here the program start :
Create or Append the file
outf ← FS.StreamOpen["///Chip/BackLinkDBus2.oracle", $create];
outf.PutF["-- Test D-Bus for Oracle\n"];
outf.PutF[" \n"];
outf.PutF["-- Output :\n"];
outf.PutF["-- nDSerialOut: A, MDSerialIn: B, MDExecute: C, MDAddress: D, \n"];
outf.PutF["-- MDShiftCK: E,MnFreeze: F, MnDReset:G\n"];
outf.PutF["-- Input :\n"];
outf.PutF["-- MDSerialOut:M, nDSerialIn:N, nDExecute:O, nDAddress:P, \n"];
outf.PutF["-- nDShiftClock:Q, DFreeze:R,DReset:S,\n"];
outf.PutF[" \n"];
outf.PutF["-- A B C D E F G ~ M N O P Q R S \n"];
outf.PutF["\n"];
Start Generation :
lineCount← 0;
Init;
Send;
SendReset;
comment ← "Address of the Arbiter 0 ID path";
SendAddress[AdDBus[bd:0,hyb:0,Int:0,ci:0,pth:0]];
comment ← "ID of the Arbiter type:1, Version 5";
ReadandCheck[IdCte[t:1,v:5]];
comment ← "Address of the Arbiter 1 ID path";
SendAddress[AdDBus[bd:2,hyb:0,Int:0,ci:0,pth:0]];
comment ← "ID of the Arbiter type:1, Version 3";
ReadandCheck[IdCte[t:1,v:3]];
comment ← "Address of the BIC 0 ID path";
SendAddress[AdDBus[bd:0,hyb:1,Int:0,ci:0,pth:0]];
comment ← "ID of BIC type 2, Version 8";
ReadandCheck[IdCte[t:2,v:8]];
comment ← "Address of the BIC 1 ID path";
SendAddress[AdDBus[bd:0,hyb:1,Int:1,ci:0,pth:0]];
comment ← "ID of BIC type 2, Version 9";
ReadandCheck[IdCte[t:2,v:9]];
comment ← "Address of the BIC 2 ID path";
SendAddress[AdDBus[bd:0,hyb:1,Int:2,ci:0,pth:0]];
comment ← "ID of BIC type 2, Version 10";
ReadandCheck[IdCte[t:2,v:10]];
comment ← "Address of the BIC 3 ID path";
SendAddress[AdDBus[bd:0,hyb:1,Int:3,ci:0,pth:0]];
comment ← "ID of BIC type 2, Version 11";
ReadandCheck[IdCte[t:2,v:11]];
comment ← "Address of the BIC 4 ID path";
SendAddress[AdDBus[bd:0,hyb:1,Int:4,ci:0,pth:0]];
comment ← "ID of BIC type 2, Version 12";
ReadandCheck[IdCte[t:2,v:12]];
comment ← "Address of the BIC 5 ID path";
SendAddress[AdDBus[bd:0,hyb:1,Int:5,ci:0,pth:0]];
comment ← "ID of BIC type 2, Version 13";
ReadandCheck[IdCte[t:2,v:13]];
comment ← "Address of the BIC 6 ID path";
SendAddress[AdDBus[bd:0,hyb:1,Int:6,ci:0,pth:0]];
comment ← "ID of BIC type 2, Version 14";
ReadandCheck[IdCte[t:2,v:14]];
outf.PutF[". \n"]; -- end
outf.Close[];