3 2 1 ( 0 0 ) 0	|  ( ( x x x x ) ( x x x x ) ) x
3 2 1 ( 0 0 ) 0	|  ( ( x x x x ) ( x x x x ) ) x

3 2 1 ( 0 0 ) 1	|	( ( x 1 1 1 ) ( 1 0 0 0 ) ) 0
3 2 1 ( 0 1 ) 1	|	( ( x 0 1 1 ) ( 0 1 0 0 ) ) 1

3 2 1 ( 0 1 ) 0	|  ( ( x 0 1 1 ) ( 0 1 0 0 ) ) 1
3 2 1 ( 0 0 ) 0	|  ( ( x 0 1 1 ) ( 0 1 0 0 ) ) 1
 
3 2 1 ( 1 0 ) 1	|  ( ( x 1 0 1 ) ( 0 0 1 0 ) ) 2
3 2 1 ( 1 1 ) 1	|  ( ( x 1 1 0 ) ( 0 0 0 1 ) ) 3

3 2 1 ( 1 1 ) 0	|  ( ( x 1 1 0 ) ( 0 0 0 1 ) ) 3
3 2 1 ( 1 0 ) 0	|	( ( x 1 1 0 ) ( 0 0 0 1 ) ) 3

3 2 1 ( 1 0 ) 1	|	( ( x 1 0 1 ) ( 0 0 1 0 ) ) 2
3 2 1 ( 1 0 ) 1	|  ( ( x 1 0 1 ) ( 0 0 1 0 ) ) 2

3 2 1 ( 1 0 ) 0	|	( ( x 1 0 1 ) ( 0 0 1 0 ) ) 2
3 2 1 ( 0 0 ) 1	|	( ( x 1 1 1 ) ( 1 0 0 0 ) ) 0

3 2 1 ( 0 0 ) 1 	|	( ( x 1 1 1 ) ( 1 0 0 0 ) ) 0
3 2 1 ( 0 1 ) 1 	|	( ( x 0 1 1 ) ( 0 1 0 0 ) ) 1

3 2 1 ( 0 1 ) 0 	|	( ( x 0 1 1 ) ( 0 1 0 0 ) ) 1
3 2 1 ( 1 1 ) 0 	|	( ( x 0 1 1 ) ( 0 1 0 0 ) ) 1

3 2 1 ( 1 0 ) 1 	|	( ( x 1 0 1 ) ( 0 0 1 0 ) ) 2
3 2 1 ( 1 0 ) 1 	|	( ( x 1 0 1 ) ( 0 0 1 0 ) ) 2

3 2 1 ( 1 0 ) 0	|	( ( x 1 0 1 ) ( 0 0 1 0 ) ) 2
A B C ( 0 0 ) 0 	|	( ( x 1 0 1 ) ( 0 0 1 0 ) ) B

A B C ( 0 1 ) 1 	|	( ( x 0 1 1 ) ( 0 1 0 0 ) ) C
A B C ( 1 1 ) 1 	|	( ( x 1 1 0 ) ( 0 0 0 1 ) ) A

A B C ( 1 1 ) 0 	|	( ( x 1 1 0 ) ( 0 0 0 1 ) ) A
A B C ( 1 1 ) 0 	|	( ( x 1 1 0 ) ( 0 0 0 1 ) ) A

A B F ( 1 0 ) 1 	|	( ( x 1 0 1 ) ( 0 0 1 0 ) ) B
A B F ( 1 0 ) 1 	|	( ( x 1 0 1 ) ( 0 0 1 0 ) ) B

A F B ( 1 0 ) 0 	|	( ( x 1 0 1 ) ( 0 0 1 0 ) ) F
F B A ( 0 1 ) 0 	|	( ( x 1 0 1 ) ( 0 0 1 0 ) ) B

3 2 1 ( 0 0 ) 0 	|	( ( x 1 0 1 ) ( 0 0 1 0 ) ) 2
3 2 1 ( 0 0 ) 0 	|	( ( x 1 0 1 ) ( 0 0 1 0 ) ) 2

.



�����RSMux.oracle
Pradeep Sindhu September 22, 1987 3:31:34 am PDT
Paraminder Sahai July 5, 1987 4:03:05 pm PDT
TEST COMPLETED February 13, 1987 [PSS]
Checked again after putting together cache top level July 5, 1987 4:03:05 pm PDT


Note that clock supplied to circuit is half the speed of the oracle clock, so that one "cycle" corresponds to two lines in this file.

Old Signal Order is:
Victim LVM LRM (RSCmd) EnRamSel  | ((nDecodedCmd) (DecodedCmd) EnOut) MuxOut

New Signal Order is
Victim LVM LRM (RSCmd)  nEnRS  | ((nDecodedCmd) (DecodedCmd)) MuxOut
 

First, check that X's get flushed out naturally, and that the Cmd decoder works:
Next, check that the right values appear at the output for different inputs


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