SmallCacheBWdWtPipeImpl.mesa
Pradeep Sindhu April 26, 1988 12:50:06 pm PDT
Paraminder Sahai September 23, 1987 11:48:36 pm PDT
DIRECTORY
Core, CoreClasses, CoreCreate, CoreFlat, Ports, Rosemary, RosemaryUser, SmallCacheLogic, SCParms, Sisyph;
SmallCacheBWdWtPipeImpl: CEDAR PROGRAM
IMPORTS CoreClasses, CoreCreate, CoreFlat, Ports, Rosemary, SCParms, Sisyph
EXPORTS SmallCacheLogic
~ BEGIN OPEN SmallCacheLogic;
Constants and Type Defs
InternalState: TYPE = RECORD [
en: ARRAY [0..3] OF Level,
a, b, c: LevelSequence
];
State: TYPE = REF StateRec;
StateRec: TYPE = RECORD [
master: InternalState,
slave: InternalState
];
Signal Defs
EnBWdWtPipe, RplyData, D, Q, Clock: NAT;
Public Procs
BWdWtPipe : PUBLIC PROC [cts: CellTypeSpec, cx: Context] RETURNS [ct: CellType] = {
public: Wire ← CoreCreate.WireList[LIST[CoreCreate.Seq["RplyData", SCParms.numBitsPerWord], CoreCreate.Seq["D", SCParms.numBitsPerWord], CoreCreate.Seq["Q", SCParms.numBitsPerWord], "EnBWdWtPipe", "Clock"]];
SELECT cts FROM
Schematic => ct ← Sisyph.ES["BWdWtPipe.sch", cx];
Procedure => {
ct ← CoreClasses.CreateUnspecified[public: public];
[] ← Rosemary.BindCellType[cellType: ct, roseClassName: bWdWtPipeName];
[] ← CoreFlat.CellTypeCutLabels[ct, "Logic"];
Ports.InitPorts[ct, ls, none, "D"];
Ports.InitPorts[ct, l, none, "EnBWdWtPipe", "Clock"];
Ports.InitPorts[ct, ls, drive, "RplyData"];
Ports.InitPorts[ct, ls, drive, "Q"]
};
CoreFile => ERROR
ENDCASE => ERROR
};
Internal Procs
Init: Rosemary.InitProc = {
s: State;
IF oldStateAny=NIL
THEN {
s ← NEW [StateRec];
s.master.a ← NEW [LevelSequenceRec[SCParms.numBitsPerWord]];
s.master.b ← NEW [LevelSequenceRec[SCParms.numBitsPerWord]];
s.master.c ← NEW [LevelSequenceRec[SCParms.numBitsPerWord]];
s.slave.a ← NEW [LevelSequenceRec[SCParms.numBitsPerWord]];
s.slave.b ← NEW [LevelSequenceRec[SCParms.numBitsPerWord]];
s.slave.c ← NEW [LevelSequenceRec[SCParms.numBitsPerWord]];
}
ELSE s ← NARROW [oldStateAny, State];
FOR i : INT IN [0..3] DO
s.master.en[i] ← X;
s.slave.en[i] ← X;
ENDLOOP;
Ports.SetLS[s.master.a, X]; Ports.SetLS[s.master.b, X]; Ports.SetLS[s.master.c, X];
Ports.SetLS[s.slave.a, X]; Ports.SetLS[s.slave.b, X]; Ports.SetLS[s.slave.c, X];
[EnBWdWtPipe, RplyData, D, Q, Clock] ← Ports.PortIndexes[cellType.public, "EnBWdWtPipe", "RplyData", "D", "Q", "Clock"];
stateAny ← s;
};
Simple: Rosemary.EvalProc = {
s: State ← NARROW[stateAny];
IF NOT clockEval THEN SELECT p[Clock].l FROM
L => {
s.master.en[3] ← s.slave.en[2];
s.master.en[2] ← s.slave.en[1];
s.master.en[1] ← s.slave.en[0];
s.master.en[0] ← p[EnBWdWtPipe].l;
IF p[EnBWdWtPipe].l=H THEN Ports.CopyLS[p[D].ls, s.master.a];
IF s.slave.en[1]=H THEN Ports.CopyLS[s.slave.a, s.master.b];
IF s.slave.en[3]=H THEN Ports.CopyLS[s.slave.b, s.master.c];
};
H => {
FOR i: NAT IN [0..3] DO
s.slave.en[i] ← s.master.en[i]
ENDLOOP;
Ports.CopyLS[s.master.a, s.slave.a];
Ports.CopyLS[s.master.b, s.slave.b];
Ports.CopyLS[s.master.c, s.slave.c];
};
X => {
FOR i: NAT IN [0..3] DO
s.slave.en[i] ← s.master.en[i]
ENDLOOP;
Ports.SetLS[s.master.a, X]; Ports.SetLS[s.master.b, X]; Ports.SetLS[s.master.c, X];
Ports.SetLS[s.slave.a, X]; Ports.SetLS[s.slave.b, X]; Ports.SetLS[s.slave.c, X];
};
ENDCASE => ERROR;
Ports.CopyLS[s.slave.a, p[RplyData].ls];
Ports.CopyLS[s.slave.c, p[Q].ls];
};
bWdWtPipeName: ROPE = Rosemary.Register[roseClassName: "SmallCacheBWdWtPipe", init: Init, evalSimple: Simple, scheduleIfClockEval: TRUE];
END.