Dragon System Architecture
June 1988
1
DRAGON System Architecture
I Motivations
II The DynaBus
III VLSI Chip Set
IV Transfert of Research
I. Motivations
Foundations for building architectures for a wide range of document processing machines
· controllers : Network, Scanners...
· servers : Data base servers, Printers, Gateway
· workstations : mid, high & very high end
=> high data bandwidth & processing
Parallel processing architecture research
· Project started in 81
· Follows a first generation of shared memory
multiprocessor on conventional Bus.
Currently implemented in a Xerox product.
· new generation using more advanced concepts
& technology : VLSI, packaging
· Compatible with Operating systems like Mach
or SunOS phase3 & languages like Cedar, Ada
Dragon Technology
· Communications studies : VLSI BUS
[Artwork node; type 'Artwork on' to command tool]
· VLSI Chip Set
[Artwork node; type 'Artwork on' to command tool]
· Packaging
[Artwork node; type 'Artwork on' to command tool]
APPLICATIONS
Applications & markets
· High end parallel computer
· Desk-Top multiprocessor
· High end Workstations
· High end Printers servers
· File and Data-bases servers
· Add-in boards in standards platform
· Industrial control
· OEM multiprocessors
· Chips set & packaging
II. The DynaBus
Very simple model for the programmer of a multiprocessor
All processors think they shared a unique memory.
Transparent Caches near each processor avoid bottleneck.
Implementation : VLSI BUS
· Multi-level Busses
· Well fitted for VLSI 64 bits
· Multiprocessors
· Hardware data consistency
· Split-cycle for very high speed
· Support multi-Bank of memory
· Mathematical model and proof of coherence
· Bridges with industrial standards busses
· Extension to non busses communication
· Bandwidth from 200 MByte/sec to 1GByte/sec
III. VLSI Chips set
Only seven Chips for all the family
Standard Cell Chips, mid performance technology
· BIC : Bus interface Chip
· Arbiter : distributed arbiter
· Memory Controller : High performance with ECC
· IOB : Input-Output Bridge
· Display/Printer Chip : programmable
· Map Cache : for virtual memory
Full Custom Chip, high performance technology
·
Cache : connects the processor
IV Transfert of Research
Partnership
first with one or more Semiconductor companies :
National, AMD, Motorola, Cypress...
good chances because open architecture compatible with industrial standards : any microprocessor, any add-in boards & multi- operating system...
and with Equipment maker companies like :
SUN, ATT...
good chances because the performances