<> <> <> <> << This interface is associated to the emulation of the PBus of the Cache>> <<>> DIRECTORY Core, Ports, Rosemary; PBusConex: CEDAR DEFINITIONS ~ BEGIN CellType : TYPE = Core.CellType; Wire: TYPE = Core.Wire; PBusEmulState: TYPE = REF PBusEmulRec; PBusEmulRec: TYPE = RECORD[ PMode: Ports.Level, PByteSel: Ports.LevelSequence, PCmd : Ports.LevelSequence, PFaultCode: Ports.LevelSequence, PFault: Ports.Level, PReject: Ports.Level, PhB: Ports.Level, PhA: Ports.Level, PDataIn: Ports.LevelSequence, PDataOut: Ports.LevelSequence, PReschedule: Ports.Level, PReset: Ports.Level, CkIn: Ports.Level, PMODE: NAT, PBYTESEL: NAT, PCMD : NAT, PFAULTCODE: NAT, PFAULT: NAT, PREJECT: NAT, PHB: NAT, PHA: NAT, PDATA: NAT, PRESCHEDULE: NAT, PRESET: NAT, CKIN: NAT, numClockEdges: NAT, -- number of clock edges since beginning cycleCount: NAT, -- used for loops within procs prevClock: Ports.Level, cycle3ForRead: BOOL, -- used for shifting the sampling of data testProcList: LIST OF REF ANY _ NIL ]; PBusDef: PROC [] RETURNS [ct: CellType]; PBusInit: Rosemary.InitProc; PBusEval: Rosemary.EvalProc; END.