=
BEGIN
InterruptTestProc: RosemaryUser.TestProc = {
CycleInterruptLogic:
PROC = {
-- Construct Truth Table
Step: TYPE = [0..8);
XLevel: ARRAY Step OF Ports.Level ← [L, L, L, H, H, H, H, H];
YLevel: ARRAY Step OF Ports.Level ← [L, L, H, L, H, H, H, H];
--X.Y is an adder input with sequence [L, L, L, L, H, H, H, H]
SILevel: ARRAY Step OF Ports.Level ← [L, L, H, H, L, L, H, H]; --other adder input
CILevel: ARRAY Step OF Ports.Level ← [L, H, L, H, L, H, L, H];
SOLevel: ARRAY Step OF Ports.Level ← [L, H, H, L, H, L, L, H];
COLevel: ARRAY Step OF Ports.Level ← [L, L, L, H, L, H, H, H];
FOR step: Step
IN Step
DO
p[XBit].l ← XLevel[step];
p[YBit].l ← YLevel[step];
p[ProdIn].l ← SILevel[step];
p[CarryIn].l ← CILevel[step];
p[ProdOut].l ← SOLevel[step];
p[CarryOut].l ← COLevel[step];
Eval[];
ENDLOOP;
}; --CycleInterruptLogic
p[XBit].l ← p[YBit].l ← p[ProdIn].l ← p[ProdOut].l ← p[CarryIn].l ← p[CarryOut].l ← L;
CycleInterruptLogic[];
}; --InterruptTestProc
viewerName: Rope.ROPE = "Interrupt Request Logic";
testee: Rope.ROPE = "IntrptRequestLatch.sch";
designName: Rope.ROPE = "///Users/gunther.pa/chips/IOPInterruptController";
ct: Core.CellType ← Sisyph.ExtractSchematicByName[testee, Sisyph.Create[PW.OpenDesign[designName]]];
Vdd: NAT = CoreOps.GetWireIndex[ct.public, "Vdd"];
Gnd: NAT = CoreOps.GetWireIndex[ct.public, "Gnd"];
XBit: NAT = CoreOps.GetWireIndex[ct.public, "XBit"];
YBit: NAT = CoreOps.GetWireIndex[ct.public, "YBit"];
CarryIn: NAT = CoreOps.GetWireIndex[ct.public, "CarryIn"];
ProdIn: NAT = CoreOps.GetWireIndex[ct.public, "ProdIn"];
ProdOut: NAT = CoreOps.GetWireIndex[ct.public, "ProdOut"];
CarryOut: NAT = CoreOps.GetWireIndex[ct.public, "CarryOut"];
ProdFeedthru: NAT = CoreOps.GetWireIndex[ct.public, "ProdFeedthru"];
[] ← Rosemary.SetFixedWire[ct.public[Vdd], H];
[] ← Rosemary.SetFixedWire[ct.public[Gnd], L];
FOR i:
NAT
IN [0..ct.public.size)
DO
[] ← Ports.InitPort[wire: ct.public[i]];
ENDLOOP;
[] ← Ports.InitTesterDrive[wire: ct.public[XBit], initDrive: force];
[] ← Ports.InitTesterDrive[wire: ct.public[YBit], initDrive: force];
[] ← Ports.InitTesterDrive[wire: ct.public[CarryIn], initDrive: force];
[] ← Ports.InitTesterDrive[wire: ct.public[ProdIn], initDrive: force];
[] ← Ports.InitTesterDrive[wire: ct.public[ProdOut], initDrive: expect];
[] ← Ports.InitTesterDrive[wire: ct.public[CarryOut], initDrive: expect];
Simulation
[] ← RosemaryUser.TestProcedureViewer[cellType: ct,
testButtons: LIST["Interrupt Request Test"],
name: viewerName,
displayWires: LIST[NEW[CoreFlat.FlatWireRec ← [path: CoreFlat.NullPath, wire: ct.public]]],
flatten: TRUE
];