DIRECTORY DragonOpsIO; SloBridgeOps: CEDAR DEFINITIONS IMPORTS DragonOpsIO ~ BEGIN DevID: TYPE ~ DragonOpsIO.DevID; IOAddress: TYPE ~ DragonOpsIO.IOAddress; WORD: TYPE ~ DragonOpsIO.WORD; DevNum: TYPE ~ [0 .. 16); -- Identifies uniquely a SloBridge ITAction: TYPE ~ MACHINE DEPENDENT RECORD [ -- Action taken to signal an interrupt unused(0:0..15): [0..65535], -- 16 unused bits reason(0:16..20): [0..32), -- bit number of reason to be raised in cache broadcast(0:21..21): BOOLEAN, -- all caches signalled if TRUE cache(0:22..31): DevID]; -- cache ID to be signalled if broadcast is FALSE ReadInterruptStatus: PROC [n: DevNum] RETURNS [itStatus: WORD] ~ INLINE { itStatus _ DragonOpsIO.IORead[Addr[n, itStatusReg]]; }; WriteInterruptMask: PROC [n: DevNum, itMask: WORD] ~ INLINE { DragonOpsIO.IOWrite[Addr[n, itMaskReg], itMask]; }; WriteInterruptMaskBroadcast: PROC [itMask: WORD] ~ INLINE { DragonOpsIO.BIOWrite[BroadcastAddr[itMaskReg], itMask]; }; ReadInterruptMask: PROC [n: DevNum] RETURNS [itMask: WORD] ~ INLINE { itMask _ DragonOpsIO.IORead[Addr[n, itMaskReg]]; }; WriteInterruptAction: PROC [n: DevNum, itAction: ITAction] ~ INLINE { DragonOpsIO.IOWrite[Addr[n, itActionReg], LOOPHOLE[itAction]]; }; WriteInterruptActionBroadcast: PROC [itAction: ITAction] ~ INLINE { DragonOpsIO.BIOWrite[BroadcastAddr[itActionReg], LOOPHOLE[itAction]]; }; ReadInterruptAction: PROC [n: DevNum] RETURNS [itAction: ITAction] ~ INLINE { itAction _ LOOPHOLE[DragonOpsIO.IORead[Addr[n, itActionReg]]]; }; Offset: TYPE ~ [0 .. 256); -- Offset of a register inside the cache itStatusReg: Offset = 0; -- offset to InterruptStatus - May still change itMaskReg: Offset = 1; -- offset to InterruptMask - May still change itActionReg: Offset = 2; -- offset to InterruptAction - May still change SloBridgeBase: WORD = 0; -- Some value to be defined later Addr: PROC [n: DevNum, offset: Offset] RETURNS [addr: IOAddress] ~ INLINE { dev: WORD _ n; addr.v _ SloBridgeBase+1024*dev+offset; }; BroadcastAddr: PROC [offset: Offset] RETURNS [addr: IOAddress] ~ INLINE { addr.v _ SloBridgeBase+offset; }; END. SloBridgeOps.mesa Copyright c 1986 by Xerox Corporation. All rights reserved. Frailong, October 13, 1986 4:22:37 pm PDT Description of SloBridge operations from a Dragon processor. Principles Each SloBridge has a number of I/O registers that control either its internal functions or some extension of processor functions. SloBridge I/O registers are usually accessible from a processor in two different ways: - Directed access: any cache may be accessed by specifying its DevNum (equal to it's DynaBus ID) - Broadcast access: a processor may write a given register in all caches simultaneously I/O operations reading a register are thus available in one flavors (directed), whereas writes are available in two flavors (directed and broadcast). All functions in this package are actually inline IO instructions. Interrupt management The SloBridge handles interrupt management for its internal peripherals and for devices on the SloBus. The interrupt management hardware in the SloBridge consists of three registers, InterruptStatus, InterruptMask and InterruptAction, as well as some related hardware. InterruptStatus is read-only. Its contents reflect the current status (after synchronization) of the physical interrupt lines. An interrupt transaction is signalled on the DynaBus whenever a new interrupt is raised or when a previously masked interrupt becomes visible through mask manipulation. InterruptMask is used to mask individual physical interrupt lines. InterruptAction specifies what cache(s) (either a single one or all) should be notified of new interrupts and what reason should be set for this SloBridge. Interrupt status management Return the current value of InterruptStatus for the specified SloBridge. itStatus _ InterruptStatus Interrupt mask management Write InterruptMask for the specified SloBridge. If new interrupts become visible, an interrupt transaction will be sent to the concerned caches. signalInterrupt _ (itMask AND ~InterruptMask AND InterruptStatus)#0 InterruptMask _ itMask Write InterruptMask for all SloBridges. Each SloBridge in which a new interrupt line becomes visible will send an interrupt transaction will be sent to the concerned caches. signalInterrupt _ (itMask AND ~InterruptMask AND InterruptStatus)#0 InterruptStatus _ itMask Return the current value of InterruptMask for the specified SloBridge. itMask _ InterruptMask Interrupt action management Writes InterruptAction for the specified SloBridge. InterruptAction _ itAction Writes InterruptAction for all SloBridges. InterruptAction _ itAction Return the current value of InterruptAction for the specified SloBridge. itAction _ InterruptAction Private information This information is strictly private, and figures in this interface only because INLINEs should be inthe interface if you want them to have any effect... Κ€˜codešœ™Kšœ Οmœ1™K˜Kšœ3™3Kšœ™K™K™—šŸœžœžœ˜CKšœ1žœ ˜EK˜Kšœ*™*Kšœ™K™K™—šŸœžœ žœžœ˜MKšœ žœ+˜>K˜KšœH™HKšœ™———™K™™K™Kšœžœ (˜CK˜Kšœ /˜HKšœ -˜DKšœ /˜HK˜KšŸ œžœ !˜:K˜šŸœžœžœžœ˜KKšœžœ˜Kšœ'˜'K˜K˜—šŸ œžœžœžœ˜IKšœ˜K˜K˜——K˜Kšžœ˜—…—0Μ