~
BEGIN
outf: IO.STREAM;
lineCount : CARD;
nr:INT = 1; --number of colums in the right side of the line
nl:INT = 6; --number of colums in the left side of the line
NbRight : TYPE = [0..nr);
NbLeft : TYPE = [0..nl);
RightLine: TYPE = ARRAY NbRight OF Rope.ROPE;
LeftLine: TYPE = ARRAY NbLeft OF Rope.ROPE;
rl: RightLine;
ll: LeftLine;
comment: Rope.ROPE;
Special variables of the Debug-Bus
Signal : TYPE = {T,F,X};
DSerialOut,DSerialIn,DExecute,DAddress : Signal;
DShiftCK,nFreeze,nDReset: Signal;
Init:
PROC []
RETURNS [] ~ {
DSerialIn ← F;
DExecute ← F;
DAddress ← F;
DShiftCK ← F;
nFreeze ← T;
nDReset ← F;
DSerialOut ← X;
};
RopeFromSignal:
PROC [s: Signal]
RETURNS [r: Rope.
ROPE] ~ {
Convert a signal {F,T,X} into the corresponding Rope {0,1,X}
SELECT s
FROM
F => r ← "0";
T => r ← "1";
ENDCASE => r ← "X";
};
Inv:
PROC [s: Signal]
RETURNS [t: Signal] ~ {
t gets the invert of s
SELECT s
FROM
F => t ← T;
T => t ← F;
ENDCASE => t ← X;
};
MergeOut:
PROC []
RETURNS [] ~ {
This proc merge into two Rope Right and Left different elements of the line
and write the result in the output stream
column : INT;
r : Rope.ROPE;
r ← " ";
FOR column
IN [0..nl)
DO r ← Rope.Cat[r,ll[column]," "];
ENDLOOP;
r ← Rope.Cat[r," | "];
FOR column
IN [0..nr)
DO r ← Rope.Cat[r,rl[column]," "];
ENDLOOP;
outf.PutF["%g -- %g %g \n",IO.rope[r],IO.rope[Convert.RopeFromInt[lineCount]],IO.rope[comment]];
comment ← ""
};
Send:
PROC []
RETURNS [] ~ {
This Proc convert the variables into ropes rl[i] & ll[i] for generating the line
then call MergeOut for writing the line
ll[0] ← RopeFromSignal[DSerialIn];
ll[1] ← RopeFromSignal[nDReset];
ll[2] ← RopeFromSignal[nFreeze];
ll[3] ← RopeFromSignal[DExecute];
ll[4] ← RopeFromSignal[DAddress];
ll[5] ← RopeFromSignal[DShiftCK];
rl[0] ← RopeFromSignal[DSerialOut];
MergeOut;
lineCount ← lineCount+ 1;
};
SendAddress:
PROC [address:
CARDINAL]
RETURNS [] ~ {
This Proc send an address on the DebugBus
adrs: CARDINAL ← address;
s: INT;
DAddress ← T;
DSerialOut ← X;
FOR s
IN [0..16)
DO
DShiftCK ← F;
IF (BitOps.WShift[adrs,s-15] MOD 2) = 0 THEN DSerialIn ← F
ELSE DSerialIn ← T;
Send;
DShiftCK ← T;
Send;
ENDLOOP;
DAddress ← F;
DShiftCK ← F;
Send;
};
SendData:
PROC [data:
LONG
CARDINAL, c:
INT ← 16]
RETURNS [] ~ {
This proc send a data on the Debug Bus
FOR s:
INT
DECREASING IN [0..c)
DO
DShiftCK ← F;
IF (BitOps.DShift[data,-s] MOD 2) = 0 THEN DSerialIn ← F
ELSE DSerialIn ← T;
Send;
DShiftCK ← T;
Send;
ENDLOOP;
};
ReadandCheck:
PROC [v:
CARD, c:
INT ← 16]
RETURNS [] ~ {
Reading of a path with c transitions of ShiftCK
DAddress ← F;
DShiftCK ← F;
IF (BitOps.DShift[v,1-c] MOD 2) = 0 THEN DSerialOut ← F
ELSE DSerialOut ← T;
Send;
FOR s:
INT
IN [1..c)
DO
DShiftCK ← T;
IF (BitOps.DShift[v,s-c+1] MOD 2) = 0 THEN DSerialOut ← F
ELSE DSerialOut ← T;
Send;
DShiftCK ← F;
Send;
ENDLOOP;
DShiftCK ← T;
DSerialOut ← X;
Send;
DShiftCK ← F;
Send;
};
SendReset:
PROC []
RETURNS [] ~ {
This proc set the Reset SStop lines at active, then remove the SStop line
and finally remove the Reset.
nDReset ← F;
FOR i:
NAT
IN [0..10)
DO
Send;
ENDLOOP;
nDReset ← T;
};
SendShiftClock:
PROC []
RETURNS [] ~ {
This proc send 4 pulse of ShiftClock to allow the initialisation of DBus constant
FOR i:
NAT
IN [0..4)
DO
DShiftCK ← T;
Send;
DShiftCK ← F;
Send;
ENDLOOP;
};
AdDBus: PROC [bd,hyb,Int,ci,pth: CARDINAL 𡤀] RETURNS [ad: CARDINAL 𡤀] ~ {
Address in the DBus is :
<BoardNum:4><HybridNum:4><InterfaceNum:3><ChipNum:2><PathNum:3>
<ChipNum>=0 is for BIC
ad ← BitOps.WShift[bd,12]+BitOps.WShift[hyb,8];
ad ← ad+BitOps.WShift[Int,5]+BitOps.WShift[ci,3]+pth;
};
IdCte:
PROC [t,v:
CARDINAL]
RETURNS [id:
CARDINAL] ~ {
The structure of the Identificator is "0101 cccc ccrr rrrr"
cccccc is the Type, rrrrrr is the Version
id ← 5000H + BitOps.WShift[t,6] + v;
};
Start of the Program
Here the program start :
Create or Append the file
outf ← FS.StreamOpen["DynaBusInterfaceDBus2.oracle", $create];
outf.PutF["-- Test D-Bus for DynaBusInterface\n"];
outf.PutF[" \n"];
outf.PutF["-- Output :\n"];
outf.PutF["--DSerialIn: A, nDReset: B, nFreeze: C, DExecute: D, \n"];
outf.PutF["-- DAddress: E,nDShiftCK: F \n"];
outf.PutF["-- Input :\n"];
outf.PutF["-- DSerialOut:M \n"];
outf.PutF[" \n"];
outf.PutF["-- A B C D E F ~ M \n"];
outf.PutF["\n"];
Start Generation :
lineCount← 0;
Init;
Send;
SendShiftClock; -- for autoload Dbus constant
SendReset;
comment ← "Address of the DynaBusInterface 0 ID path";
SendAddress[AdDBus[bd:0,hyb:0,Int:0,ci:0,pth:0]];
comment ← "ID of the DynaBusInterface type:0B, Version 1";
ReadandCheck[IdCte[t:11,v:1]];
comment ← "Address of the DynaBusInterface path nb 1";
SendAddress[AdDBus[bd:0,hyb:0,Int:0,ci:0,pth:1]];
ReadandCheck[0,4];
ReadandCheck[0,32];
ReadandCheck[0,32];
ReadandCheck[0,4];
ReadandCheck[0,32];
ReadandCheck[11111111H,32];
ReadandCheck[0,4];
ReadandCheck[0,32];
ReadandCheck[22222222H,32];
ReadandCheck[0,4];
ReadandCheck[0,32];
ReadandCheck[33333333H,32];
ReadandCheck[0,4];
ReadandCheck[0,32];
ReadandCheck[44444444H,32];
comment ← "Address of the DynaBusInterface path nb 1";
SendAddress[AdDBus[bd:0,hyb:0,Int:0,ci:0,pth:1]];
SendData[0,4];
SendData[01234567H,32];
SendData[89ABCDEFH,32];
SendData[1,4];
SendData[12345678H,32];
SendData[9ABCDEF0H,32];
SendData[2,4];
SendData[23456789H,32];
SendData[0BCDEF01H,32];
SendData[3,4];
SendData[3456789AH,32];
SendData[0CDEF012H,32];
SendData[4,4];
SendData[456789ABH,32];
SendData[0DEF0123H,32];
comment ← "Address of the DynaBusInterface path nb 1";
SendAddress[AdDBus[bd:0,hyb:0,Int:0,ci:0,pth:1]];
ReadandCheck[0,4];
ReadandCheck[01234567H,32];
ReadandCheck[89ABCDEFH,32];
ReadandCheck[1,4];
ReadandCheck[12345678H,32];
ReadandCheck[9ABCDEF0H,32];
ReadandCheck[2,4];
ReadandCheck[23456789H,32];
ReadandCheck[0BCDEF01H,32];
ReadandCheck[3,4];
ReadandCheck[3456789AH,32];
ReadandCheck[0CDEF012H,32];
ReadandCheck[4,4];
ReadandCheck[456789ABH,32];
ReadandCheck[0DEF0123H,32];
FOR sometime:
INT
IN [0..200)
DO
Send;
ENDLOOP;
outf.PutF[". \n"]; -- end
outf.Close[];