Dragon CMOS Advisory Comments
Jeff Hoel  June 4, 1987
Introduction
The advisory comments in this document are indended as a supplement to the VTI design rules, which we have adopted as the rules for designing Dragon chips (except for EU and IFU). Following only the VTI rules should be good enough to assure that a chip can be fabricated at VTI using any process which the rules explicitly support. Advisory comments a) clarify the official VTI rules, b) predict likely changes to VTI rules, c) make it more likely that a design can be fabricated using another process, either at VTI or elsewhere, etc. Designers are free to observe advisory comments or not. (But designers are required to track all changes to VTI's design rules as they occur.)
Advisory Comments
Angle Transistors: We recommend that designs not use transistors with 90-degree bends in their gates. It is difficult to predict the effective width of these transistors, due to current crowding effects. Moreover, higher electric fields at the corners might cause problems with hot electrons or punchthrough, particularly for sub-2-micron geometries. Although the VTI design rules do not explicitly forbid these transistors, VTI says they'd rather not see them for the 1.6m process.
Metal Coverage: We recommend that designers strive for an as-drawn metal1 coverage of 35% ± 15% and an as-drawn metal2 coverage of 40% ± 15%. VTI has indicated that they have a processing problem with metal etching whenever the percent metal coverage of different dice on the same wafer varies a lot, especially if the metal coverage drops below 20%. (Also, if convenient, consider making metal traces non-minimum width in areas of sparse metal coverage and making spaces non-minimum width in areas of dense metal coverage.)
Vias on Poly: We recommend that designers not put vias on poly. VTI's 3l surround rule 6.7.7. is so large that it would rarely be advantageous to use a via on poly to achieve optimal packing density. VTI agrees, and has discouraged their use. NCR, a possible second source candidate, forbids them.
Atomic Objects for Cuts and Vias: We recommend that designers use the existing ChipNDale atomic objects for cuts and vias of non-minimum size, even though they have larger surrounds than are required by the VTI design rules. Also, we recommend using the existing ChipNDale atomic objects for split cuts, even though they can be only one size. The reason is to avoid introducing extra complexity.
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