DragonCatalog.tioga
bland.pa September 22, 1987 10:08:29 am PDT
DRAGON PACKAGE CATALOG
CEDAR 7.0 — FOR INTERNAL XEROX USE ONLY
Dragon Package Catalog
© Copyright 1987 by Xerox Corporation. All rights reserved.
Abstract: This catalog is a list of interesting packages and tools. The catalog is automatically created from the collection of maintainer-supplied entries.
XEROX   Xerox Corporation
    Palo Alto Research Center
    3333 Coyote Hill Road
    Palo Alto, California 94304

For Internal Xerox Use Only
Catalog Components
DBus: [Indigo]<Dragon7.0>Top>DBus.df
Documentation: DBusDoc.tioga
Keywords: DBus, LSSD, DynaBus, IOBridge, Bootstrap, Debug
Abstract: The DBus is used both to initialize a Dragon machine and to debug it. This document is intended to be used both as a convenient source for information about the DBus and as a reference manual for bus specifications.
Acknowledgements to Rick Barth, Jim Gasbarro, Ed McCreight and others who designed the first DBus and discussed on the new version.
Documentation: [Indigo]<Dragon7.0>Top>Documentation.df
Documentation: DragonDoc.form, DragonCatalog.tioga, DocumentNumbers.tioga, AUDoc.tioga, DisplayControllerStrawMan.tioga, DragonDiagnostics.tioga, DragonFP.tioga, DragonMesaChanges.tioga, DragonOpSum.tioga, DragonOverview.tioga, DragonPackaging.tioga, DragOps.tioga, EDMBusCompatibility.tioga, IFUDoc.tioga, InstrExec.tioga, MBusAnalysis.tioga, MemoryController.tioga, ModeMechanism.tioga, OpcodeChanges.tioga, RRChange.tioga, CacheSpecs.tioga, NewCacheNotes.tioga, ProcessorCacheSpecs.tioga, DesignRuleSummaryC.tioga, DragonCMOSDesignRulesC.tioga, HardwareNotes.tioga, IMSTesterNotes.tioga, WorkstationIOP.tioga, PackageNotes.tioga, PackagingSpecs.tioga, InstructionSet.tioga, InstructionSetSum.tioga, Memory.tioga, SingleProcOp.tioga, Timing.tioga, Traps.tioga, OnePageInstructionSetSummary.tioga
Dragoman: [Indigo]<Dragon7.0>Top>Dragoman.df
Documentation: DragomanMemory.tioga, DragomanWaterlilyFile1.tioga, DragomanWaterlilyFile2.tioga, CacheStats.tioga
DynaBus: [Indigo]<Dragon7.0>Top>DynaBus.df
Documentation: DynaBusLogicalSpecifications.tioga, DynaBusConsistencyAlgorithm.tioga, DynaBusGuidelines.tioga
IFUPLA: [Indigo]<Dragon7.0>Top>IFUPLA.df
IFUTest: [Indigo]<Dragon7.0>Top>IFUTest.df
Documentation: IFUMintNotes.tioga
MemoryController: [Indigo]<Dragon7.0>Top>MemoryController.df
Documentation: MemoryControllerSpec.tioga
PLAOps: [Indigo]<Dragon7.0>Top>PLAOps.df
Commands: PLAOps, PLAOpsCompress
REFBit: [Indigo]<Dragon7.0>Top>REFBit.df
Created by: Don Curry
Maintained by: Don Curry <Curry.pa>
Documentation: REFBitDoc.tioga
Keywords: REF BitArray
Commands: REFBit, REFBitFormat
Abstract: When designing and simulating hardware, it's sometimes useful to deal with instances of arbitray Cedar TYPEs as if they were arrays of bits.
SmallCache: [Indigo]<Dragon7.0>Top>SmallCache.df
Documentation: SCBmCode.tioga, SCDesignDecisions.tioga, SCDataPath.dale, SCTiming.tioga, SCAlgorithm.tioga, SCPInterface.tioga, SCPInterface.dale, SCProblemLog.tioga, SCActionItems.tioga, SCStatus3Mar87.tioga, SCTransistorCount.tioga, SCCtlSignals.tioga, SCDesignReview.dale, SCDesignReview.tioga, OldSCDesignDecisions.tioga, OldCacheSpecs.tioga, OldSCTiming.tioga
UncountedAssignHack: [Indigo]<Dragon7.0>Top>UncountedAssignHack.df
Command Index
PLAOps: PLAOps
PLAOpsCompress: PLAOps
REFBit: REFBit
REFBitFormat: REFBit
Keyword Index
Bootstrap: DBus
DBus: DBus
Debug: DBus
DynaBus: DBus
IOBridge: DBus
LSSD: DBus
REF BitArray: REFBit