CRIOImpl:
CEDAR
PROGRAM
IMPORTS XBus, Basics
EXPORTS CRIO
= BEGIN
Multibus Board Addresses
baseAddress: LONG POINTER = LOOPHOLE[LONG[0C000H]];
control: NAT = 2000H;
readDataHigh: NAT = 1000H;
readDataLow: NAT = 0000H;
statusReg: NAT = 0H;
writeDataHighReg: NAT = 2H;
Status Register Bit Values
TestEnb: CARDINAL = 1;
AccessRefreshEnb: CARDINAL = 2;
EmergencyRefreshEnb: CARDINAL = 4;
Globals
big: BOOLEAN;
status: CARDINAL;
writeDataHigh: CARDINAL;
Init:
PUBLIC PROC [bigChip:
BOOLEAN] ~ {
big ← bigChip;
status ← 0;
XBus.IOWrite[baseAddress+control+statusReg, status];
writeDataHigh ← 0;
XBus.IOWrite[baseAddress+control+writeDataHighReg, writeDataHigh];
};
Test:
PUBLIC PROC [on:
BOOLEAN] ~ {
IF on
THEN status ← Basics.
BITOR[status, TestEnb]
ELSE status ← Basics.BITAND[status, Basics.BITNOT[TestEnb]];
XBus.IOWrite[baseAddress+control+statusReg, status];
};
AccessRefresh:
PUBLIC PROC [on:
BOOLEAN] ~ {
IF on
THEN status ← Basics.
BITOR[status, AccessRefreshEnb]
ELSE status ← Basics.BITAND[status, Basics.BITNOT[AccessRefreshEnb]];
XBus.IOWrite[baseAddress+control+statusReg, status];
};
EmergencyRefresh:
PUBLIC PROC [on:
BOOLEAN] ~ {
IF on
THEN status ← Basics.
BITOR[status, EmergencyRefreshEnb]
ELSE status ← Basics.BITAND[status, Basics.BITNOT[EmergencyRefreshEnb]];
XBus.IOWrite[baseAddress+control+statusReg, status];
};
CRRead:
PUBLIC PROC [address: [0..2048)]
RETURNS [data:
LONG
CARDINAL] ~ {
wordAddress: CARDINAL ← Basics.BITAND[address*2, 0FFFEH];
data ← XBus.IORead[baseAddress+readDataLow+wordAddress];
IF big
THEN data ← data + (XBus.IORead[baseAddress+readDataHigh+wordAddress]*65536)
ELSE data ← Basics.BITAND[data, 0FFFEH];
RETURN[data];
};
CRWrite:
PUBLIC PROC [address: [0..2048), data:
LONG
CARDINAL] ~ {
wordAddress: CARDINAL ← Basics.BITAND[address*2, 0FFFEH];
IF big
AND (Basics.HighHalf[data] # writeDataHigh)
THEN
XBus.IOWrite[baseAddress+control+writeDataHighReg, writeDataHigh ← Basics.HighHalf[data]];
XBus.IOWrite[baseAddress+wordAddress, Basics.LowHalf[data]];
};
END.