Statistics on -- you always want to know how long it took ColorDisplayModeOff -- saves a lot of cycles Install DAUser SCCmosB PadFrame _ CedarProcess.SetPriority[background] _ &design _ PW.OpenDesign["ClockGen.dale"] -- read the CD design _ &cx _ Sisyph.Create[&design, NIL] -- this creates a context for Sysiph _ &ct _ Sisyph.ES["ClockGen.sch", &cx] -- this extracts the top-level schematic _ &ob _ PWCore.Layout[&ct] _ PW.Draw[&ob] _ PWCore.Store[&ct, TRUE] Install Static _ Static.CountLeafConnections[&ct, Static.CheckCount, CoreFlat.CreateCutSet[labels: LIST["Logic"]]] Install PWCoreLichen _ PWCoreLichen.SetAutomorphismHack[TRUE] _ PWCoreLichen.CompareForTheRestOfUs[&ct, &design, 0.8] Install ConnectivityChecker CheckConnectivity ClockGenLayout.dale ϊClockGenCountDown.cm Copyright Σ 1987 by Xerox Corporation. All rights reserved. Louis Monier June 22, 1988 7:26:24 pm PDT -- Start everything and read in the source design -- Extract cell -- Generate Layout -- Apply Static to find unconnected wires -- errors can be found found in the terminal -- Compare layout and schematics -- Check the connectivity -- signals all disconnected internals; returns a list of disconnected publics -- DRC ClockGenLayout.dale (we need a programming interface) Κ6˜™Icode™