<> <> <> <> DIRECTORY Core, Ports, Rope; BIC: CEDAR DEFINITIONS = BEGIN <> <> <> public: Core.Wire; BICPorts: TYPE = REF BICPortsRec; BICPortsRec: TYPE = RECORD[ Vdd, Gnd, Gnd2V, CKRecAdj, RecAdj, nEClock, Clock, ChipCKIn, ExtCKIn, ChipCKOut, ExtCKOut, LocCKOut, nDInB, nBInB, nRqOutB, nDOutB, nBOutB, nOrOutB, DInH, BInH, RqIn, OrInH, DOutH, BOutH, nSStop, DOEn, Name, DBusIn, Send, DBusOut, DCS: Ports.Port _ NIL ]; chipID: CARD = 5080H; currentVersion: NAT = 3; <<-- structure of DBusIn>> nDReset: NAT = 0; nDFreeze: NAT = 1; DExecute: NAT = 2; DShiftCK: NAT = 3; DAddress: NAT = 4; -- was nDAddress DSerialIn: NAT = 5; -- was DBusInIndex HybridSel: NAT = 6; <<>> <<-- structure of selScanPath>> ReadChipID: NAT = 1; AccessDP: NAT = 2; ReadExtCK: NAT = 4; ReadIntCK: NAT = 8; WriteExtCK: NAT = 16; WriteIntCK: NAT = 32; CreateBIC: PROC [fromFile: BOOL _ FALSE, v: NAT _ 0] RETURNS [ct: Core.CellType]; BICBind: PROC [public: Core.Wire, p: Ports.Port] RETURNS [bicPorts: BICPorts]; InitializeTester: PROC [tester: Core.CellType]; END.