IFUSrcPCFormTop.mesa
Copyright c 1986 by Xerox Corporation. All rights reserved.
Curry, October 22, 1986 7:44:48 pm PDT
DIRECTORY Core, CoreFrame, CoreName, CoreXform, DragOpsCross, IFUSrc, IFUCoreData;
IFUSrcPCFormTop: CEDAR PROGRAM
IMPORTS CoreFrame, CoreName, IFUCoreData
EXPORTS IFUSrc =
BEGIN
ROPE:  TYPE = Core.ROPE;
GND: ROPE ← CoreName.RopeNm["GND"];
VDD: ROPE ← CoreName.RopeNm["VDD"];
abgdAB:  ROPE = "( AlphaAB. BetaAB. GammaAB. DeltaAB. )";
opNILAB: ROPE = "( OpAB.  NIL   NIL    NIL  )";
alpBetAB: LIST OF REF = LIST["AlphaAB.", "BetaAB.", NIL, NIL];
opAlBeAB: LIST OF REF = LIST["OpAB.", NIL, "AlphaAB.", "BetaAB."];
opAlBeBA: LIST OF REF = LIST["OpBA.", NIL, "AlphaBA.", "BetaBA."];
alphaSign: ROPE = "(AlphaAB.0 AlphaAB.0 AlphaAB.0 AlphaAB.0 AlphaAB.0 AlphaAB.0 AlphaAB.0 AlphaAB.0)";
betaSign: ROPE =
"(BetaAB.0 BetaAB.0 BetaAB.0 BetaAB.0 BetaAB.0 BetaAB.0 BetaAB.0 BetaAB.0)";
signedAlpBet: LIST OF REF = LIST[alphaSign, alphaSign, "AlphaAB.", "BetaAB."];
signedAlpha:  LIST OF REF = LIST[alphaSign, alphaSign, alphaSign, "AlphaAB."];
signedBeta:  LIST OF REF = LIST[betaSign,  betaSign,  betaSign,  "BetaAB."];
oplength: ROPE = "
(GND GND GND (GND GND GND GND GND OpLengthbBA.0 OpLengthbBA.1 OpLengthbBA.2 ))";
XopSetupOpTop: LIST OF REF = LIST[ "XBus.", "PCBus.", abgdAB, opNILAB ];
XopSetupOp: PROC RETURNS[cellType: Core.CellType] = {
cellType ← IFUCoreData.CellProc[
subClass: "SwitchBox",
name:  "XopSetupOp",
top:  XopSetupOpTop,
left:  NIL,
right:  NIL,
bot:  XopGenRowTop,
xform:  IFUCoreData.Interleaved48 ]};
XopGenRowTop: LIST OF REF = LIST[
"XBus.",
"PCBus.",
abgdAB,
opNILAB,
"( NIL NIL
( NIL NIL NIL NIL OpAB.0 OpAB.1 OpAB.2 OpAB.3 )
( OpAB.4 OpAB.5 OpAB.6 OpAB.7 NIL NIL NIL NIL ) ) " ];
XopGenRow: PROC RETURNS[cellType: Core.CellType] = {
cellType ← IFUCoreData.CellProc[
subClass: "GPRow",
name:  "XopGenRow",
type:  "DpTriDr",
top:  XopGenRowTop,
right:  "( PcBusSrcXopGenBA NotPcBusSrcXopGenBA )",
in:   " ( (
GND
(GND GND GND VDD GND GND GND GND)
(GND GND GND GND OpAB.0 OpAB.1 OpAB.2 OpAB.3)
(OpAB.4 OpAB.5 OpAB.6 OpAB.7 GND GND GND GND ) ) )" ,
out:  "( PCBus. )",
bot:  TrapSetupTop,
xform:  IFUCoreData.Interleaved48 ]};
TrapSetupTop: LIST OF REF = LIST[ "XBus.", "PCBus.", abgdAB, opNILAB ];
TrapSetup: PROC RETURNS[cellType: Core.CellType] = {
cellType ← IFUCoreData.CellProc[
subClass: "SwitchBox",
name:  "TrapSetup",
top:  TrapSetupTop,
left:  "(
EUCondSel3AB.0 EUCondSel3AB.1 EUCondSel3AB.2 EUCondSel3AB.3
ExceptCodeAB.0 ExceptCodeAB.1 ExceptCodeAB.2 ExceptCodeAB.3 )",
right:  "(DPFaultAB.1 DPFaultAB.2 DPFaultAB.3 )",
bot:  TrapMuxTop,
xform:  IFUCoreData.Interleaved48 ]};
TrapMuxTop: LIST OF REF = LIST[
"XBus.",
"PCBus.",
abgdAB,
opNILAB,
NIL, NIL, GND, VDD,
"(NIL  NIL NIL (NIL    DPFaultAB.1  DPFaultAB.2  DPFaultAB.3 ) )",
"(NIL  NIL NIL (EUCondSel3AB.0 EUCondSel3AB.1 EUCondSel3AB.2 EUCondSel3AB.3 ) )",
"(NIL  NIL NIL (ExceptCodeAB.0 ExceptCodeAB.1 ExceptCodeAB.2 ExceptCodeAB.3 ) )"];
TrapMux: PROC RETURNS[cellType: Core.CellType] = {
cellType ← IFUCoreData.CellProc[
subClass: "Mux",
name:  "TrapMux",
top:  TrapMuxTop,
left: "( GND
ExceptTypeSpecialCodeAB ExceptTypeCondCodeAB ExceptTypeDpFaultAB )",
in:   "(
NIL
(GND
(GND GND GND VDD GND GND GND GND )
(GND GND GND VDD GND GND GND GND )
(ExceptCodeAB.0 ExceptCodeAB.1 ExceptCodeAB.2 ExceptCodeAB.3 GND GND GND GND) )
(GND
(GND GND GND VDD GND GND GND GND )
(GND GND GND VDD GND GND GND VDD )
(EUCondSel3AB.0 EUCondSel3AB.1 EUCondSel3AB.2 EUCondSel3AB.3 GND GND GND GND) )
(GND
(GND GND GND VDD GND GND GND GND )
(GND GND GND VDD GND GND VDD GND )
(GND    DPFaultAB.1 DPFaultAB.2 DPFaultAB.3 GND GND GND GND)))",
out:  "( TrapPCB. )",
bot:  TrapDrivePCBusTop,
xform:  IFUCoreData.Interleaved48 ]};
TrapDrivePCBusTop: LIST OF REF = LIST[ "XBus.", "PCBus.", abgdAB, opNILAB, "TrapPCB." ];
TrapDrivePCBus: PROC RETURNS[cellType: Core.CellType] = {
cellType ← IFUCoreData.CellProc[
subClass: "GPRow",
name:  "TrapDrivePCBus",
type:  "DpTriDr",
top:  TrapDrivePCBusTop,
right:  "( PcBusSrcTrapGenBA NotPcBusSrcTrapGenBA )",
in:    "( TrapPCB.  )",
out:  "( PCBus.  )",
bot:  ABGDDrivePCBusTop,
xform:  IFUCoreData.Interleaved48 ]};
ABGDDrivePCBusTop: LIST OF REF = LIST[ "XBus.", "PCBus.", abgdAB, opNILAB];
ABGDDrivePCBus: PROC RETURNS[cellType: Core.CellType] = {
cellType ← IFUCoreData.CellProc[
subClass: "GPRow",
name:  "ABGDDrivePCBus",
type:  "DpTriDr",
top:  ABGDDrivePCBusTop,
right:  "( PcBusSrcAlpBetGamDelBA NotPcBusSrcAlpBetGamDelBA )",
in:   LIST[ abgdAB ],
out:  LIST[ "PCBus." ],
bot:  XABBufTop,
xform:  IFUCoreData.Interleaved48 ]};
XABBufTop: LIST OF REF = LIST[ "XBus.", "PCBus.", alpBetAB, opNILAB];
XABBuf: PROC RETURNS[cellType: Core.CellType] = {
cellType ← IFUCoreData.CellProc[
subClass: "GPRow",
name:  "XABBuf",
type:   "DpLatch",
top:  XABBufTop,
left:  "( PhA VBB )",
in:   "( XBus.   )",
out:  "( XAB.   )",
bot:  XABDrivePCBusTop,
xform:  IFUCoreData.Interleaved48 ]};
XABDrivePCBusTop: LIST OF REF = LIST[ "XBus.", "PCBus.", alpBetAB, opNILAB, "XAB."];
XABDrivePCBus: PROC RETURNS[cellType: Core.CellType] = {
cellType ← IFUCoreData.CellProc[
subClass: "GPRow",
name:  "XABDrivePCBus",
type:  "DpTriDr",
top:  XABDrivePCBusTop,
right:  "( PcBusSrcXBA NotPcBusSrcXBA )",
in:   "( XAB.         )",
out:  "( PCBus.        )",
bot:  BranchOffsetSetupTop,
xform:  IFUCoreData.Interleaved48 ]};
BranchOffsetSetupTop: LIST OF REF = LIST[
"XBus.",
"PCBus.",
alpBetAB,
opNILAB,
"XAB."];
BranchOffsetSetup: PROC RETURNS[cellType: Core.CellType] = {
cellType ← IFUCoreData.CellProc[
subClass: "SwitchBox",
name:  "BranchOffsetSetup",
top:  BranchOffsetSetupTop,
left:  NIL,
right:  NIL,
bot:  BranchOffsetMuxTop,
xform:  IFUCoreData.Interleaved48 ]};
BranchOffsetMuxTop: LIST OF REF = LIST[
"XBus.", "PCBus.", NIL, opAlBeAB, "XAB.", NIL,
"GND", "VDD", signedAlpha, signedBeta ];
BranchOffsetMux: PROC RETURNS[cellType: Core.CellType] = {
cellType ← IFUCoreData.CellProc[
subClass: "Mux",
name:  "BranchOffsetMux",
top:  BranchOffsetMuxTop,
left: "(JumpOffsetAlphaAB JumpOffsetBetaAB JumpOffsetAlphaBetaAB JumpOffsetXaAB)",
in:  LIST[ signedAlpha,  signedBeta,  signedAlpBet,   "XAB." ],
out:  "( PCBrOSetA. )",
bot:  BranchOffsetLatchTop,
xform:  IFUCoreData.Interleaved48 ]};
BranchOffsetLatchTop: LIST OF REF = LIST
["XBus.", "PCBus.", NIL, opAlBeAB, NIL, "PCBrOSetA." ];
BranchOffsetLatch: PROC RETURNS[cellType: Core.CellType] = {
cellType ← IFUCoreData.CellProc[
subClass: "GPRow",
name:  "BranchOffsetLatch",
type:   "DpLatch",    -- this could be a buf, just need to restore
top:  BranchOffsetLatchTop,
left:  "( PhA VBB  )",
in:   "( PCBrOSetA.  )",
out:  "( PCBrOSetAB. )",
bot:  BranchPhaseMuxTop,
xform:  IFUCoreData.Interleaved48 ]};
BranchPhaseMuxTop: LIST OF REF = LIST["XBus.", "PCBus.", "PCBrOSetAB.", opAlBeAB];
BranchPhaseMux: PROC RETURNS[cellType: Core.CellType] = {
cellType ← IFUCoreData.CellProc[
subClass: "Mux",
name:  "BranchPhaseMux",
top:  BranchPhaseMuxTop,
left:  "(   PhA PhB )",
in:   LIST[ oplength, "PCBrOSetAB." ],
out:  LIST[ "PCBranch." ],
bot:  BranchBufferTop,
xform:  IFUCoreData.Interleaved48 ]};
BranchBufferTop: LIST OF REF = LIST
[ "XBus.", "PCBus.", NIL, opAlBeAB, oplength,"PCBranch."];
BranchBuffer: PROC RETURNS[cellType: Core.CellType] = {
cellType ← IFUCoreData.CellProc[
subClass: "GPRow",
name:  "BranchBuffer",
type:   "DpBuf",
top:  BranchBufferTop,
in:   "( PCBranch.  )",
out:  "( PCBranchBuf. )",
bot:  OpLengthBranchSetupTop,
xform:  IFUCoreData.Interleaved48 ]};
OpLengthBranchSetupTop: LIST OF REF = LIST
[ "XBus.", "PCBus.", "PCBranchBuf.", opAlBeAB, oplength];
OpLengthBranchSetup: PROC RETURNS[cellType: Core.CellType] = {
cellType ← IFUCoreData.CellProc[
subClass: "SwitchBox",
name:  "OpLengthBranchSetup",
top:  OpLengthBranchSetupTop,
left:  "( OpLengthbBA.0 OpLengthbBA.1 OpLengthbBA.2 )",
right:  NIL,
bot:  OpAlphaBetaLatchTop,
xform:  IFUCoreData.Interleaved48 ]};
OpAlphaBetaLatchTop: LIST OF REF = LIST["XBus.", "PCBus.", "PCBranchBuf.", opAlBeAB];
OpAlphaBetaLatch: PROC RETURNS[cellType: Core.CellType] = {
cellType ← IFUCoreData.CellProc[
subClass: "GPRow",
name:  "OpAlphaBetaLatch",
type:   "DpLatch",
top:  OpAlphaBetaLatchTop,
left:  "( PhB VBB )",
in:   LIST[ opAlBeAB ],
out:  LIST[ opAlBeBA ],
bot:  NPCLatchTop,
xform:  IFUCoreData.Interleaved48 ]};
NPCLatchTop: LIST OF REF = LIST["XBus.", "PCBus.", "PCBranchBuf.", opAlBeBA];
NPCLatch: PROC RETURNS[cellType: Core.CellType] = {
cellType ← IFUCoreData.CellProc[
subClass: "GPRow",
name:  "NPCLatch",
type:   "DpLatch",
top:  NPCLatchTop,
left:  "( PhB VBB )",
in:   "( PCBus. )",
out:  "( NPCBA. )",
bot:  PCABMuxTop,
xform:  IFUCoreData.Interleaved48 ]};
PCABMuxTop: LIST OF REF = LIST
["XBus.", "PCBus.", "PCBranchBuf.", opAlBeBA, NIL, "NPCBA."];
PCABMux: PROC RETURNS[cellType: Core.CellType] = {
cellType ← IFUCoreData.CellProc[
subClass: "Mux",
name:  "PCABMux",
top:  PCABMuxTop,
right:  "( PcNextIncrBA PcNextFromPCBusBA )",
in:   "( Sum.   NPCBA. )",
out:  "( PCA. )",
bot:  PCABLatchTop,
xform:  IFUCoreData.Interleaved48 ]};
PCABLatchTop: LIST OF REF = LIST
["XBus.", "PCBus.", "PCBranchBuf.", opAlBeBA, "PCA.", "Sum."];
PCABLatch: PROC RETURNS[cellType: Core.CellType] = {
cellType ← IFUCoreData.CellProc[
subClass: "GPRow",
name:  "PCABLatch",
type:   "DpLatch",
top:  PCABLatchTop,
left:  "( PhA VBB )",
in:   "( PCA.   )",
out:  "( PCAB.  )",
bot:  PCDrivePCBusTop,
xform:  IFUCoreData.Interleaved48 ]};
PCDrivePCBusTop: LIST OF REF = LIST
["XBus.", "PCBus.", "PCBranchBuf.", opAlBeBA, "PCAB.", "Sum."];
PCDrivePCBus: PROC RETURNS[cellType: Core.CellType] = {
cellType ← IFUCoreData.CellProc[
subClass: "GPRow",
name:  "PCDrivePCBus",
type:  "DpTriDr",
top:  PCDrivePCBusTop,
right:  "( PcBusSrcPcBA NotPcBusSrcPcBA )",
in:   "( PCAB.  )",
out:  "( PCBus.  )",
bot:  PCFormBot,
xform:  IFUCoreData.Interleaved48 ]};
PCFormBot: LIST OF REF = LIST
["XBus.", "PCBus.", "PCBranchBuf.", opAlBeBA, "PCAB.", "Sum."];
PCFormTop: PUBLIC PROC RETURNS[cellType: Core.CellType] = {
name: ROPE ← CoreName.RopeNm["IFUPCFormTop"];
IF (cellType ← CoreFrame.ReadFrameCache[name])=NIL THEN {
cellType ← CoreFrame.NewFrameCells[
name:  name,
rec:  [first: top],
cells: LIST[
XopSetupOp[],
XopGenRow[],
TrapSetup[],
TrapMux[],
TrapDrivePCBus[],
ABGDDrivePCBus[],
XABBuf[],
XABDrivePCBus[],
BranchOffsetSetup[],
BranchOffsetMux[],
BranchOffsetLatch[],
BranchPhaseMux[],
BranchBuffer[],
OpLengthBranchSetup[],
OpAlphaBetaLatch[],
NPCLatch[],
PCABMux[],
PCABLatch[],
PCDrivePCBus[]   ] ];
CoreFrame.WriteFrameCache[cellType]}};
CheckAssumptions used Above
IF DragOpsCross.XopBase   #1000000B THEN ERROR;
IF DragOpsCross.TrapBase   #1002000B THEN ERROR;
IF DragOpsCross.bytesPerWord  #4   THEN ERROR;
IF DragOpsCross.TrapWidthWords #4   THEN ERROR;
END.