IFUSrcFetch:
CEDAR
PROGRAM
IMPORTS CoreFrame, CoreName, IFUCoreData
EXPORTS IFUSrc =
BEGIN
ROPE: TYPE = Core.ROPE;
increPCBA:
ROPE =
"(GND GND GND (GND GND GND GND GND NewFetchBA GND GND ))";
Interleaved in sequencial spec
IPDataxx:
ROPE = " (
( IPData.00 IPData.10 IPData.20 IPData.30
IPData.01 IPData.11 IPData.21 IPData.31 )
( IPData.02 IPData.12 IPData.22 IPData.32
IPData.03 IPData.13 IPData.23 IPData.33 )
( IPData.04 IPData.14 IPData.24 IPData.34
IPData.05 IPData.15 IPData.25 IPData.35 )
( IPData.06 IPData.16 IPData.26 IPData.36
IPData.07 IPData.17 IPData.27 IPData.37 ) )";
Sequencial in interleaved spec
PCBusxx:
ROPE = " (
( PCBus.00 PCBus.04 PCBus.10 PCBus.14 PCBus.20 PCBus.24 PCBus.30 PCBus.34 )
( PCBus.01 PCBus.05 PCBus.11 PCBus.15 PCBus.21 PCBus.25 PCBus.31 PCBus.35 )
( PCBus.02 PCBus.06 PCBus.12 PCBus.16 PCBus.22 PCBus.26 PCBus.32 PCBus.36 )
( PCBus.03 PCBus.07 PCBus.13 PCBus.17 PCBus.23 PCBus.27 PCBus.33 PCBus.37 ) )";
fetchAddr2ShiftBA:
ROPE = " (
(GND GND FetchAddrBA.00 FetchAddrBA.01
FetchAddrBA.02 FetchAddrBA.03 FetchAddrBA.04 FetchAddrBA.05)
(FetchAddrBA.06 FetchAddrBA.07 FetchAddrBA.10 FetchAddrBA.11
FetchAddrBA.12 FetchAddrBA.13 FetchAddrBA.14 FetchAddrBA.15)
(FetchAddrBA.16 FetchAddrBA.17 FetchAddrBA.20 FetchAddrBA.21
FetchAddrBA.22 FetchAddrBA.23 FetchAddrBA.24 FetchAddrBA.25)
(FetchAddrBA.26 FetchAddrBA.27 FetchAddrBA.30 FetchAddrBA.31
FetchAddrBA.32 FetchAddrBA.33 FetchAddrBA.34 FetchAddrBA.35 )) ";
FetchShuffleIPDataTop: LIST OF REF = LIST[NIL, "IPAddr.", "IPData." ];
FetchShuffleIPData: PROC RETURNS[cellType: Core.CellType] = {
cellType ← IFUCoreData.CellProc[
subClass: "SwitchBox",
name: "FetchShuffleIPData",
top: FetchShuffleIPDataTop,
bot: FetchIPDriveTop,
xform: IFUCoreData.Sequencial48 ]};
FetchIPDriveTop:
LIST
OF
REF =
LIST[
NIL, "IPAddr.",
NIL, IPDataxx ];
FetchIPDrive:
PROC
RETURNS[cellType: Core.CellType] = {
cellType ← IFUCoreData.CellProc[
subClass: "GPRow",
name: "FetchIPDrive",
type: "DpBuf",
top: FetchIPDriveTop,
in: LIST[fetchAddr2ShiftBA],
out: "( IPAddr. )",
bot: FetchShiftAddress2Top,
xform: IFUCoreData.Sequencial48 ]};
FetchShiftAddress2Top:
LIST
OF
REF =
LIST[fetchAddr2ShiftBA,
NIL,
NIL, IPDataxx];
FetchShiftAddress2:
PROC
RETURNS[cellType: Core.CellType] = {
cellType ← IFUCoreData.CellProc[
subClass: "SwitchBox",
name: "FetchShiftAddress2",
top: FetchShiftAddress2Top,
these don't go anywhere (offset from PCBus.36 PCBus.37 in FetchXslatePCBus)
routing in FetchIncrement gets worried if FetchIncrementTop doesn't have these
left: "( FetchAddrBA.36 FetchAddrBA.37 )",
right: NIL,
bot: FetchIncrementTop,
xform: IFUCoreData.Sequencial48 ]};
FetchIncrementTop:
LIST
OF
REF =
LIST[
NIL, "FetchAddrBA.",
NIL, IPDataxx];
FetchIncrement:
PROC
RETURNS[cellType: Core.CellType] = {
cellType ← IFUCoreData.CellProc[
subClass: "Adder",
name: "FetchIncrement",
right: "( GND )",
top: FetchIncrementTop,
in: LIST[ "FetchAddrBA.", increPCBA ],
out: "( FetchAddrPlus4BA. )",
bot: FetchIncrementInTop,
xform: IFUCoreData.Sequencial48 ]};
FetchIncrementInTop:
LIST
OF
REF =
LIST
["FetchAddrPlus4BA.", "FetchAddrBA.", increPCBA, IPDataxx];
FetchIncrementIn:
PROC
RETURNS[cellType: Core.CellType] = {
cellType ← IFUCoreData.CellProc[
subClass: "SwitchBox",
name: "FetchIncrementIn",
top: FetchIncrementInTop,
left: "( NewFetchBA )",
right: NIL,
bot: FetchLatchATop,
xform: IFUCoreData.Sequencial48 ]};
FetchLatchATop:
LIST
OF
REF =
LIST["FetchAddrPlus4BA.", "FetchAddrBA.",
NIL, IPDataxx];
FetchLatchA:
PROC
RETURNS[cellType: Core.CellType] = {
cellType ← IFUCoreData.CellProc[
subClass: "GPRow",
name: "FetchLatchA",
type: "DpLatch",
top: FetchLatchATop,
left: "( PhA VBB )",
in: "( FetchAddrPlus4BA. )",
out: "( FetchAddrAB. )",
bot: FetchMuxBTop,
xform: IFUCoreData.Sequencial48 ]};
FetchMuxBTop:
LIST
OF
REF =
LIST["FetchAddrAB.", "FetchAddrBA.",
NIL, IPDataxx];
FetchMuxB:
PROC
RETURNS[cellType: Core.CellType] = {
cellType ← IFUCoreData.CellProc[
subClass: "Mux",
name: "FetchMuxB",
top: FetchMuxBTop,
right: "(
NextMacroGetBA NextMacroJumpBA NextMacroHoldBA GND )",
in: "( FetchAddrAB. PCBus. FetchAddrAB. NIL)",
out: "( FetchAddrB. )",
bot: FetchLatchBTop,
xform: IFUCoreData.Sequencial48 ]};
FetchLatchBTop:
LIST
OF
REF =
LIST
[NIL, "FetchAddrBA.", "FetchAddrB.", IPDataxx, NIL, "PCBus." ];
FetchLatchB:
PROC
RETURNS[cellType: Core.CellType] = {
cellType ← IFUCoreData.CellProc[
subClass: "GPRow",
name: "FetchLatchB",
type: "DpLatch",
top: FetchLatchBTop,
left: "(PhB VBB)",
in: "( FetchAddrB. )",
out: "( FetchAddrBA. )",
bot: FetchLatchBBot,
xform: IFUCoreData.Sequencial48 ]};
FetchLatchBBot:
LIST
OF
REF =
LIST [
NIL,
NIL,
NIL, IPDataxx,
NIL, "PCBus.", ];
Sequential to Interleaved here
FetchXslatePCBusTop:
LIST
OF
REF =
LIST[
NIL,
NIL,
NIL, "IPData.",
NIL, PCBusxx ];
FetchXslatePCBus:
PROC
RETURNS[cellType: Core.CellType] = {
cellType ← IFUCoreData.CellProc[
subClass: "SwitchBox",
name: "FetchXslatePCBus",
top: FetchXslatePCBusTop,
left: "( PCBus.36 PCBus.37 )",
right: NIL,
bot: FetchAddressBot,
xform: IFUCoreData.Interleaved48 ]};
FetchAddressBot:
LIST
OF
REF =
LIST[
NIL,
NIL,
NIL, "IPData.",
NIL,
NIL,"GND", "VDD", "PCBus." ];
Fetch:
PUBLIC
PROC
RETURNS[cellType: Core.CellType] = {
name: ROPE ← CoreName.RopeNm["IFUFetch"];
IF (cellType ← CoreFrame.ReadFrameCache[name])=
NIL
THEN {
cellType ← CoreFrame.NewFrameCells[
name: name,
rec: [first: top],
cells:
LIST[
FetchShuffleIPData[],
FetchIPDrive[],
FetchShiftAddress2[],
FetchIncrement[],
FetchIncrementIn[],
FetchLatchA[],
FetchMuxB[],
FetchLatchB[],
FetchXslatePCBus[] ] ];
CoreFrame.WriteFrameCache[cellType]}};
END.