[_CD4_]<dragon>ifu>IFUPLA>Save>IFUPLAInstrDecode4.mesa!1

IMPORTS Commander, IFUPLA, IO, PLAOps EXPORTS IFUPLA =

BEGIN OPEN IFUPLA, PO: PLAOps;

instr: PO.BoolExpr;

GenInstrDecodePLA4: PUBLIC PROC = {

Used in instructions

aOpt: PO.BoolExpr ← BE[m:[beta: 200B], d:[beta: 200B]];

bOpt: PO.BoolExpr ← BE[m:[beta: 040B], d:[beta: 040B]];

cOpt: PO.BoolExpr ← BE[m:[beta: 100B], d:[beta: 100B]];

aux: PO.BoolExpr ← BE[m:[beta: 020B], d:[beta: 020B]];

dRR

instr ← PO.And[current, BE[m:[op: instrBot4NotSig], d:[op: dRADD]]];

AReg

Set[s: PO.And[ PO.Not[aOpt], aux, instr], out:[aReg:[ aBase, alpha47]]];

Set[s: PO.And[ PO.Not[aOpt], PO.Not[aux], instr], out:[aReg:[ l, alpha47]]];

Set[s: PO.And[aOpt, instr], m:[alpha: 010B], d:[alpha: 000B], out:[aReg:[ cBase, alpha47]]];

Set[s: PO.And[aOpt, instr], m:[alpha: 004B], d:[alpha: 000B], out:[aReg:[ cBase, alpha47]]];

Set[s: PO.And[aOpt, instr], m:[alpha: 015B], d:[alpha: 014B], out:[aReg:[ s, zero]]];

Set[s: PO.And[aOpt, instr], m:[alpha: 015B], d:[alpha: 015B], out:[aReg:[ s, minus1]]];

BReg

Set[s: PO.And[ PO.Not[bOpt], aux, instr], out:[bReg:[ aBase, beta47]]];

Set[s: PO.And[ PO.Not[bOpt], PO.Not[aux], instr], out:[bReg:[ l, beta47]]];

Set[s: PO.And[bOpt, instr], m:[beta: 010B], d:[beta: 000B], out:[bReg:[ cBase, beta47]]];

Set[s: PO.And[bOpt, instr], m:[beta: 004B], d:[beta: 000B], out:[bReg:[ cBase, beta47]]];

Set[s: PO.And[bOpt, instr], m:[beta: 015B], d:[beta: 014B], out:[bReg:[ s, zero]]];

Set[s: PO.And[bOpt, instr], m:[beta: 015B], d:[beta: 015B], out:[bReg:[ s, minus1]]];

CReg

Set[s: PO.And[ PO.Not[cOpt], aux, instr], out:[cReg:[ aBase, alpha03]]];

Set[s: PO.And[ PO.Not[cOpt], PO.Not[aux], instr], out:[cReg:[ l, alpha03]]];

Set[s: PO.And[cOpt, instr], m:[alpha: 200B], d:[alpha: 000B], out:[cReg:[ cBase, alpha03]]];

Set[s: PO.And[cOpt, instr], m:[alpha: 100B], d:[alpha: 000B], out:[cReg:[ cBase, alpha03]]];

Set[s: PO.And[cOpt, instr], m:[alpha: 360B], d:[alpha: 300B], out:[cReg:[ s, zero]]];

Set[s: PO.And[cOpt, instr], m:[alpha: 360B], d:[alpha: 320B], out:[cReg:[ s, minus1]]];

Set[s: PO.And[cOpt, instr], m:[alpha: 340B], d:[alpha: 340B], out:[cReg:[ s, one]]];

Stack

Set[s: PO.And[aOpt, instr], m:[alpha: 016B], d:[alpha: 016B], out:[deltaSa: pop]];

Set[s: PO.And[bOpt, instr], m:[beta: 016B], d:[beta: 016B], out:[deltaSb: pop]];

Set[s: PO.And[cOpt, instr], m:[alpha: 340B], d:[alpha: 340B], out:[deltaSc: push]];

Body of microinstruction with exceptions

Set[s: instr, out:[aluOp: op47]];

Set[s: instr, m:[op: instrBot1NotSig], d:[op: dRADD], out:[condSel: OvFl]]; -- Add or Sub

Set[s: instr, m:[op: instrBot1NotSig], d:[op:dRLADD], out:[condSel: IL]]; -- Add or Sub

Set[s: instr, m:[op: instrIsSig], d:[op: dRBC], out:[condSel: BC]];

Set[s: instr, m:[op: instrIsSig], d:[op: dRBC], out:[condEffect: macroTrap]];

Set[s: instr, m:[op: instrIsSig], d:[op: dRRX], out:[aluOp: VAdd]];

Set[s: instr, m:[op: instrIsSig], d:[op: dRRX], out:[euPBusCmd: Fetch]];

The last four bits of dRRX(1000) Ored with VAdd(1100) converts its RR generated aluOp into VAdd(1100). This implies that op47 must be ORed with m.op to generate the real alu op.

NO NO NO.... aluOp=op47 and aluOp VAdd won't work. We must use another output bit to say 'AluOp ← Op47 OR micro.AluOp'

Do Xops

instr ← PO.Or[ -- One Byte instructions

BE[m:[op: instrBot5NotSig], d:[op: LOOPHOLE[000B]]],

BE[m:[op: instrBot6NotSig], d:[op: LOOPHOLE[100B]]] ];

Set[s: PO.And[ instr, PO.Not[UsedOpcodes], current], out:[ -- One Byte instructions

doMacroJump: TRUE,

dontGetNextMacro: TRUE,

pcNext: pcBus, pcBusSrc: xopGen,

pclsPipe: seqPCnewLS,

iStackPostEffect: push ]];

Set[s: PO.And[ PO.Not[instr], PO.Not[UsedOpcodes], current],

m:[state: byteIsSig], d:[state: 0], out:[ -- Multi Byte instructions

doMacroJump: TRUE,

dontGetNextMacro: TRUE,

pcNext: pcBus, pcBusSrc: xopGen,

pclsPipe: seqPCnewLS,

iStackPostEffect: push ]];

Set[s: PO.And[ PO.Not[instr], PO.Not[UsedOpcodes], current],

m:[state: byteIsSig], d:[state: 1], out:[ -- Multi Byte instructions

doMacroJump: TRUE,

dontGetNextMacro: TRUE,

pcNext: pcBus, pcBusSrc: xopGen,

pclsPipe: seqPCnewLS,

iStackPostEffect: push,

deltaSc: push ]] };

BE: PUBLIC PROC [m, d: InstrDecodeIn] RETURNS[PO.BoolExpr] = {

mRef: REF InstrDecodeIn ← NARROW[InstrDecodePLA.mask];

dRef: REF InstrDecodeIn ← NARROW[InstrDecodePLA.data];

mRef^ ← m; dRef^ ← d; RETURN[PO.GetBEForDataMask[InstrDecodePLA]]};

Set: PUBLIC PROC [s: PO.BoolExpr ← NIL, m, d: InstrDecodeIn ← [ ], out: InstrDecodeOut] = {

res: REF InstrDecodeOut ← NARROW[InstrDecodePLA.out];

IF m.op#dTrap -- #0 test for significance of opcode

THEN UsedOpcodes ← PO.Or[BE[m:[op:m.op], d:[op:d.op]], UsedOpcodes];

out.aluOpFOP ← out.aluOp=FOP;

out.notPassRtIfAZero ← out.aluOp#Or OR (out.euPBusCmd IN [StoreFP..FetchFPMult]);

out.kIsRtOp ← out.xASource IN [alpha..bReg] AND (out.aluOp # FOPK);

IF s=NIL

THEN s ← BE[m,d]

ELSE s ← PO.And[s, BE[m,d] ];

res^ ← out; PO.SetOutForBE[InstrDecodePLA, s]};

InstrDecodeProc: PUBLIC PROC[argRec: InstrDecodeIn] RETURNS[resRec: InstrDecodeOut] = {

arg: REF InstrDecodeIn ← NARROW[InstrDecodePLA.data];

res: REF InstrDecodeOut ← NARROW[InstrDecodePLA.out];

arg^ ← argRec; PO.GetOutForData[InstrDecodePLA]; resRec ← res^};

UsedOpcodes: PO.BoolExpr; -- Built as side effect in PROC Set

InstrDecodePLA: PUBLIC PO.PLA ← NIL;

current: PUBLIC PO.BoolExpr;

GenInstrDecode: Commander.CommandProc = {

filename: IO.ROPE ← PO.DefaultCMDLine[cmd.commandLine, defaultFile];

InstrDecodePLA ← PO.NewPLA[inName: "IFUPLA.InstrDecodeIn", outName: "IFUPLA.InstrDecodeOut"];

GenInstrDecodePLA1[];

PO.WritePLAFile[filename, cmd.out, InstrDecodePLA] };

ReadInstrDecode: Commander.CommandProc = {

InstrDecodePLA ← PO.ReadPLAFile[PO.DefaultCMDLine[cmd.commandLine, defaultFile], cmd.out] };

WriteInstrDecode: Commander.CommandProc = {PO.WritePLAFile

[PO.DefaultCMDLine[cmd.commandLine, defaultFile], cmd.out, InstrDecodePLA] };

defaultFile: IO.ROPE = "InstrDecode.pla";

doc: IO.ROPE = "Expects the name of a pla file";

Commander.Register[key:"GenInstrDecode", proc: GenInstrDecode, doc: doc];

Commander.Register[key:"ReadInstrDecode", proc: ReadInstrDecode, doc: doc];

Commander.Register[key:"WriteInstrDecode", proc: WriteInstrDecode, doc: doc];

END.