WriteCapa.mesa
Copyright Ó 1986, 1987 by Xerox Corporation. All rights reserved.
Bertrand Serlet April 15, 1987 4:15:44 pm PDT
Christian Le Cocq April 28, 1987 10:32:59 am PDT
Module to write the capacitances of the layout wires on the corresponding Core.Wires. Writes two properties on each atomic wire: the capacitance of this wire, and the capacitance of the node from the wire to the "leaves".
The Capacitance is only the stray capacitance of wire. The gate, source and drain capacitances of a fet is supposed to be computed by the application program that uses the "WriteCapa-ized" core, because different programs have different transistor models.
DIRECTORY
Core USING [CellType, Wire],
CoreOps USING [EachWirePairProc];
WriteCapa: CEDAR DEFINITIONS
~ BEGIN
pfs: TYPE = REAL;
GetRootCap: PROC [wire: Core.Wire] RETURNS [cap: pfs];
Returns the capacitance of the electrical node from that point to the "leaves", that is from that level to the deepest cells.
GetCap: PROC [wire: Core.Wire] RETURNS [cap: pfs];
Returns the capacitance of that particular wire in its cell only, that is this exact level only beeing considered.
AddRootCap: CoreOps.EachWirePairProc;
PROC [actualWire, publicWire: Core.Wire];
If publicWire.size=0 adds the node capacitance of the "publicWire" wire to the "actualWire" wire.
WriteWireCapa: PROC [coreCell: Core.CellType, technology: ATOM ← $cmosB];
Write the partial an full capacitance of all atomic wires (adds two properties to each atomic wire).
END.