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"LdCtlRegDec" W2D 0 1 A1 i 224 W2E 0 1 A1 i 225 W2F 0 1 A1 i 226 W30 0 1 A1 i 227 W31 0 1 A1 i 228 W32 3 1 A0 r RF "LdErrSyndDec" W33 0 1 A1 i 13 W34 0 1 A1 i 14 W35 0 1 A1 i 15 W36 2 1 A0 r R10 "LatchCAddDec" W37 0 1 A1 i 200 W38 0 1 A1 i 201 W39 0 2 A0 r R11 "SharedIn" A1 i 407 W3A 2 1 A0 r R12 "EnStage3Dec" W3B 0 1 A1 i 0 W3C 0 1 A1 i 1 W3D 0 3 A0 r R13 "Write" A2 i 41 A1 i 211 W3E 5 1 A0 r R14 "PrechargeDelay" W3F 0 1 A1 i 232 W40 0 1 A1 i 233 W41 0 1 A1 i 234 W42 0 1 A1 i 235 W43 0 1 A1 i 236 W44 8 1 A0 r R15 "RamBufClock" W45 0 1 A1 i 110 W46 0 1 A1 i 111 W47 0 1 A1 i 112 W48 0 1 A1 i 113 W49 0 1 A1 i 114 W4A 0 1 A1 i 115 W4B 0 1 A1 i 116 W4C 0 1 A1 i 117 W4D 0 2 A0 r R16 "ModeFaultOut" A1 i 143 W4E 8 2 A0 r R17 "RamCheck" A3 Static a A4 UnconnectedOk W4F 0 2 A2 i 30 A1 i 175 W50 0 2 A2 i 31 A1 i 176 W51 0 2 A2 i 32 A1 i 177 W52 0 2 A2 i 33 A1 i 178 W53 0 2 A2 i 34 A1 i 179 W54 0 2 A2 i 35 A1 i 180 W55 0 2 A2 i 36 A1 i 181 W56 0 2 A2 i 37 A1 i 182 W57 18 1 A0 r R18 "CorrectSel" W58 0 1 A1 i 24 W59 0 1 A1 i 25 W5A 0 1 A1 i 26 W5B 0 1 A1 i 27 W5C 0 1 A1 i 28 W5D 0 1 A1 i 29 W5E 0 1 A1 i 30 W5F 0 1 A1 i 31 W60 0 1 A1 i 32 W61 0 1 A1 i 33 W62 0 1 A1 i 34 W63 0 1 A1 i 35 W64 0 1 A1 i 36 W65 0 1 A1 i 37 W66 0 1 A1 i 38 W67 0 1 A1 i 39 W68 0 1 A1 i 40 W69 0 1 A1 i 41 W6A 0 2 A0 r R19 "IHeaderOut" A2 i 86 W6B 2 1 A0 r R1A "SelRefClock" W6C 0 1 A1 i 230 W6D 0 1 A1 i 231 W6E 4 1 A0 r R1B "ReplyBufEn" W6F 0 1 A1 i 134 W70 0 1 A1 i 135 W71 0 1 A1 i 136 W72 0 1 A1 i 137 W73 10 1 A0 r R1C "HighAddSelDec" W74 0 1 A1 i 165 W75 0 1 A1 i 166 W76 0 1 A1 i 167 W77 0 1 A1 i 168 W78 0 1 A1 i 169 W79 0 1 A1 i 170 W7A 0 1 A1 i 171 W7B 0 1 A1 i 172 W7C 0 1 A1 i 173 W7D 0 1 A1 i 174 W7E 0 2 A0 r R1D "EnableCorrection" A1 i 229 W7F 0 3 A0 r R1E "Clock" A2 i 42 A1 i 301 W80 5 1 A0 r R1F "WriteDelay" W81 0 1 A1 i 242 W82 0 1 A1 i 243 W83 0 1 A1 i 244 W84 0 1 A1 i 245 W85 0 1 A1 i 246 W86 0 2 A0 r R20 "IGrant" A2 i 82 W87 0 2 A0 r R21 "nClock" A1 i 302 W88 0 2 A0 r R22 "ISStopOut" A2 i 83 W89 3 1 A0 r R23 "LowAddSelect" W8A 0 1 A1 i 252 W8B 0 1 A1 i 253 W8C 0 1 A1 i 254 W8D 0 2 A0 r R24 "UnloadOS" A1 i 409 W8E 0 2 A0 r R25 "ITestIn" A2 i 91 W8F 0 2 A0 r R26 "HeaderCycleIn" A1 i 330 W90 0 2 A0 r R27 "IHeaderIn" A2 i 87 W91 0 2 A0 r R28 "OwnerIn" A1 i 408 W92 0 2 A0 r R29 "UnldDataFifo" A1 i 406 W93 4 1 A0 r R2A "HighAddSelect" W94 0 1 A1 i 257 W95 0 1 A1 i 258 W96 0 1 A1 i 259 W97 0 1 A1 i 260 W98 5 1 A0 r R2B "ReadDelay" W99 0 1 A1 i 247 W9A 0 1 A1 i 248 W9B 0 1 A1 i 249 W9C 0 1 A1 i 250 W9D 0 1 A1 i 251 W9E 5 1 A0 r R2C "IOWData" W9F 0 1 A1 i 261 WA0 0 1 A1 i 262 WA1 0 1 A1 i 263 WA2 0 1 A1 i 264 WA3 0 1 A1 i 265 WA4 0 2 A0 r R2D "SelColumnAdd" A2 i 1 WA5 0 2 A0 r R2E "StartA" A2 i 4 WA6 7 2 A0 r R2F "DBus" A3 a A4 WA7 0 2 A2 i 70 A1 i 334 WA8 0 2 A2 i 71 A1 i 335 WA9 0 2 A2 i 72 A1 i 336 WAA 0 2 A2 i 73 A1 i 337 WAB 0 2 A2 i 74 A1 i 338 WAC 0 2 A2 i 75 A1 i 339 WAD 0 2 A2 i 76 A1 i 340 WAE 0 2 A0 r R30 "LoadDataFifo" A1 i 400 WAF 0 3 A0 r R31 "nWrite" A2 i 40 A1 i 210 WB0 0 2 A0 r R32 "SharedOrIn" A1 i 48 WB1 0 3 A0 r R33 "CkIn" A2 i 43 A1 i 300 WB2 3 1 A0 r R34 "DSelExe2Dec" WB3 0 1 A1 i 2 WB4 0 1 A1 i 3 WB5 0 1 A1 i 4 WB6 2 1 A0 r R35 "WordAddress" WB7 0 1 A2 i 8 WB8 0 1 A2 i 9 WB9 4 1 A0 r R36 "WriteBufClock" WBA 0 1 A1 i 216 WBB 0 1 A1 i 217 WBC 0 1 A1 i 218 WBD 0 1 A1 i 219 WBE 0 2 A0 r R37 "Owner" A1 i 405 WBF 0 2 A0 r R38 "SelP2" A1 i 331 WC0 0 2 A0 r R39 "SharedOrOut" A1 i 49 WC1 2 1 A0 r R3A "EnStage1Dec" WC2 0 1 A1 i 46 WC3 0 1 A1 i 47 WC4 0 2 A0 r R3B "TestEn" A2 i 90 WC5 8 1 A0 r R3C "RamBufDis" WC6 0 1 A1 i 102 WC7 0 1 A1 i 103 WC8 0 1 A1 i 104 WC9 0 1 A1 i 105 WCA 0 1 A1 i 106 WCB 0 1 A1 i 107 WCC 0 1 A1 i 108 WCD 0 1 A1 i 109 WCE 0 2 A0 r R3D "OSAvailable" A1 i 403 WCF 8 1 A0 r R3E "CheckBits" WD0 0 1 A1 i 16 WD1 0 1 A1 i 17 WD2 0 1 A1 i 18 WD3 0 1 A1 i 19 WD4 0 1 A1 i 20 WD5 0 1 A1 i 21 WD6 0 1 A1 i 22 WD7 0 1 A1 i 23 WD8 2 1 A0 r R3F "SelRamBufDec" WD9 0 1 A1 i 100 WDA 0 1 A1 i 101 WDB 0 2 A0 r R40 "dynabusEn" A2 i 0 WDC 2 1 A0 r R41 "IORegAdd" WDD 0 1 A1 i 202 WDE 0 1 A1 i 203 WDF 4 1 A0 r R42 "WriteBufEn" WE0 0 1 A1 i 220 WE1 0 1 A1 i 221 WE2 0 1 A1 i 222 WE3 0 1 A1 i 223 WE4 0 4 A0 r R43 "DSelect" A3 a A4 A2 i 44 A1 i 333 WE5 2 1 A0 r R44 "SelIORdDataDec" WE6 0 1 A1 i 138 WE7 0 1 A1 i 139 WE8 0 2 A0 r R45 "ReplyOrOut" A1 i 141 WE9 0 2 A0 r R46 "Full" A1 i 350 WEA 5 1 A0 r R47 "ErrorReg" WEB 0 1 A1 i 7 WEC 0 1 A1 i 8 WED 0 1 A1 i 9 WEE 0 1 A1 i 10 WEF 0 1 A1 i 11 WF0 0 2 A0 r R48 "ReplyOrIn" A1 i 140 WF1 5 1 A0 r R49 "LowAddSelDec" WF2 0 1 A1 i 160 WF3 0 1 A1 i 161 WF4 0 1 A1 i 162 WF5 0 1 A1 i 163 WF6 0 1 A1 i 164 WF7 0 2 A0 r R4A "ArbiterHold" A1 i 352 WF8 4 1 A0 r R4B "EnResetStage2Dec" WF9 0 1 A1 i 42 WFA 0 1 A1 i 43 WFB 0 1 A1 i 44 WFC 0 1 A1 i 45 WFD 2 1 A0 r R4C "IRequest" WFE 0 1 A2 i 80 WFF 0 1 A2 i 81 W100 14 2 A0 r R4D "RamAddress" A3 a A4 W101 0 2 A2 i 10 A1 i 144 W102 0 2 A2 i 11 A1 i 145 W103 0 2 A2 i 12 A1 i 146 W104 0 2 A2 i 13 A1 i 147 W105 0 2 A2 i 14 A1 i 148 W106 0 2 A2 i 15 A1 i 149 W107 0 2 A2 i 16 A1 i 150 W108 0 2 A2 i 17 A1 i 151 W109 0 2 A2 i 18 A1 i 152 W10A 0 2 A2 i 19 A1 i 153 W10B 0 2 A2 i 20 A1 i 154 W10C 0 2 A2 i 21 A1 i 155 W10D 0 2 A2 i 22 A1 i 156 W10E 0 2 A2 i 23 A1 i 157 W10F 0 2 A0 r R4E "IOwnerIn" A2 i 85 W110 0 2 A0 r R4F "RamBufWrite" A2 i 5 W111 0 2 A0 r R50 "ModeFaultIn" A1 i 142 W112 5 1 A0 r R51 "Command" W113 0 1 A1 i 205 W114 0 1 A1 i 206 W115 0 1 A1 i 207 W116 0 1 A1 i 208 W117 0 1 A1 i 209 W118 0 1 A0 r R52 "Gnd" 4 A0 r R53 "MCControlLogic" A5 Layout a A6 SCRemote A7 UsePublicPositions rb 1 A8 numRows i 40 R54 "Record" 18 W119 151 0 W1 W110 W11A 0 0 W1D WA5 W11B 0 1 A0 r R55 "CmdIdle" W36 W11C 0 1 A0 r R56 "OwnerAbort" W11D 5 1 A0 r R57 "GrantDelay" W11E 0 0 W11F 0 0 W120 0 0 W121 0 0 W122 0 0 W80 W123 0 1 A0 r R58 "nWriteB" W124 0 1 A0 r R59 "CaptureErrorAdd" W23 W90 W3A WE4 W125 0 1 A0 r R5A "LatchCAdd" W98 W126 0 1 A0 r R5B "OneError" WC4 W88 WCF W127 0 1 A0 r R5C "ErrorOut" WDB W128 0 1 A0 r R5D "ReplyBufWrAdd" W100 WAF W129 0 1 A0 r R5E "ReqPending" W12A 0 1 A0 r R5F "WriteB" W12B 0 1 A0 r R60 "PopReq" WA6 W12C 0 0 W12D 0 1 A0 r R61 "SelRamBuf" WC1 WB0 W12E 0 1 A0 r R62 "LdSyndrome" W12F 0 1 A0 r R63 "EnbCAdd" WF8 W87 W130 0 0 W1A W131 0 1 A0 r R64 "Req5" W9E WC W13 W132 0 1 A0 r R65 "TwoCycleReq" WB9 W3D W133 0 1 A0 r R66 "nReadB" W134 0 1 A0 r R67 "SelIORdData" W135 0 1 A0 r R68 "SwWrPort" W2 W5 WA W86 W136 0 1 A0 r R69 "SwRdPort" WEA W137 0 1 A0 r R6A "BReq" W138 0 1 A0 r R6B "TwoErrors" W139 0 1 A0 r R6C "PostNeedO" WF0 WFD W13A 0 1 A0 r R6D "QueueIdle" WB W12 W13B 0 1 A0 r R6E "PriorityA" W13C 0 1 A0 r R6F "FiveCycleReq" W57 WD8 W91 W13D 0 1 A0 r R70 "RefreshReq" W13E 0 1 A0 r R71 "EnStage1" W13F 0 0 WF7 W8F W140 0 0 W141 0 1 A0 r R72 "PriorityB" WDF W142 0 1 A0 r R73 "TwoReqPending" W143 0 1 A0 r R74 "Req2" WBF WE8 W18 W39 W144 0 1 A0 r R75 "SetShared" W145 2 1 A0 r R76 "WriteBufWrAdd" W146 0 0 W147 0 0 W148 0 1 A0 r R77 "Read" W93 W149 0 1 A0 r R78 "ResetStage2" W14A 0 1 A0 r R79 "AReq" W14B 0 0 WC0 W4E W14C 2 1 A0 r R7A "OutBufRdAdd" W14D 0 0 W14E 0 0 W8E WBE W14F 0 1 A0 r R7B "Post2Cycle" W150 0 1 A0 r R7C "EnStage2" WDC WCE W151 0 1 A0 r R7D "PostNeedS" WE9 W7F W11 W152 0 1 A0 r R7E "PostReq" W89 W44 W7E W111 W153 0 1 A0 r R7F "LdErrorAdd" W154 0 1 A0 r R80 "DelayDone" W155 0 1 A0 r R81 "UnldData" WA4 W156 0 1 A0 r R82 "CWSReq" W73 WB2 W157 0 1 A0 r R83 "Precharge" W19 W158 0 1 A0 r R84 "NoDataForPipe" WAE WC5 WB1 W159 0 1 A0 r R85 "ReplyBufWrEn" W4D W15A 0 1 A0 r R86 "ReadB" W15B 0 0 W15C 0 0 W6E W15D 0 1 A0 r R87 "AddressInPipe" W15E 0 1 A0 r R88 "Wr" WE5 W15F 2 1 A0 r R89 "DReq" W160 0 0 W161 0 0 W32 WF1 W162 0 1 A0 r R8A "PostCWS" W163 0 1 A0 r R8B "DGrant" W92 W112 W6A W164 0 1 A0 r R8C "EnStage3" WB6 W2C W165 0 1 A0 r R8D "ReplyIdle" W166 0 1 A0 r R8E "WrCtlReg" W8D W167 0 1 A0 r R8F "ResetErrStatus" W10F W3E W6B W168 0 1 A0 r R90 "WriteBufWrEn" W118 W169 7 0 W1 W6B W7F WB W12 W13D W118 0 C1 W0 7 0 W1 0 1 A0 r R0 W2 2 1 A0 r R1A W3 0 0 W4 0 0 W5 0 1 A0 r R1E W6 0 1 A0 r R4 W7 0 1 A0 r R7 W8 0 1 A0 r R70 W9 0 1 A0 r R52 1 A0 r R91 "RefreshCounter" R54 7 WA 21 0 W1 WB 0 0 WC 0 0 WD 9 2 A0 r R92 "Output" A9 GivenName a A9 WE 0 0 WF 0 0 W10 0 0 W11 0 0 W12 0 0 W13 0 0 W14 0 0 W15 0 0 W16 0 0 W17 0 0 W18 4 2 A0 r R93 "In" A9 a A9 WE WF W10 W11 W2 W7 W19 0 0 W8 W1A 0 3 A0 r R94 "Cout" A3 a A4 A9 a A9 W5 W1B 0 1 A3 a A4 W1C 0 0 W1D 0 1 A3 a A4 W1E 5 1 A3 a A4 W12 W13 W14 W15 W16 W1F 9 2 A0 r R95 "Input" A9 a A9 W9 W9 W9 W9 W9 W9 W9 W9 W9 W20 9 3 A0 r R96 "nOutput" A3 a A4 A9 a A9 W21 0 0 W22 0 0 W23 0 0 W24 0 0 W25 0 0 W26 0 0 W27 0 0 W28 0 0 W29 0 0 W2A 0 0 W6 W9 W2B 10 0 W1 W1 W1F W7 W20 W5 W1A WD W1 W9 0 C2 W0 10 0 W1 0 2 A0 r R0 AA PortData l agg n 0 W2 0 2 A0 r R97 "Cin" AA l agg n 0 W3 9 2 A0 r R95 AA ls agg n 0 W4 0 0 W5 0 0 W6 0 0 W7 0 0 W8 0 0 W9 0 0 WA 0 0 WB 0 0 WC 0 0 WD 0 2 A0 r R98 "Load" AA l agg n 0 WE 9 2 A0 r R96 AA ls agg d 0 WF 0 0 W10 0 0 W11 0 0 W12 0 0 W13 0 0 W14 0 0 W15 0 0 W16 0 0 W17 0 0 W18 0 2 A0 r R99 "CK" AA l agg n 0 W19 0 2 A0 r R94 AA l agg d 0 W1A 9 2 A0 r R92 AA ls agg d 0 W1B 0 0 W1C 0 0 W1D 0 0 W1E 0 0 W1F 0 0 W20 0 0 W21 0 0 W22 0 0 W23 0 0 W24 0 2 A0 r R9A "Count" AA l agg n 0 W25 0 2 A0 r R52 AA l agg n 0 4 A0 r R9B "CounterUp" AB RoseBehave r R9C "LogicCounterUp" AC CoreCutLabel lor 1 R9D "LogicMacro" AD LogForStats r R9E "CounterUp b=9" R54 6 W26 15 0 W1 W1A W24 WD W27 0 0 W28 9 0 W29 0 0 W2A 0 0 W2B 0 0 W2C 0 0 W2D 0 0 W2E 0 0 W2F 0 0 W30 0 0 W31 0 0 W3 W32 9 0 W33 0 0 W34 0 0 W35 0 0 W36 0 0 W37 0 0 W38 0 0 W39 0 0 W3A 0 0 W3B 0 0 W19 W3C 9 0 W3D 0 0 W3E 0 0 W3F 0 0 W40 0 0 W41 0 0 W42 0 0 W43 0 0 W44 0 0 W45 0 0 WE W18 W46 0 1 A0 r R9F "ncount" W2 W25 W47 6 0 W1 W32 W1A W18 WE W25 0 C3 W0 6 0 W1 0 2 A0 r R0 AA l agg n 0 W2 9 2 A0 r R95 AA ls agg n 0 W3 0 0 W4 0 0 W5 0 0 W6 0 0 W7 0 0 W8 0 0 W9 0 0 WA 0 0 WB 0 0 WC 9 2 A0 r R96 AA ls agg d 0 WD 0 0 WE 0 0 WF 0 0 W10 0 0 W11 0 0 W12 0 0 W13 0 0 W14 0 0 W15 0 0 W16 0 2 A0 r R99 AA l agg n 0 W17 9 2 A0 r R92 AA ls agg d 0 W18 0 0 W19 0 0 W1A 0 0 W1B 0 0 W1C 0 0 W1D 0 0 W1E 0 0 W1F 0 0 W20 0 0 W21 0 2 A0 r R52 AA l agg n 0 4 A0 r RA0 "RegisterSimple" AB r RA1 "LogicRegisterSimple" AC lor 1 R9D AD r RA2 "RegisterSimple b=9" RA3 "Sequence" C4 W0 6 0 W1 0 2 A9 a A9 A0 r R0 W2 0 1 A0 r R95 W3 0 1 A0 r R96 W4 0 1 A0 r R99 W5 0 1 A0 r R92 W6 0 2 A9 a A9 A0 r R52 1 A0 r RA4 "reg1BSimple" R54 1 W7 6 0 W1 W2 W3 W4 W5 W6 W8 6 0 W1 W2 W4 W5 W3 W6 0 C5 W0 6 0 W1 0 2 A0 r RA5 "Vdd" AA l agg n 0 W2 0 2 A0 r RA6 "D" AA l agg n 0 W3 0 2 A0 r RA7 "CK" AA l agg n 0 W4 0 2 A0 r RA8 "Q" AA l agg d 0 W5 0 2 A0 r RA9 "NQ" AA l agg d 0 W6 0 2 A0 r RAA "Gnd" AA l agg n 0 8 AE LichenTransistorTolerances r RAB "0.8, 0.8" A5 a AF GetLibrary A0 r RAC "ff" A10 CellArea i 532480 A11 Library r RAD "SCLibCMOSBMask" AB r RAE "LogicFlipFlop" AC lor 1 RAF "Logic" AD r RB0 "FlipFlop" R54 24 W7 16 0 W1 W8 0 0 W9 0 0 W4 WA 0 0 WB 0 1 A0 r RB1 "slave" WC 0 0 WD 0 0 WE 0 1 A0 r RB2 "C" WF 0 1 A0 r RB3 "nC" W5 W2 W10 0 0 W11 0 1 A0 r RB4 "master" W3 W6 W12 4 0 W5 W4 W1 W1 0 C6 W0 4 0 W1 0 2 A0 r RB5 "gate" A9 a A9 W2 0 2 A0 r RB6 "ch2" A9 a A9 W3 0 2 A0 r RB7 "ch1" A9 a A9 W4 0 2 A0 r RA5 A9 a A9 1 A0 r RB8 "p50" R54 1 W5 4 0 W1 W2 W3 W4 W6 4 0 W1 W3 W2 W4 0 C7 W0 4 0 W1 0 1 A0 r RB5 W2 0 1 A0 r RB7 W3 0 1 A0 r RB6 W4 0 1 A0 r RA5 2 A12 CoreTransistorWidth i 50 A13 CoreTransistorLength i 2 RB9 "Transistor" pE W13 3 0 W6 W5 W4 0 C8 W0 3 0 W1 0 2 A0 r RB6 A9 a A9 W2 0 2 A0 r RB5 A9 a A9 W3 0 2 A0 r RB7 A9 a A9 1 A0 r RBA "n24" R54 1 W4 3 0 W3 W2 W1 W5 3 0 W2 W3 W1 0 C9 W0 3 0 W1 0 1 A0 r RB5 W2 0 1 A0 r RB7 W3 0 1 A0 r RB6 2 A12 i 24 A13 i 2 RB9 nE W14 4 0 WB W5 W1 W1 0 C6 W15 3 0 W6 WB W5 0 C8 W16 4 0 WC W1 WB W1 0 CA W0 4 0 W1 0 1 A0 r RB5 W2 0 1 A0 r RB7 W3 0 1 A0 r RB6 W4 0 1 A0 r RA5 3 A14 RoseTransistorSize dw A12 i 3 A13 i 4 RB9 pE W17 4 0 WF WA WB W1 0 C6 W18 4 0 WF W1 WE W1 0 CB W0 4 0 W1 0 1 A0 r RB5 W2 0 1 A0 r RB7 W3 0 1 A0 r RB6 W4 0 1 A0 r RA5 2 A12 i 16 A13 i 2 RB9 pE W19 3 0 WC WB W6 0 CC W0 3 0 W1 0 1 A0 r RB5 W2 0 1 A0 r RB7 W3 0 1 A0 r RB6 3 A14 dw A12 i 3 A13 i 4 RB9 nE W1A 4 0 WB W1 WC W1 0 CD W0 4 0 W1 0 1 A0 r RB5 W2 0 1 A0 r RB7 W3 0 1 A0 r RB6 W4 0 1 A0 r RA5 3 A14 dw A12 i 3 A13 i 2 RB9 pE W1B 3 0 WB WE W10 0 C8 W1C 4 0 W11 WA W1 W1 0 C6 W1D 3 0 WF WE W6 0 CE W0 3 0 W1 0 1 A0 r RB5 W2 0 1 A0 r RB7 W3 0 1 A0 r RB6 2 A12 i 8 A13 i 2 RB9 nE W1E 3 0 WB WC W6 0 CF W0 3 0 W1 0 1 A0 r RB5 W2 0 1 A0 r RB7 W3 0 1 A0 r RB6 3 A14 dw A12 i 3 A13 i 2 RB9 nE W1F 3 0 W6 W11 W10 0 C8 W20 4 0 W3 W1 WF W1 0 CB W21 3 0 W3 WF W6 0 CE W22 4 0 W9 W1 W11 W1 0 C10 W0 4 0 W1 0 1 A0 r RB5 W2 0 1 A0 r RB7 W3 0 1 A0 r RB6 W4 0 1 A0 r RA5 3 A14 dw A12 i 3 A13 i 4 RB9 pE W23 3 0 W9 W11 W6 0 C11 W0 3 0 W1 0 1 A0 r RB5 W2 0 1 A0 r RB7 W3 0 1 A0 r RB6 3 A14 dw A12 i 3 A13 i 4 RB9 nE W24 4 0 WE WD W11 W1 0 C6 W25 4 0 W11 W1 W9 W1 0 C12 W0 4 0 W1 0 1 A0 r RB5 W2 0 1 A0 r RB7 W3 0 1 A0 r RB6 W4 0 1 A0 r RA5 3 A14 dw A12 i 3 A13 i 2 RB9 pE W26 3 0 W11 WF W8 0 C8 W27 4 0 W2 WD W1 W1 0 C6 W28 3 0 W11 W9 W6 0 C13 W0 3 0 W1 0 1 A0 r RB5 W2 0 1 A0 r RB7 W3 0 1 A0 r RB6 3 A14 dw A12 i 3 A13 i 2 RB9 nE W29 3 0 W6 W2 W8 0 C8 9 3 1 4 2 -1 W48 6 0 W1 W3C WD W32 W3 W25 0 C14 W0 6 0 W1 0 2 A0 r R0 AA l agg n 0 W2 9 2 A0 r RBB "In0" AA ls agg n 0 W3 0 0 W4 0 0 W5 0 0 W6 0 0 W7 0 0 W8 0 0 W9 0 0 WA 0 0 WB 0 0 WC 0 2 A0 r RBC "Select" AA l agg n 0 WD 9 2 A0 r RBD "nOut" AA ls agg d 0 WE 0 0 WF 0 0 W10 0 0 W11 0 0 W12 0 0 W13 0 0 W14 0 0 W15 0 0 W16 0 0 W17 9 2 A0 r RBE "In1" AA ls agg n 0 W18 0 0 W19 0 0 W1A 0 0 W1B 0 0 W1C 0 0 W1D 0 0 W1E 0 0 W1F 0 0 W20 0 0 W21 0 2 A0 r R52 AA l agg n 0 4 A0 r RBF "invMux2b" AB r RC0 "LogicInvMux" AC lor 1 R9D AD r RC1 "InvMux b=9" R54 2 W22 8 0 W1 W23 0 1 A0 r RC2 "NEN" WD WC W24 0 1 A0 r RC3 "EN" W2 W17 W21 W25 7 0 W1 W23 WD W17 W2 W24 W21 0 C15 W0 7 0 W1 0 2 A0 r R0 A9 a A9 W2 0 2 A0 r RC4 "A" A9 a A9 W3 9 3 A0 r RC5 "X" A15 Sequence a A15 A9 a A9 W4 0 0 W5 0 0 W6 0 0 W7 0 0 W8 0 0 W9 0 0 WA 0 0 WB 0 0 WC 0 0 WD 9 3 A0 r RB2 A15 a A15 A9 a A9 WE 0 0 WF 0 0 W10 0 0 W11 0 0 W12 0 0 W13 0 0 W14 0 0 W15 0 0 W16 0 0 W17 9 3 A0 r RC6 "B" A15 a A15 A9 a A9 W18 0 0 W19 0 0 W1A 0 0 W1B 0 0 W1C 0 0 W1D 0 0 W1E 0 0 W1F 0 0 W20 0 0 W21 0 2 A0 r RA6 A9 a A9 W22 0 2 A0 r R52 A9 a A9 1 A0 r RC7 "a22o2iSeq" RA3 C16 W0 7 0 W1 0 3 A0 r RA5 A16 RoseFixedWire H AA l agg n 0 W2 0 3 A0 r RC4 A17 PortTesterDrive b agg f 0 AA l agg n 0 W3 0 4 A0 r RC5 A17 b agg e 0 AA l agg d 0 A18 Output r RC8 "~(A*B+C*D)" W4 0 3 A0 r RB2 A17 b agg f 0 AA l agg n 0 W5 0 3 A0 r RC6 A17 b agg f 0 AA l agg n 0 W6 0 3 A0 r RA6 A17 b agg f 0 AA l agg n 0 W7 0 3 A0 r RAA A16 L AA l agg n 0 9 AE r RAB A5 a AF A0 r RC9 "a22o2i" AC lor 2 RCA "LogicMacro" RCB "Logic" A10 i 266240 AB r RCC "Combinatorial" A19 Combinatorial rb 1 A11 r RAD AD r RCD "A22o2i" R54 8 W8 10 0 W1 W2 W9 0 0 WA 0 0 WB 0 0 W3 W5 W6 W4 W7 WC 4 0 W5 WB W1 W1 0 C6 WD 4 0 W6 W3 WB W1 0 C6 WE 3 0 WA W6 W3 0 C8 WF 4 0 W2 WB W1 W1 0 C6 W10 3 0 W7 W4 WA 0 C8 W11 4 0 W4 W3 WB W1 0 C6 W12 3 0 W9 W2 W3 0 C8 W13 3 0 W7 W5 W9 0 C8 9 3 2 3 4 0 W26 5 0 W1 W24 WC W23 W21 0 C17 W0 5 0 W1 0 2 A0 r R0 AA l agg n 0 W2 0 2 A0 r RCE "X" AA l agg d 0 W3 0 2 A0 r RCF "I" AA l agg n 0 W4 0 2 A0 r RD0 "nX" AA l agg d 0 W5 0 2 A0 r R52 AA l agg n 0 4 A0 r RD1 "symDriver" AB r RD2 "LogicSymDriver" AC lor 1 R9D AD r RD3 "SymDriver d=9" R54 2 W6 5 0 W1 W4 W3 W2 W5 W7 4 0 W1 W2 W4 W5 0 C18 W0 4 0 W1 0 2 A0 r RA5 AA l agg n 0 W2 0 2 A0 r RD4 "I" AA l agg n 0 W3 0 2 A0 r RC5 AA l agg d 0 W4 0 2 A0 r RAA AA l agg n 0 4 A0 r RD5 "Buffer" AB r RD6 "LogicInv" AC lor 1 RAF AD r RD7 "Buffer d=3" RA3 C19 W0 4 0 W1 0 3 A0 r RA5 A16 H AA l agg n 0 W2 0 3 A0 r RD4 A17 b agg f 0 AA l agg n 0 W3 0 4 A0 r RC5 A17 b agg e 0 AA l agg d 0 A18 r RD8 "~I" W4 0 3 A0 r RAA A16 L AA l agg n 0 9 AE r RAB A0 r RD9 "invBuffer" A5 a AF AC lor 2 RCA RCB A10 i 159744 AB r RCC A19 rb 1 A11 r RAD AD r RDA "InvB" R54 2 W5 4 0 W1 W3 W2 W4 W6 4 0 W2 W1 W3 W1 0 C1A W0 4 0 W1 0 1 A0 r RB5 W2 0 1 A0 r RB7 W3 0 1 A0 r RB6 W4 0 1 A0 r RA5 2 A12 i 100 A13 i 2 RB9 pE W7 3 0 W2 W3 W4 0 C1B W0 3 0 W1 0 1 A0 r RB5 W2 0 1 A0 r RB7 W3 0 1 A0 r RB6 2 A12 i 48 A13 i 2 RB9 nE 2 -1 -1 W8 4 0 W1 W2 W3 W5 0 C1C W0 4 0 W1 0 2 A0 r R0 AA l agg n 0 W2 0 2 A0 r RCE AA l agg d 0 W3 0 2 A0 r RCF AA l agg n 0 W4 0 2 A0 r R52 AA l agg n 0 4 A0 r RDB "driver" AD r RDC "Driver d=10" AC lor 3 R9D R9D R9D AB r RDD "LogicDriver" R54 2 W5 5 0 W1 W2 W6 0 0 W3 W4 W7 4 0 W1 W6 W2 W4 0 C18 W8 4 0 W1 W3 W6 W4 0 C1D W0 4 0 W1 0 2 A0 r RA5 AA l agg n 0 W2 0 2 A0 r RD4 AA l agg n 0 W3 0 2 A0 r RC5 AA l agg d 0 W4 0 2 A0 r RAA AA l agg n 0 4 A0 r RD5 AB r RD6 AC lor 1 RAF AD r RDE "Buffer d=2" RA3 C19 1 -1 -1 W49 6 0 W1 W25 W1A W28 W19 W2 0 C1E W0 6 0 W1 0 1 A0 r RDF "Vdd" W2 0 1 A0 r RE0 "Gnd" W3 9 1 A0 r RE1 "PIn" W4 0 0 W5 0 0 W6 0 0 W7 0 0 W8 0 0 W9 0 0 WA 0 0 WB 0 0 WC 0 0 WD 9 1 A0 r RE2 "nCOut" WE 0 0 WF 0 0 W10 0 0 W11 0 0 W12 0 0 W13 0 0 W14 0 0 W15 0 0 W16 0 0 W17 0 1 A0 r RE3 "COut" W18 0 1 A0 r RE4 "CIn" 2 A0 r RE5 "CLP9" AD r RE6 "CounterCLG n=9" R54 11 W19 12 0 W1 W2 W3 WD W17 W18 W1A 2 0 W1B 0 0 W1C 0 0 W1D 2 0 W1E 0 0 W1F 0 0 W20 3 0 W21 0 0 W22 0 0 W23 0 0 W24 3 0 W25 0 0 W26 0 0 W27 0 0 W28 5 0 W29 0 0 W2A 0 0 W2B 0 0 W2C 0 0 W2D 0 0 W2E 5 0 W2F 0 0 W30 0 0 W31 0 0 W32 0 0 W33 0 0 W34 7 0 W1 W1D W18 W1A W2 W17 W2 0 C1F W0 7 0 W1 0 1 A0 r R0 W2 2 1 A0 r RE7 "COut" W3 0 0 W4 0 0 W5 0 1 A0 r RE8 "CIn" W6 2 1 A0 r RE9 "PIn" W7 0 0 W8 0 0 W9 0 1 A0 r REA "Force" WA 0 1 A0 r REB "COutX" WB 0 1 A0 r R52 1 A0 r REC "counterCLP2NL" R54 4 WC 8 0 W1 W5 WD 0 0 W2 WA W6 W9 WB WE 4 0 W1 W9 W4 WB 0 C20 W0 4 0 W1 0 3 A0 r RA5 A16 H AA l agg n 0 W2 0 3 A0 r RD4 A17 b agg f 0 AA l agg n 0 W3 0 4 A0 r RC5 A17 b agg e 0 AA l agg d 0 A18 r RD8 W4 0 3 A0 r RAA A16 L AA l agg n 0 9 AE r RAB A5 a AF A0 r RED "inv" AC lor 2 RCA RCB A10 i 106496 AB r RCC A19 rb 1 A11 r RAD AD r REE "Inv" R54 2 W5 4 0 W1 W2 W3 W4 W6 4 0 W2 W3 W1 W1 0 C6 W7 3 0 W4 W2 W3 0 C8 WF 4 0 W1 W8 W3 WB 0 C20 W10 5 0 W1 WD W7 W8 WB 0 C21 W0 5 0 W1 0 2 A9 a A9 A0 r R0 W2 0 1 A0 r RCE W3 0 1 A0 r REF "I-B" W4 0 1 A0 r RF0 "I-A" W5 0 2 A9 a A9 A0 r R52 1 A0 r RF1 "nor2" R54 1 W6 4 0 W1 W7 2 2 A0 r RF2 "I" A9 a A9 W4 W3 W2 W5 W8 4 0 W1 W5 W7 W2 0 C22 W0 4 0 W1 0 1 A0 r RF3 "Vdd" W2 0 1 A0 r RF4 "Gnd" W3 2 1 A0 r RF2 W4 0 0 W5 0 0 W6 0 1 A0 r RF5 "X" 2 A0 r RF6 "Nor2" AD r RF7 "Nor n=2" R54 1 W0 W7 5 0 W1 W5 W6 W4 W2 0 C23 W0 5 0 W1 0 3 A0 r RA5 A16 H AA l agg n 0 W2 0 3 A0 r RF8 "I-B" A17 b agg f 0 AA l agg n 0 W3 0 4 A0 r RC5 A17 b agg e 0 AA l agg d 0 A18 r RF9 "~(I-A + I-B)" W4 0 3 A0 r RFA "I-A" A17 b agg f 0 AA l agg n 0 W5 0 3 A0 r RAA A16 L AA l agg n 0 8 AE r RAB A0 r RFB "nor2" A5 a AF AC lor 2 RCA RCB A10 i 159744 AB r RCC A19 rb 1 A11 r RAD R54 4 W6 6 0 W1 W3 W4 W2 W7 0 0 W5 W8 4 0 W4 W7 W1 W1 0 C6 W9 3 0 W5 W2 W3 0 C8 WA 4 0 W2 W3 W7 W1 0 C6 WB 3 0 W5 W4 W3 0 C8 W11 5 0 W1 WD W5 WA WB 0 C24 W0 5 0 W1 0 2 A9 a A9 A0 r R0 W2 0 1 A0 r REF W3 0 1 A0 r RF0 W4 0 1 A0 r RCE W5 0 2 A9 a A9 A0 r R52 1 A0 r RFC "and2" R54 1 W6 4 0 W1 W4 W7 2 2 A0 r RF2 A9 a A9 W3 W2 W5 W8 4 0 W1 W5 W7 W4 0 C25 W0 4 0 W1 0 1 A0 r RFD "Vdd" W2 0 1 A0 r RFE "Gnd" W3 2 1 A0 r RF2 W4 0 0 W5 0 0 W6 0 1 A0 r RFF "X" 2 A0 r R100 "And2" AD r R101 "And n=2" R54 1 W0 W7 5 0 W1 W6 W5 W4 W2 0 C26 W0 5 0 W1 0 3 A0 r RA5 A16 H AA l agg n 0 W2 0 4 A0 r RC5 A17 b agg e 0 AA l agg d 0 A18 r R102 "I-A * I-B" W3 0 3 A0 r RF8 A17 b agg f 0 AA l agg n 0 W4 0 3 A0 r RFA A17 b agg f 0 AA l agg n 0 W5 0 3 A0 r RAA A16 L AA l agg n 0 8 AE r RAB A0 r R103 "and2" A5 a AF AC lor 2 RCA RCB A10 i 212992 AB r RCC A19 rb 1 A11 r RAD R54 5 W6 7 0 W1 W7 0 0 W3 W2 W4 W8 0 0 W5 W9 4 0 W1 W7 W2 W5 0 C27 W0 4 0 W1 0 1 A0 r RA5 W2 0 1 A0 r RD4 W3 0 1 A0 r RC5 W4 0 1 A0 r RAA 1 A0 r R104 "inv24" R54 2 W5 4 0 W1 W3 W2 W4 W6 4 0 W2 W3 W1 W1 0 C6 W7 3 0 W4 W2 W3 0 C8 WA 4 0 W3 W7 W1 W1 0 C6 WB 4 0 W4 W7 W1 W1 0 C6 WC 3 0 W8 W3 W7 0 C8 WD 3 0 W5 W4 W8 0 C8 W35 6 0 W1 W27 W23 W1F W1C W2 1 A0 r R105 "1/2" C28 W0 6 0 W1 0 1 A0 r R0 W2 0 1 A0 r RE7 W3 0 1 A0 r RE9 W4 0 1 A0 r RE8 W5 0 1 A0 r R106 "POut" W6 0 1 A0 r R52 1 A0 r R107 "counterCLPX1" R54 2 W7 6 0 W1 W2 W3 W4 W5 W6 W8 4 0 W1 W4 W2 W6 0 C20 W9 4 0 W1 W3 W5 W6 0 C20 W36 8 0 W1 W25 W1E W26 W21 W22 W1B W2 1 A0 r R108 "0/2" C29 W0 8 0 W1 0 1 A0 r R0 W2 0 1 A0 r R109 "COut0" W3 0 1 A0 r RE8 W4 0 1 A0 r R10A "COut1" W5 0 1 A0 r R10B "PIn0" W6 0 1 A0 r R10C "PIn1" W7 0 1 A0 r R106 W8 0 1 A0 r R52 1 A0 r R10D "counterCLP2P" R54 3 W9 8 0 W1 W4 W5 W7 W6 W2 W3 W8 WA 4 0 W1 W3 W4 W8 0 C20 WB 5 0 W1 W6 W2 W3 W8 0 C2A W0 5 0 W1 0 2 A9 a A9 A0 r R0 W2 0 1 A0 r RF0 W3 0 1 A0 r RCE W4 0 1 A0 r REF W5 0 2 A9 a A9 A0 r R52 1 A0 r R10E "nand2" R54 1 W6 4 0 W1 W7 2 2 A0 r RF2 A9 a A9 W2 W4 W3 W5 W8 4 0 W1 W5 W7 W3 0 C2B W0 4 0 W1 0 1 A0 r R10F "Vdd" W2 0 1 A0 r R110 "Gnd" W3 2 1 A0 r RF2 W4 0 0 W5 0 0 W6 0 1 A0 r R111 "X" 2 A0 r R112 "Nand2" AD r R113 "Nand n=2" R54 1 W0 W7 5 0 W1 W6 W4 W5 W2 0 C2C W0 5 0 W1 0 3 A0 r RA5 A16 H AA l agg n 0 W2 0 4 A0 r RC5 A17 b agg e 0 AA l agg d 0 A18 r R114 "~(I-A * I-B)" W3 0 3 A0 r RFA A17 b agg f 0 AA l agg n 0 W4 0 3 A0 r RF8 A17 b agg f 0 AA l agg n 0 W5 0 3 A0 r RAA A16 L AA l agg n 0 8 AE r RAB A0 r R115 "nand2" A5 a AF AC lor 2 RCA RCB A10 i 159744 AB r RCC A19 rb 1 A11 r RAD R54 4 W6 6 0 W1 W4 W2 W3 W7 0 0 W5 W8 4 0 W4 W2 W1 W1 0 C6 W9 4 0 W3 W2 W1 W1 0 C6 WA 3 0 W7 W4 W2 0 C8 WB 3 0 W5 W3 W7 0 C8 WC 5 0 W1 W6 W7 W5 W8 0 C2A W37 6 0 W1 W33 W2D W27 W23 W2 1 A0 r R116 "2/3" C28 W38 8 0 W1 W2C W2B W32 W22 W26 W31 W2 1 A0 r R117 "1/3" C2D W0 8 0 W1 0 1 A0 r R0 W2 0 1 A0 r R10C W3 0 1 A0 r R10B W4 0 1 A0 r R10A W5 0 1 A0 r R106 W6 0 1 A0 r RE8 W7 0 1 A0 r R109 W8 0 1 A0 r R52 1 A0 r R118 "counterCLP2N" R54 3 W9 8 0 W1 W5 W3 W4 W7 W6 W2 W8 WA 4 0 W1 W6 W4 W8 0 C20 WB 5 0 W1 W7 W6 W2 W8 0 C21 WC 5 0 W1 W5 W3 W2 W8 0 C21 W39 8 0 W1 W2A W29 W30 W21 W25 W2F W2 1 A0 r R119 "0/3" C2D W3A 6 0 W1 W16 WC W33 W2D W2 1 A0 r R11A "4/5" C28 W3B 8 0 W1 W14 W32 W15 WA WB W2C W2 1 A0 r R11B "3/5" C29 W3C 8 0 W1 W12 W31 W13 W8 W9 W2B W2 1 A0 r R11C "2/5" C29 W3D 8 0 W1 W10 W30 W11 W6 W7 W2A W2 1 A0 r R11D "1/5" C29 W3E 8 0 W1 WE W2F WF W4 W5 W29 W2 1 A0 r R11E "0/5" C29 W4A 6 0 W1 W3C W46 W28 WE W25 0 C2E W0 6 0 W1 0 2 A0 r R0 A9 a A9 W2 9 3 A0 r RC5 A15 a A15 A9 a A9 W3 0 0 W4 0 0 W5 0 0 W6 0 0 W7 0 0 W8 0 0 W9 0 0 WA 0 0 WB 0 0 WC 0 0 WD 9 3 A0 r RF0 A15 a A15 A9 a A9 WE 0 0 WF 0 0 W10 0 0 W11 0 0 W12 0 0 W13 0 0 W14 0 0 W15 0 0 W16 0 0 W17 9 1 A15 a A15 W18 0 0 W19 0 0 W1A 0 0 W1B 0 0 W1C 0 0 W1D 0 0 W1E 0 0 W1F 0 0 W20 0 0 W21 0 2 A0 r R52 A9 a A9 1 A0 r R11F "" RA3 C2F W0 6 0 W1 0 1 A0 r R0 W2 0 2 A0 r RC5 A9 a A9 W3 0 0 W4 0 2 A0 r RF0 A9 a A9 W5 0 0 W6 0 1 A0 r R52 1 A0 r R11F R54 2 W7 7 0 W1 W2 W3 W4 W5 W8 0 0 W6 W9 5 0 W1 W5 W2 W8 W6 0 C30 W0 5 0 W1 0 3 A0 r RA5 A16 H AA l agg n 0 W2 0 3 A0 r RF8 A17 b agg f 0 AA l agg n 0 W3 0 4 A0 r RC5 A17 b agg e 0 AA l agg d 0 A18 r R120 "(I-A*I-B)+(~I-A*~I-B)" W4 0 3 A0 r RFA A17 b agg f 0 AA l agg n 0 W5 0 3 A0 r RAA A16 L AA l agg n 0 9 AE r RAB A5 a AF A0 r R121 "xnor2" AC lor 2 RCA RCB A10 i 319488 AB r RCC A19 rb 1 A11 r RAD AD r R122 "Xnor2" R54 10 W6 9 0 W1 W4 W7 0 0 W8 0 0 W3 W9 0 0 W2 WA 0 0 W5 WB 4 0 W9 W3 W1 W1 0 C6 WC 3 0 W8 W4 W3 0 C8 WD 4 0 W2 WA W1 W1 0 C6 WE 4 0 W4 W3 WA W1 0 C6 WF 4 0 W2 W9 W1 W1 0 C6 W10 3 0 W8 W2 W3 0 C8 W11 3 0 W5 W9 W8 0 C8 W12 4 0 W4 W9 W1 W1 0 C6 W13 3 0 W7 W2 W9 0 C8 W14 3 0 W5 W4 W7 0 C8 WA 5 0 W1 W8 W3 W4 W6 0 C21 9 3 1 3 4 0 W4B 4 0 W1 W46 W27 W25 0 C1C W4C 5 0 W1 W2 W27 W24 W25 0 C2A W2C 5 0 W1 W1C W19 WB W9 0 C21 W2D 8 0 W1 W5 W1C W8 W1B W2A W8 W9 0 C31 W0 8 0 W1 0 1 A0 r R0 W2 0 1 A0 r R99 W3 0 1 A0 r R123 "p" W4 0 1 A0 r R124 "D" W5 0 1 A0 r R125 "NQ" W6 0 1 A0 r R126 "r" W7 0 1 A0 r R127 "Q" W8 0 1 A0 r R52 1 A0 r R128 "ffRP" R54 3 W9 10 0 W1 WA 0 0 W4 W5 W7 WB 0 0 W3 W2 W6 W8 WC 6 0 W1 WA W2 W5 W7 W8 0 C5 WD 7 0 W1 W4 WA W3 WB WB W8 0 C16 WE 4 0 W1 W6 WB W8 0 C20 W2E 5 0 W1 W6 W7 W2A W9 0 C32 W0 5 0 W1 0 2 A9 a A9 A0 r R0 W2 0 1 A0 r RF0 W3 0 1 A0 r REF W4 0 1 A0 r RCE W5 0 2 A9 a A9 A0 r R52 1 A0 r R129 "or2" R54 1 W6 4 0 W1 W7 2 2 A0 r RF2 A9 a A9 W2 W3 W4 W5 W8 4 0 W1 W5 W7 W4 0 C33 W0 4 0 W1 0 1 A0 r R12A "Vdd" W2 0 1 A0 r R12B "Gnd" W3 2 1 A0 r RF2 W4 0 0 W5 0 0 W6 0 1 A0 r R12C "X" 2 A0 r R12D "Or2" AD r R12E "Or n=2" R54 1 W0 W7 5 0 W1 W4 W6 W5 W2 0 C34 W0 5 0 W1 0 3 A0 r RA5 A16 H AA l agg n 0 W2 0 3 A0 r RFA A17 b agg f 0 AA l agg n 0 W3 0 4 A0 r RC5 A17 b agg e 0 AA l agg d 0 A18 r R12F "I-A + I-B" W4 0 3 A0 r RF8 A17 b agg f 0 AA l agg n 0 W5 0 3 A0 r RAA A16 L AA l agg n 0 8 AE r RAB A0 r R130 "or2" A5 a AF AC lor 2 RCA RCB A10 i 212992 AB r RCC A19 rb 1 A11 r RAD R54 5 W6 7 0 W1 W7 0 0 W4 W2 W8 0 0 W3 W5 W9 4 0 W1 W8 W3 W5 0 C27 WA 4 0 W2 W7 W1 W1 0 C6 WB 3 0 W5 W4 W8 0 C8 WC 4 0 W4 W8 W7 W1 0 C6 WD 3 0 W5 W2 W8 0 C8 W2F 7 0 W1 W17 W7 W5 W19 W1D W9 0 C35 W0 7 0 W1 0 1 A0 r R0 W2 0 1 A0 r R124 W3 0 1 A0 r R126 W4 0 1 A0 r R99 W5 0 1 A0 r R127 W6 0 1 A0 r R125 W7 0 1 A0 r R52 1 A0 r R131 "ffR" R54 3 W8 9 0 W1 W9 0 0 W3 WA 0 0 W2 W4 W6 W5 W7 WB 4 0 W1 W3 W9 W7 0 C20 WC 6 0 W1 WA W4 W6 W5 W7 0 C5 WD 5 0 W1 W9 WA W2 W7 0 C2A W30 7 0 W1 WC W7 W5 W17 WB W9 0 C35 W31 5 0 W1 W18 W2 WC W9 0 C36 W0 5 0 W1 0 1 A0 r R0 W2 4 1 A0 r R93 W3 0 0 W4 0 0 W5 0 0 W6 0 0 W7 2 1 A0 r RBC W8 0 0 W9 0 0 WA 0 1 A0 r R92 WB 0 1 A0 r R52 2 A0 r R132 "NormalizedMux41" AD r R133 "MuxN1 n=4" R54 7 WC 11 0 W1 WD 0 0 WE 0 0 WF 0 0 W10 0 0 WA W7 W11 0 0 W12 0 0 W2 WB W13 7 0 W1 WA WD W12 WF WE WB 0 C37 W0 7 0 W1 0 2 A9 a A9 A0 r R0 W2 0 1 A0 r RCE W3 0 1 A0 r RF0 W4 0 1 A0 r R134 "I-C" W5 0 1 A0 r R135 "I-D" W6 0 1 A0 r REF W7 0 2 A9 a A9 A0 r R52 1 A0 r R136 "nand4" R54 1 W8 4 0 W1 W9 4 2 A0 r RF2 A9 a A9 W3 W6 W4 W5 W2 W7 WA 4 0 W1 W7 W9 W2 0 C38 W0 4 0 W1 0 1 A0 r R137 "Vdd" W2 0 1 A0 r R138 "Gnd" W3 4 1 A0 r RF2 W4 0 0 W5 0 0 W6 0 0 W7 0 0 W8 0 1 A0 r R139 "X" 2 A0 r R13A "Nand4" AD r R13B "Nand n=4" R54 1 W0 W9 7 0 W1 W7 W6 W8 W4 W5 W2 0 C39 W0 7 0 W1 0 3 A0 r RA5 A16 H AA l agg n 0 W2 0 3 A0 r R13C "I-D" A17 b agg f 0 AA l agg n 0 W3 0 3 A0 r R13D "I-C" A17 b agg f 0 AA l agg n 0 W4 0 4 A0 r RC5 A17 b agg e 0 AA l agg d 0 A18 r R13E "~(I-A * I-B * I-C * I-D)" W5 0 3 A0 r RFA A17 b agg f 0 AA l agg n 0 W6 0 3 A0 r RF8 A17 b agg f 0 AA l agg n 0 W7 0 3 A0 r RAA A16 L AA l agg n 0 8 AE r RAB A0 r R13F "nand4" A5 a AF AC lor 2 RCA RCB A10 i 266240 AB r RCC A19 rb 1 A11 r RAD R54 8 W8 10 0 W1 W6 W9 0 0 WA 0 0 W4 W5 W2 WB 0 0 W3 W7 WC 4 0 W5 W4 W1 W1 0 C6 WD 3 0 WB W2 W4 0 C8 WE 4 0 W6 W4 W1 W1 0 C6 WF 3 0 WA W3 WB 0 C8 W10 4 0 W3 W4 W1 W1 0 C6 W11 3 0 W9 W6 WA 0 C8 W12 4 0 W2 W4 W1 W1 0 C6 W13 3 0 W7 W5 W9 0 C8 W14 6 0 W1 W3 WD W10 W11 WB 0 C3A W0 6 0 W1 0 2 A9 a A9 A0 r R0 W2 0 1 A0 r R134 W3 0 1 A0 r RCE W4 0 1 A0 r REF W5 0 1 A0 r RF0 W6 0 2 A9 a A9 A0 r R52 1 A0 r R140 "nand3" R54 1 W7 4 0 W1 W3 W8 3 2 A0 r RF2 A9 a A9 W5 W4 W2 W6 W9 4 0 W1 W6 W8 W3 0 C3B W0 4 0 W1 0 1 A0 r R141 "Vdd" W2 0 1 A0 r R142 "Gnd" W3 3 1 A0 r RF2 W4 0 0 W5 0 0 W6 0 0 W7 0 1 A0 r R143 "X" 2 A0 r R144 "Nand3" AD r R145 "Nand n=3" R54 1 W0 W8 6 0 W1 W5 W4 W7 W6 W2 0 C3C W0 6 0 W1 0 3 A0 r RA5 A16 H AA l agg n 0 W2 0 3 A0 r RF8 A17 b agg f 0 AA l agg n 0 W3 0 3 A0 r RFA A17 b agg f 0 AA l agg n 0 W4 0 4 A0 r RC5 A17 b agg e 0 AA l agg d 0 A18 r R146 "~(I-A * I-B * I-C)" W5 0 3 A0 r R13D A17 b agg f 0 AA l agg n 0 W6 0 3 A0 r RAA A16 L AA l agg n 0 8 AE r RAB A0 r R147 "nand3" A5 a AF AC lor 2 RCA RCB A10 i 212992 AB r RCC A19 rb 1 A11 r RAD R54 6 W7 8 0 W1 W2 W8 0 0 W3 W4 W9 0 0 W5 W6 WA 4 0 W3 W4 W1 W1 0 C6 WB 4 0 W2 W4 W1 W1 0 C6 WC 4 0 W5 W4 W1 W1 0 C6 WD 3 0 W8 W5 W4 0 C8 WE 3 0 W9 W2 W8 0 C8 WF 3 0 W6 W3 W9 0 C8 W15 6 0 W1 W4 WE W10 W9 WB 0 C3A W16 6 0 W1 W5 W12 W8 W11 WB 0 C3A W17 6 0 W1 W6 WF W8 W9 WB 0 C3A W18 4 0 W1 W9 W11 WB 0 C20 W19 4 0 W1 W8 W10 WB 0 C20 W16A 16 0 W1 W1D WB W11D W12 W7F W3E W154 W157 W3D W139 WA5 W80 W98 W148 W118 0 C3D W0 16 0 W1 0 1 A0 r R0 W2 5 1 A0 r RC W3 0 0 W4 0 0 W5 0 0 W6 0 0 W7 0 0 W8 0 1 A0 r R4 W9 5 1 A0 r R57 WA 0 0 WB 0 0 WC 0 0 WD 0 0 WE 0 0 WF 0 1 A0 r R7 W10 0 1 A0 r R1E W11 5 1 A0 r R14 W12 0 0 W13 0 0 W14 0 0 W15 0 0 W16 0 0 W17 0 1 A0 r R80 W18 0 1 A0 r R83 W19 0 1 A0 r R148 "Write" W1A 0 1 A0 r R149 "GrantDly" W1B 0 1 A0 r R14A "StartA" W1C 5 1 A0 r R1F W1D 0 0 W1E 0 0 W1F 0 0 W20 0 0 W21 0 0 W22 5 1 A0 r R2B W23 0 0 W24 0 0 W25 0 0 W26 0 0 W27 0 0 W28 0 1 A0 r R77 W29 0 1 A0 r R52 1 A0 r R14B "DlyGenerator" R54 6 W2A 17 0 W1 W2B 5 2 A0 r R14C "In" A9 a A9 W11 W2 W1C W22 W9 W1B W2C 0 1 A3 a A4 W10 WF W2D 5 2 A0 r RBC A9 a A9 W18 W8 W19 W28 W1A W2E 0 0 W2F 0 1 A3 a A4 W30 5 3 A0 r R96 A3 a A4 A9 a A9 W31 0 0 W32 0 0 W33 0 0 W34 0 0 W35 0 0 W36 5 0 W37 0 0 W38 0 0 W39 0 0 W3A 0 0 W3B 0 0 W3C 5 3 A0 r R92 A3 a A4 A9 a A9 W3D 0 0 W3E 0 0 W3F 0 0 W40 0 0 W41 0 0 W42 0 0 W17 W43 0 0 W44 0 0 W29 W45 10 0 W1 W36 W1 W2E W1 W10 W44 W30 W3C W29 0 C3E W0 10 0 W1 0 2 A0 r R0 AA l agg n 0 W2 5 2 A0 r R95 AA ls agg n 0 W3 0 0 W4 0 0 W5 0 0 W6 0 0 W7 0 0 W8 0 2 A0 r R97 AA l agg n 0 W9 0 2 A0 r R94 AA l agg d 0 WA 0 2 A0 r R9A AA l agg n 0 WB 0 2 A0 r R99 AA l agg n 0 WC 0 2 A0 r R98 AA l agg n 0 WD 5 2 A0 r R96 AA ls agg d 0 WE 0 0 WF 0 0 W10 0 0 W11 0 0 W12 0 0 W13 5 2 A0 r R92 AA ls agg d 0 W14 0 0 W15 0 0 W16 0 0 W17 0 0 W18 0 0 W19 0 2 A0 r R52 AA l agg n 0 4 A0 r R14D "CounterUp" AB r R9C AC lor 1 R9D AD r R14E "CounterUp b=5" R54 6 W1A 15 0 W1 WD W9 W1B 5 0 W1C 0 0 W1D 0 0 W1E 0 0 W1F 0 0 W20 0 0 WA W21 0 1 A0 r R9F W22 5 0 W23 0 0 W24 0 0 W25 0 0 W26 0 0 W27 0 0 W8 W2 WC W13 WB W28 5 0 W29 0 0 W2A 0 0 W2B 0 0 W2C 0 0 W2D 0 0 W2E 0 0 W19 W2F 6 0 W1 W28 W13 WB WD W19 0 C3F W0 6 0 W1 0 2 A0 r R0 AA l agg n 0 W2 5 2 A0 r R95 AA ls agg n 0 W3 0 0 W4 0 0 W5 0 0 W6 0 0 W7 0 0 W8 5 2 A0 r R96 AA ls agg d 0 W9 0 0 WA 0 0 WB 0 0 WC 0 0 WD 0 0 WE 0 2 A0 r R99 AA l agg n 0 WF 5 2 A0 r R92 AA ls agg d 0 W10 0 0 W11 0 0 W12 0 0 W13 0 0 W14 0 0 W15 0 2 A0 r R52 AA l agg n 0 4 A0 r RA0 AB r RA1 AC lor 1 R9D AD r R14F "RegisterSimple b=5" RA3 C4 5 3 1 4 2 -1 W30 6 0 W1 WC W28 W22 W2 W19 0 C40 W0 6 0 W1 0 2 A0 r R0 AA l agg n 0 W2 0 2 A0 r RBC AA l agg n 0 W3 5 2 A0 r RBD AA ls agg d 0 W4 0 0 W5 0 0 W6 0 0 W7 0 0 W8 0 0 W9 5 2 A0 r RBB AA ls agg n 0 WA 0 0 WB 0 0 WC 0 0 WD 0 0 WE 0 0 WF 5 2 A0 r RBE AA ls agg n 0 W10 0 0 W11 0 0 W12 0 0 W13 0 0 W14 0 0 W15 0 2 A0 r R52 AA l agg n 0 4 A0 r R150 "invMux2b" AB r RC0 AC lor 1 R9D AD r R151 "InvMux b=5" R54 2 W16 8 0 W1 W17 0 1 A0 r RC2 W3 W9 W18 0 1 A0 r RC3 WF W2 W15 W19 7 0 W1 W17 W3 WF W9 W18 W15 0 C41 W0 7 0 W1 0 2 A0 r R0 A9 a A9 W2 0 2 A0 r RC4 A9 a A9 W3 5 3 A0 r RC5 A15 a A15 A9 a A9 W4 0 0 W5 0 0 W6 0 0 W7 0 0 W8 0 0 W9 5 3 A0 r RB2 A15 a A15 A9 a A9 WA 0 0 WB 0 0 WC 0 0 WD 0 0 WE 0 0 WF 5 3 A0 r RC6 A15 a A15 A9 a A9 W10 0 0 W11 0 0 W12 0 0 W13 0 0 W14 0 0 W15 0 2 A0 r RA6 A9 a A9 W16 0 2 A0 r R52 A9 a A9 1 A0 r R152 "a22o2iSeq" RA3 C16 5 3 2 3 4 0 W1A 5 0 W1 W17 W2 W18 W15 0 C42 W0 5 0 W1 0 2 A0 r R0 AA l agg n 0 W2 0 2 A0 r RD0 AA l agg d 0 W3 0 2 A0 r RCF AA l agg n 0 W4 0 2 A0 r RCE AA l agg d 0 W5 0 2 A0 r R52 AA l agg n 0 4 A0 r R153 "symDriver6" AD r R154 "SymDriver d=4" AC lor 2 R9D R9D AB r RD2 R54 2 W6 5 0 W1 W2 W3 W4 W5 W7 4 0 W1 W2 W4 W5 0 C19 W8 4 0 W1 W3 W2 W5 0 C19 W31 6 0 W1 W19 W13 W1B W9 W8 0 C43 W0 6 0 W1 0 1 A0 r R155 "Vdd" W2 0 1 A0 r R156 "Gnd" W3 5 1 A0 r RE1 W4 0 0 W5 0 0 W6 0 0 W7 0 0 W8 0 0 W9 5 1 A0 r RE2 WA 0 0 WB 0 0 WC 0 0 WD 0 0 WE 0 0 WF 0 1 A0 r R157 "COut" W10 0 1 A0 r R158 "CIn" 2 A0 r R159 "CLP5" AD r R15A "CounterCLG n=5" R54 6 W11 10 0 W1 W2 W3 W9 WF W10 W12 2 0 W13 0 0 W14 0 0 W15 2 0 W16 0 0 W17 0 0 W18 3 0 W19 0 0 W1A 0 0 W1B 0 0 W1C 3 0 W1D 0 0 W1E 0 0 W1F 0 0 W20 7 0 W1 W15 W1 W12 W10 WF W2 0 C44 W0 7 0 W1 0 1 A0 r R0 W2 2 1 A0 r RE7 W3 0 0 W4 0 0 W5 0 1 A0 r REA W6 2 1 A0 r RE9 W7 0 0 W8 0 0 W9 0 1 A0 r RE8 WA 0 1 A0 r REB WB 0 1 A0 r R52 1 A0 r R15B "counterCLP2PL" R54 3 WC 7 0 W1 W5 W6 WA W2 W9 WB WD 4 0 W1 W5 W4 WB 0 C20 WE 4 0 W1 W8 W3 WB 0 C20 WF 6 0 W1 W9 W8 W7 WA WB 0 C45 W0 6 0 W1 0 2 A9 a A9 A0 r R0 W2 0 1 A0 r RF0 W3 0 1 A0 r REF W4 0 1 A0 r R134 W5 0 1 A0 r RCE W6 0 2 A9 a A9 A0 r R52 1 A0 r R15C "and3" R54 1 W7 4 0 W1 W8 3 2 A0 r RF2 A9 a A9 W2 W3 W4 W5 W6 W9 4 0 W1 W6 W8 W5 0 C46 W0 4 0 W1 0 1 A0 r R15D "Vdd" W2 0 1 A0 r R15E "Gnd" W3 3 1 A0 r RF2 W4 0 0 W5 0 0 W6 0 0 W7 0 1 A0 r R15F "X" 2 A0 r R160 "And3" AD r R161 "And n=3" R54 1 W0 W8 6 0 W1 W5 W4 W7 W6 W2 0 C47 W0 6 0 W1 0 3 A0 r RA5 A16 H AA l agg n 0 W2 0 3 A0 r RF8 A17 b agg f 0 AA l agg n 0 W3 0 3 A0 r RFA A17 b agg f 0 AA l agg n 0 W4 0 4 A0 r RC5 A17 b agg e 0 AA l agg d 0 A18 r R162 "I-A * I-B * I-C" W5 0 3 A0 r R13D A17 b agg f 0 AA l agg n 0 W6 0 3 A0 r RAA A16 L AA l agg n 0 8 AE r RAB A0 r R163 "and3" A5 a AF AC lor 2 RCA RCB A10 i 266240 AB r RCC A19 rb 1 A11 r RAD R54 7 W7 9 0 W1 W5 W3 W4 W8 0 0 W2 W9 0 0 WA 0 0 W6 WB 4 0 W1 WA W4 W6 0 C27 WC 4 0 W3 WA W1 W1 0 C6 WD 4 0 W2 WA W1 W1 0 C6 WE 4 0 W5 WA W1 W1 0 C6 WF 3 0 W9 W5 WA 0 C8 W10 3 0 W8 W2 W9 0 C8 W11 3 0 W6 W3 W8 0 C8 W21 6 0 W1 W1F W1B W17 W14 W2 1 A0 r R164 "1/2" C28 W22 8 0 W1 W1A W19 W1E W13 W16 W1D W2 1 A0 r R165 "0/2" C2D W23 6 0 W1 WE W8 W1F W1B W2 1 A0 r R166 "2/3" C28 W24 8 0 W1 WC W1E WD W6 W7 W1A W2 1 A0 r R167 "1/3" C29 W25 8 0 W1 WA W1D WB W4 W5 W19 W2 1 A0 r R168 "0/3" C29 W32 6 0 W1 W22 W21 W1B WD W19 0 C48 W0 6 0 W1 0 2 A0 r R0 A9 a A9 W2 5 3 A0 r RC5 A15 a A15 A9 a A9 W3 0 0 W4 0 0 W5 0 0 W6 0 0 W7 0 0 W8 0 0 W9 5 3 A0 r RF0 A15 a A15 A9 a A9 WA 0 0 WB 0 0 WC 0 0 WD 0 0 WE 0 0 WF 5 1 A15 a A15 W10 0 0 W11 0 0 W12 0 0 W13 0 0 W14 0 0 W15 0 2 A0 r R52 A9 a A9 1 A0 r R11F RA3 C2F 5 3 1 3 4 0 W33 4 0 W1 W2E W21 W19 0 C49 W0 4 0 W1 0 2 A0 r R0 AA l agg n 0 W2 0 2 A0 r RCF AA l agg n 0 W3 0 2 A0 r RCE AA l agg d 0 W4 0 2 A0 r R52 AA l agg n 0 4 A0 r R169 "driver8" AD r R16A "Driver d=8" AC lor 2 R9D R9D AB r RDD R54 2 W5 5 0 W1 W2 W6 0 0 W3 W4 W7 4 0 W1 W6 W3 W4 0 C19 W8 4 0 W1 W2 W6 W4 0 C20 W34 5 0 W1 W8 W2E WA W19 0 C2A W46 5 0 W1 W2E W43 W42 W29 0 C32 W47 5 0 W1 W36 W2D W2B W29 0 C4A W0 5 0 W1 0 2 A0 r R0 AA l agg n 0 W2 5 2 A0 r R92 AA ls agg d 0 W3 0 0 W4 0 0 W5 0 0 W6 0 0 W7 0 0 W8 5 2 A0 r RBC AA ls agg n 0 W9 0 0 WA 0 0 WB 0 0 WC 0 0 WD 0 0 WE 5 1 A0 r R14C WF 5 1 AA ls agg n 0 W10 0 0 W11 0 0 W12 0 0 W13 0 0 W14 0 0 W15 5 1 AA ls agg n 0 W16 0 0 W17 0 0 W18 0 0 W19 0 0 W1A 0 0 W1B 5 1 AA ls agg n 0 W1C 0 0 W1D 0 0 W1E 0 0 W1F 0 0 W20 0 0 W21 5 1 AA ls agg n 0 W22 0 0 W23 0 0 W24 0 0 W25 0 0 W26 0 0 W27 5 1 AA ls agg n 0 W28 0 0 W29 0 0 W2A 0 0 W2B 0 0 W2C 0 0 W2D 0 2 A0 r R52 AA l agg n 0 4 A0 r R16B "MuxDLarge" AB r R16C "LogicMuxD" AC lor 1 R9D AD r R16D "MuxD n=5 b=5" R54 2 W2E 6 0 W1 W2F 5 0 W30 0 0 W31 0 0 W32 0 0 W33 0 0 W34 0 0 W2 W35 2 1 A1A DAUserIgnoreForSelection a A1B Exists WE W36 5 0 W37 5 0 W10 W16 W1C W22 W28 W38 5 0 W11 W17 W1D W23 W29 W39 5 0 W12 W18 W1E W24 W2A W3A 5 0 W13 W19 W1F W25 W2B W3B 5 0 W14 W1A W20 W26 W2C W8 W2D W3C 5 0 W1 W36 W2 W2F W2D 0 C4B W0 5 0 W1 0 2 A0 r R0 A9 a A9 W2 5 3 A0 r R93 A15 a A15 A9 a A9 W3 5 0 W4 0 0 W5 0 0 W6 0 0 W7 0 0 W8 0 0 W9 5 0 WA 0 0 WB 0 0 WC 0 0 WD 0 0 WE 0 0 WF 5 0 W10 0 0 W11 0 0 W12 0 0 W13 0 0 W14 0 0 W15 5 0 W16 0 0 W17 0 0 W18 0 0 W19 0 0 W1A 0 0 W1B 5 0 W1C 0 0 W1D 0 0 W1E 0 0 W1F 0 0 W20 0 0 W21 5 3 A0 r R92 A15 a A15 A9 a A9 W22 0 0 W23 0 0 W24 0 0 W25 0 0 W26 0 0 W27 5 2 A0 r RBC A9 a A9 W28 0 0 W29 0 0 W2A 0 0 W2B 0 0 W2C 0 0 W2D 0 2 A0 r R52 A9 a A9 1 A0 r R16E "SeqMuxDN1" RA3 C4C W0 5 0 W1 0 1 A0 r R0 W2 5 1 A0 r R93 W3 0 0 W4 0 0 W5 0 0 W6 0 0 W7 0 0 W8 0 1 A0 r R92 W9 5 1 A0 r RBC WA 0 0 WB 0 0 WC 0 0 WD 0 0 WE 0 0 WF 0 1 A0 r R52 2 A0 r R16F "muxDN1" AD r R170 "MuxDN1 n=5" R54 2 W10 6 0 W1 W8 W2 W11 0 0 W9 WF W12 4 0 W1 W11 W8 WF 0 C20 W13 5 0 W1 W11 W9 W2 WF 0 C4D W0 5 0 W1 0 2 A0 r R0 A9 a A9 W2 0 2 A0 r RCE A9 a A9 W3 5 3 A0 r R171 "EN" A15 a A15 A9 a A9 W4 0 0 W5 0 0 W6 0 0 W7 0 0 W8 0 0 W9 5 3 A0 r R172 "I" A15 a A15 A9 a A9 WA 0 0 WB 0 0 WC 0 0 WD 0 0 WE 0 0 WF 0 2 A0 r R52 A9 a A9 1 A0 r R173 "3BufferISeq" RA3 C4E W0 5 0 W1 0 1 A0 r R0 W2 0 1 A0 r RCE W3 0 1 A0 r R171 W4 0 1 A0 r R172 W5 0 1 A0 r R52 1 A0 r R174 "3BufferI" R54 2 W6 6 0 W1 W2 W4 W7 0 0 W3 W5 W8 4 0 W1 W3 W7 W5 0 C20 W9 6 0 W1 W4 W7 W3 W2 W5 0 C4F W0 6 0 W1 0 2 A0 r RA5 AA l agg n 0 W2 0 2 A0 r RD4 AA l agg n 0 W3 0 2 A0 r R175 "NEN" AA l agg n 0 W4 0 2 A0 r R176 "EN" AA l agg n 0 W5 0 2 A0 r RC5 AA l agg n 0 W6 0 2 A0 r RAA AA l agg n 0 8 AE r RAB A5 a AF A0 r R177 "tstDriver" A10 i 212992 A11 r RAD AB r R178 "LogicTstDriver" AC lor 1 RAF AD r R179 "TstDriver" R54 4 W7 8 0 W1 W2 W3 W4 W8 0 3 A9 a A9 A1C RoseWireData L cw 0 A0 r RB6 W9 0 3 A9 a A9 A1C L cw 0 A0 r RB7 W5 W6 WA 4 0 W3 W8 W5 W1 0 C6 WB 3 0 W5 W4 W9 0 C8 WC 4 0 W2 W1 W8 W1 0 C1A WD 3 0 W2 W9 W6 0 C1B 5 2 2 3 0 5 2 1 2 0 W3D 4 0 W1 W8 W2F W2D 0 C50 W0 4 0 W1 0 2 A0 r R0 A9 a A9 W2 5 3 A0 r RCF A15 a A15 A9 a A9 W3 0 0 W4 0 0 W5 0 0 W6 0 0 W7 0 0 W8 5 3 A0 r RCE A15 a A15 A9 a A9 W9 0 0 WA 0 0 WB 0 0 WC 0 0 WD 0 0 WE 0 2 A0 r R52 A9 a A9 1 A0 r R17A "MuxSelectBuffer" RA3 C49 5 2 1 2 0 W48 8 0 W1 W10 W42 W17 W2C W44 W17 W29 0 C31 W49 7 0 W1 W44 W18 W1A WF W1B W29 0 C51 W0 7 0 W1 0 2 A9 a A9 A0 r R0 W2 0 1 A0 r RCE W3 0 1 A0 r RF0 W4 0 1 A0 r REF W5 0 1 A0 r R135 W6 0 1 A0 r R134 W7 0 2 A9 a A9 A0 r R52 1 A0 r R17B "or4" R54 1 W8 4 0 W1 W2 W9 4 2 A0 r RF2 A9 a A9 W3 W4 W6 W5 W7 WA 4 0 W1 W7 W9 W2 0 C52 W0 4 0 W1 0 1 A0 r R17C "Vdd" W2 0 1 A0 r R17D "Gnd" W3 4 1 A0 r RF2 W4 0 0 W5 0 0 W6 0 0 W7 0 0 W8 0 1 A0 r R17E "X" 2 A0 r R17F "Or4" AD r R180 "Or n=4" R54 1 W0 W9 7 0 W1 W7 W6 W8 W4 W5 W2 0 C53 W0 7 0 W1 0 3 A0 r RA5 A16 H AA l agg n 0 W2 0 3 A0 r R13C A17 b agg f 0 AA l agg n 0 W3 0 3 A0 r R13D A17 b agg f 0 AA l agg n 0 W4 0 4 A0 r RC5 A17 b agg e 0 AA l agg d 0 A18 r R181 "I-A + I-B + I-C + I-D" W5 0 3 A0 r RFA A17 b agg f 0 AA l agg n 0 W6 0 3 A0 r RF8 A17 b agg f 0 AA l agg n 0 W7 0 3 A0 r RAA A16 L AA l agg n 0 8 AE r RAB A0 r R182 "or4" A5 a AF AC lor 2 RCA RCB A10 i 319488 AB r RCC A19 rb 1 A11 r RAD R54 9 W8 11 0 W1 W3 W9 0 0 WA 0 0 W2 W4 WB 0 0 W6 WC 0 0 W5 W7 WD 4 0 W5 W9 W1 W1 0 C6 WE 4 0 W6 WB W9 W1 0 C6 WF 4 0 W3 WA WB W1 0 C6 W10 4 0 W1 WC W4 W7 0 C27 W11 4 0 W2 WC WA W1 0 C6 W12 3 0 W7 W2 WC 0 C8 W13 3 0 W7 W3 WC 0 C8 W14 3 0 W7 W6 WC 0 C8 W15 3 0 W7 W5 WC 0 C8 W4A 6 0 W1 WF W10 W43 W2F W29 0 C5 W16B 19 0 W1 W161 W3D W143 W155 W13D WAF W11B WF7 W18 W13A W131 W125 W15E W92 W12F W160 W129 W118 0 C54 W0 19 0 W1 0 1 A0 r R0 W2 0 1 A0 r R183 "DReq1" W3 0 1 A0 r R148 W4 0 1 A0 r R184 "Req2" W5 0 1 A0 r R185 "UnloadFifo" W6 0 1 A0 r R186 "RefReq" W7 0 1 A0 r R187 "nWrite" W8 0 1 A0 r R55 W9 0 1 A0 r R188 "ArbHold" WA 0 1 A0 r R9 WB 0 1 A0 r R189 "QueueIdle" WC 0 1 A0 r R18A "Req5" WD 0 1 A0 r R18B "LatchCAdd" WE 0 1 A0 r R88 WF 0 1 A0 r R18C "Unload" W10 0 1 A0 r R63 W11 0 1 A0 r R18D "DReq0" W12 0 1 A0 r R18E "ReqPending" W13 0 1 A0 r R52 1 A0 r R18F "Misc" R54 15 W14 27 0 W1 W4 W15 0 0 W11 WC W16 0 0 WD W17 0 0 WA W7 W18 0 0 W3 WB W12 WF W19 0 0 W8 W1A 0 0 W2 W9 W6 W1B 0 0 WE W10 W1C 0 0 W5 W13 W1D 6 0 W1 W1A WA W5 WF W13 0 C45 W1E 5 0 W1 W6 W1A W8 W13 0 C2A W1F 5 0 W1 W10 WA WD W13 0 C24 W20 4 0 W1 W12 WB W13 0 C20 W21 5 0 W1 W19 WC W2 W13 0 C32 W22 5 0 W1 W4 WC W11 W13 0 C32 W23 5 0 W1 W19 W16 W4 W13 0 C21 W24 4 0 W1 W1B W7 W13 0 C55 W0 4 0 W1 0 2 A0 r RA5 AA l agg n 0 W2 0 2 A0 r RD4 AA l agg n 0 W3 0 2 A0 r RC5 AA l agg d 0 W4 0 2 A0 r RAA AA l agg n 0 4 A0 r RD5 AB r RD6 AC lor 1 RAF AD r R190 "Buffer d=32" RA3 C19 16 -1 -1 W25 4 0 W1 W9 W16 W13 0 C20 W26 4 0 W1 W18 W3 W13 0 C55 W27 4 0 W1 W17 W1B W13 0 C56 W0 4 0 W1 0 2 A0 r RA5 AA l agg n 0 W2 0 2 A0 r RD4 AA l agg n 0 W3 0 2 A0 r RC5 AA l agg d 0 W4 0 2 A0 r RAA AA l agg n 0 4 A0 r RD5 AB r RD6 AC lor 1 RAF AD r R191 "Buffer d=8" RA3 C19 4 -1 -1 W28 4 0 W1 W15 W18 W13 0 C56 W29 4 0 W1 WE W17 W13 0 C1D W2A 4 0 W1 W1C W15 W13 0 C1D W2B 4 0 W1 WE W1C W13 0 C20 W16C 11 0 W1 W7F W133 W135 W136 W123 W12A W15A W12 W13E W118 0 C57 W0 11 0 W1 0 1 A0 r R0 W2 0 1 A0 r R1E W3 0 1 A0 r R192 "nReadB" W4 0 1 A0 r R68 W5 0 1 A0 r R69 W6 0 1 A0 r R193 "nWriteB" W7 0 1 A0 r R5F W8 0 1 A0 r R86 W9 0 1 A0 r R7 WA 0 1 A0 r R194 "RoomInPipe" WB 0 1 A0 r R52 1 A0 r R195 "BufferControl" R54 5 WC 14 0 W1 WD 0 0 W4 WE 0 0 W9 W8 WF 0 0 W5 W2 W6 W7 WA W3 WB W10 7 0 W1 WF W9 W2 W8 W3 WB 0 C35 W11 6 0 W1 WD W3 W8 WF WB 0 C58 W0 6 0 W1 0 2 A9 a A9 A0 r R0 W2 0 1 A0 r RBC W3 0 1 A0 r RBE W4 0 1 A0 r RBB W5 0 1 A0 r R92 W6 0 2 A9 a A9 A0 r R52 1 A0 r R196 "mux21" R54 1 W7 5 0 W1 W8 1 0 W2 W9 2 2 A0 r R93 A9 a A9 W4 W3 W5 W6 WA 5 0 W1 W8 W9 W5 W6 0 C59 W0 5 0 W1 0 1 A0 r R0 W2 1 1 A0 r RBC W3 0 0 W4 2 1 A0 r R93 W5 0 0 W6 0 0 W7 0 1 A0 r R92 W8 0 1 A0 r R52 2 A0 r R197 "NormalizedMux21" AD r R198 "MuxN1 n=2" R54 3 W9 7 0 W1 WA 0 0 W2 W4 WB 0 0 W7 W8 WC 4 0 W1 WB W7 W8 0 C20 WD 7 0 W1 W5 WB W6 WA W3 W8 0 C16 WE 4 0 W1 W3 WA W8 0 C20 W12 7 0 W1 WE W9 W2 W7 W6 WB 0 C35 W13 5 0 W1 W5 WA WD WB 0 C24 W14 6 0 W1 W4 W6 W7 WE WB 0 C58 W16D 21 0 W1 WB9 WC5 W15A W7F W110 W5 W12A W128 W44 W23 WC W168 W159 WDF W14C W13 W145 WB6 W6E W118 0 C5A W0 21 0 W1 0 1 A0 r R0 W2 4 1 A0 r R36 W3 0 0 W4 0 0 W5 0 0 W6 0 0 W7 8 1 A0 r R199 "RamBufDis" W8 0 0 W9 0 0 WA 0 0 WB 0 0 WC 0 0 WD 0 0 WE 0 0 WF 0 0 W10 0 1 A0 r R19A "ReadB" W11 0 1 A0 r R1E W12 0 1 A0 r R19B "RamBufWrite" W13 4 1 A0 r R2 W14 0 0 W15 0 0 W16 0 0 W17 0 0 W18 0 1 A0 r R19C "WriteB" W19 0 1 A0 r R5D W1A 8 1 A0 r R19D "RamBufClock" W1B 0 0 W1C 0 0 W1D 0 0 W1E 0 0 W1F 0 0 W20 0 0 W21 0 0 W22 0 0 W23 8 1 A0 r R19E "RamBufEn" W24 0 0 W25 0 0 W26 0 0 W27 0 0 W28 0 0 W29 0 0 W2A 0 0 W2B 0 0 W2C 4 1 A0 r R19F "ReplyBufDis" W2D 0 0 W2E 0 0 W2F 0 0 W30 0 0 W31 0 1 A0 r R90 W32 0 1 A0 r R1A0 "ReplyBufWrEn" W33 4 1 A0 r R42 W34 0 0 W35 0 0 W36 0 0 W37 0 0 W38 2 1 A0 r R7A W39 0 0 W3A 0 0 W3B 4 1 A0 r R1A1 "ReplyBufClock" W3C 0 0 W3D 0 0 W3E 0 0 W3F 0 0 W40 2 1 A0 r R76 W41 0 0 W42 0 0 W43 2 1 A0 r R35 W44 0 0 W45 0 0 W46 4 1 A0 r R1A2 "ReplyBufEn" W47 0 0 W48 0 0 W49 0 0 W4A 0 0 W4B 0 1 A0 r R52 1 A0 r R1A3 "RAMControllers" R54 3 W4C 22 0 W1 W33 W12 W3B W2 W46 W4D 2 0 W10 W3A W4E 2 0 W18 W19 W4F 3 0 W10 W39 W3A W50 3 0 W18 W44 W45 W13 W32 W23 W31 W38 W43 W2C W11 W7 W40 W1A W4B W51 9 0 W1 W33 W40 W31 W2 W13 W11 W43 W4B 0 C5B W0 9 0 W1 0 1 A0 r R0 W2 4 1 A0 r R1A4 "RdEnb" W3 0 0 W4 0 0 W5 0 0 W6 0 0 W7 2 1 A0 r R1A5 "WrAdd" W8 0 0 W9 0 0 WA 0 1 A0 r R1A6 "WrEnb" WB 4 1 A0 r R1A7 "LdRAM" WC 0 0 WD 0 0 WE 0 0 WF 0 0 W10 4 1 A0 r R1A8 "RdDis" W11 0 0 W12 0 0 W13 0 0 W14 0 0 W15 0 1 A0 r R1E W16 2 1 A0 r R1A9 "RdAdd" W17 0 0 W18 0 0 W19 0 1 A0 r R52 1 A0 r R1AA "RAMControl" R54 8 W1A 12 0 W1 WA WB W1B 4 0 W1C 0 0 W1D 0 0 W1E 0 0 W1F 0 0 W15 W7 W10 W20 4 0 W21 0 0 W22 0 0 W23 0 0 W24 0 0 W25 4 0 W26 0 0 W27 0 0 W28 0 0 W29 0 0 W16 W2 W19 W2A 5 0 W1 WB W20 W15 W19 0 C5C W0 5 0 W1 0 2 A0 r R0 A9 a A9 W2 4 3 A0 r RCE A15 a A15 A9 a A9 W3 0 0 W4 0 0 W5 0 0 W6 0 0 W7 4 3 A0 r REF A15 a A15 A9 a A9 W8 0 0 W9 0 0 WA 0 0 WB 0 0 WC 0 2 A0 r RF0 A9 a A9 WD 0 2 A0 r R52 A9 a A9 1 A0 r R11F RA3 C21 4 2 1 2 0 W2B 5 0 W1 WB W20 W15 W19 0 C5C W2C 5 0 W1 WB W20 W15 W19 0 C5C W2D 4 0 W1 W1B W20 W19 0 C5D W0 4 0 W1 0 2 A0 r R0 A9 a A9 W2 4 3 A0 r RD4 A15 a A15 A9 a A9 W3 0 0 W4 0 0 W5 0 0 W6 0 0 W7 4 3 A0 r RC5 A15 a A15 A9 a A9 W8 0 0 W9 0 0 WA 0 0 WB 0 0 WC 0 2 A0 r R52 A9 a A9 1 A0 r R11F RA3 C20 4 2 1 2 0 W2E 4 0 W1 W25 W2 W19 0 C5E W0 4 0 W1 0 2 A0 r R0 A9 a A9 W2 4 3 A0 r RCF A15 a A15 A9 a A9 W3 0 0 W4 0 0 W5 0 0 W6 0 0 W7 4 3 A0 r RCE A15 a A15 A9 a A9 W8 0 0 W9 0 0 WA 0 0 WB 0 0 WC 0 2 A0 r R52 A9 a A9 1 A0 r R11F RA3 C49 4 2 1 2 0 W2F 5 0 W1 W19 W7 W1B WA 0 C5F W0 5 0 W1 0 2 A0 r R1AB "Vdd" AA l agg n 0 W2 0 2 A0 r R1AC "Gnd" AA l agg n 0 W3 2 2 A0 r R1AD "Address" AA ls agg n 0 W4 0 0 W5 0 0 W6 4 2 A0 r R1AE "Select" AA ls agg d 0 W7 0 0 W8 0 0 W9 0 0 WA 0 0 WB 0 2 A0 r R1AF "Enable" AA l agg n 0 4 A0 r R1B0 "Decoder" AB r R1B1 "LogicDecoder" AC lor 1 R9D AD r R1B2 "Decoder a=2 s=4" R54 3 WC 8 0 W1 W2 W3 W6 WB WD 2 1 A0 r R1B3 "nAd" WE 0 0 WF 0 0 W10 2 1 A0 r R1B4 "nnAd" W11 0 0 W12 0 0 W13 0 1 A0 r R1B5 "nEn" W14 6 0 W1 W2 WD W10 W6 W13 0 C60 W0 6 0 W1 0 1 A0 r R1B6 "Vdd" W2 0 1 A0 r R1B7 "Gnd" W3 2 1 A0 r R1B3 W4 0 0 W5 0 0 W6 2 1 A0 r R1B4 W7 0 0 W8 0 0 W9 4 1 A0 r R1AE WA 0 0 WB 0 0 WC 0 0 WD 0 0 WE 0 1 A0 r R1B8 "nEn" 1 A0 r R1B9 "DecoderBody" R54 4 WF 10 0 W1 W2 W3 W6 W9 WE W10 3 0 W4 W5 WE W11 3 0 W4 W8 WE W12 3 0 W7 W5 WE W13 3 0 W7 W8 WE W14 4 0 W1 W2 W10 WD 0 C61 W0 4 0 W1 0 1 A0 r R1BA "Vdd" W2 0 1 A0 r R1BB "Gnd" W3 3 1 A0 r RF2 W4 0 0 W5 0 0 W6 0 0 W7 0 1 A0 r R1BC "X" 2 A0 r R1BD "Nor3" AD r R1BE "Nor n=3" R54 1 W0 W8 6 0 W1 W5 W7 W4 W6 W2 0 C62 W0 6 0 W1 0 3 A0 r RA5 A16 H AA l agg n 0 W2 0 3 A0 r RF8 A17 b agg f 0 AA l agg n 0 W3 0 4 A0 r RC5 A17 b agg e 0 AA l agg d 0 A18 r R1BF "~(I-A + I-B + I-C)" W4 0 3 A0 r RFA A17 b agg f 0 AA l agg n 0 W5 0 3 A0 r R13D A17 b agg f 0 AA l agg n 0 W6 0 3 A0 r RAA A16 L AA l agg n 0 8 AE r RAB A0 r R1C0 "nor3" A5 a AF AC lor 2 RCA RCB A10 i 212992 AB r RCC A19 rb 1 A11 r RAD R54 6 W7 8 0 W1 W2 W3 W4 W5 W8 0 0 W9 0 0 W6 WA 4 0 W4 W8 W1 W1 0 C6 WB 4 0 W2 W9 W8 W1 0 C6 WC 4 0 W5 W3 W9 W1 0 C6 WD 3 0 W6 W5 W3 0 C8 WE 3 0 W6 W2 W3 0 C8 WF 3 0 W6 W4 W3 0 C8 W15 4 0 W1 W2 W11 WC 0 C61 W16 4 0 W1 W2 W12 WB 0 C61 W17 4 0 W1 W2 W13 WA 0 C61 W15 4 0 W1 W13 WB W2 0 C63 W0 4 0 W1 0 3 A9 a A9 A0 r R0 AA l agg n 0 W2 0 2 A0 r RCE AA l agg d 0 W3 0 2 A0 r RCF AA l agg n 0 W4 0 3 A9 a A9 A0 r R52 AA l agg n 0 4 A0 r R1C1 "invDriver4" AB r RD6 AC lor 1 R9D AD r R1C2 "InvDriver d=4" R54 1 W5 4 0 W1 W2 W3 W4 W6 4 0 W1 W3 W2 W4 0 C20 W16 5 0 W1 W10 WD W3 W2 0 C64 W0 5 0 W1 0 1 A0 r R0 W2 2 1 A0 r RCE W3 0 0 W4 0 0 W5 2 1 A0 r RD0 W6 0 0 W7 0 0 W8 2 1 A0 r RCF W9 0 0 WA 0 0 WB 0 1 A0 r R52 0 RA3 C65 W0 5 0 W1 0 2 A0 r R0 AA l agg n 0 W2 0 2 A0 r RCE AA l agg d 0 W3 0 2 A0 r RD0 AA l agg d 0 W4 0 2 A0 r RCF AA l agg n 0 W5 0 2 A0 r R52 AA l agg n 0 4 A0 r R1C3 "symDriver3" AD r R1C4 "SymDriver d=3" AC lor 3 R9D R9D R9D AB r RD2 R54 2 W6 5 0 W1 W3 W4 W2 W5 W7 4 0 W1 W3 W2 W5 0 C20 W8 4 0 W1 W4 W3 W5 0 C20 2 3 3 2 1 -1 W30 4 0 W1 W25 W10 W19 0 C66 W0 4 0 W1 0 2 A0 r R0 A9 a A9 W2 4 3 A0 r RCF A15 a A15 A9 a A9 W3 0 0 W4 0 0 W5 0 0 W6 0 0 W7 4 3 A0 r RCE A15 a A15 A9 a A9 W8 0 0 W9 0 0 WA 0 0 WB 0 0 WC 0 2 A0 r R52 A9 a A9 1 A0 r R11F RA3 C67 W0 4 0 W1 0 2 A0 r R0 AA l agg n 0 W2 0 2 A0 r RCF AA l agg n 0 W3 0 2 A0 r RCE AA l agg d 0 W4 0 2 A0 r R52 AA l agg n 0 4 A0 r R1C5 "invDriver" AB r RD6 AC lor 1 R9D AD r R1C6 "InvDriver d=16" R54 2 W5 5 0 W1 W2 W6 0 0 W3 W4 W7 4 0 W1 W6 W3 W4 0 C68 W0 4 0 W1 0 2 A0 r R0 AA l agg n 0 W2 0 2 A0 r RCF AA l agg n 0 W3 0 2 A0 r RCE AA l agg d 0 W4 0 2 A0 r R52 AA l agg n 0 4 A0 r R1C7 "driver" AD r R1C8 "Driver d=13" AC lor 3 R9D R9D R9D AB r RDD R54 2 W5 5 0 W1 W3 W2 W6 0 0 W4 W7 4 0 W1 W6 W3 W4 0 C69 W0 4 0 W1 0 2 A0 r RA5 AA l agg n 0 W2 0 2 A0 r RD4 AA l agg n 0 W3 0 2 A0 r RC5 AA l agg d 0 W4 0 2 A0 r RAA AA l agg n 0 4 A0 r RD5 AB r RD6 AC lor 1 RAF AD r R1C9 "Buffer d=4" RA3 C19 2 -1 -1 W8 4 0 W1 W2 W6 W4 0 C1D W8 4 0 W1 W2 W6 W4 0 C20 4 2 1 2 0 W31 4 0 W1 W19 W16 W25 0 C6A W0 4 0 W1 0 2 A0 r R1CA "Vdd" AA l agg n 0 W2 0 2 A0 r R1CB "Gnd" AA l agg n 0 W3 2 2 A0 r R1AD AA ls agg n 0 W4 0 0 W5 0 0 W6 4 2 A0 r R1AE AA ls agg d 0 W7 0 0 W8 0 0 W9 0 0 WA 0 0 4 A0 r R1CC "DecoderS" AB r R1CD "LogicDecoderS" AC lor 1 R9D AD r R1CE "DecoderS a=2 s=4" R54 2 WB 6 0 W1 W2 W3 W6 WC 2 1 A0 r R1B3 WD 0 0 WE 0 0 WF 2 1 A0 r R1B4 W10 0 0 W11 0 0 W12 5 0 W1 W2 WC WF W6 0 C6B W0 5 0 W1 0 1 A0 r R1CF "Vdd" W2 0 1 A0 r R1D0 "Gnd" W3 2 1 A0 r R1B3 W4 0 0 W5 0 0 W6 2 1 A0 r R1B4 W7 0 0 W8 0 0 W9 4 1 A0 r R1AE WA 0 0 WB 0 0 WC 0 0 WD 0 0 1 A0 r R1D1 "DecoderSBody" R54 4 WE 9 0 W1 W2 W3 W6 W9 WF 2 0 W4 W5 W10 2 0 W4 W8 W11 2 0 W7 W5 W12 2 0 W7 W8 W13 4 0 W1 W2 WF WD 0 C22 W14 4 0 W1 W2 W10 WC 0 C22 W15 4 0 W1 W2 W11 WB 0 C22 W16 4 0 W1 W2 W12 WA 0 C22 W13 5 0 W1 WF WC W3 W2 0 C6C W0 5 0 W1 0 1 A0 r R0 W2 2 1 A0 r RCE W3 0 0 W4 0 0 W5 2 1 A0 r RD0 W6 0 0 W7 0 0 W8 2 1 A0 r RCF W9 0 0 WA 0 0 WB 0 1 A0 r R52 0 RA3 C65 2 3 3 2 1 -1 W52 9 0 W1 W23 W50 W4F W7 W12 W1A W11 W4B 0 C6D W0 9 0 W1 0 1 A0 r R0 W2 8 1 A0 r R1A4 W3 0 0 W4 0 0 W5 0 0 W6 0 0 W7 0 0 W8 0 0 W9 0 0 WA 0 0 WB 3 1 A0 r R1A5 WC 0 0 WD 0 0 WE 0 0 WF 3 1 A0 r R1A9 W10 0 0 W11 0 0 W12 0 0 W13 8 1 A0 r R1A8 W14 0 0 W15 0 0 W16 0 0 W17 0 0 W18 0 0 W19 0 0 W1A 0 0 W1B 0 0 W1C 0 1 A0 r R1A6 W1D 8 1 A0 r R1A7 W1E 0 0 W1F 0 0 W20 0 0 W21 0 0 W22 0 0 W23 0 0 W24 0 0 W25 0 0 W26 0 1 A0 r R1E W27 0 1 A0 r R52 1 A0 r R1D2 "RAMControl" R54 8 W28 12 0 W1 W2 W26 W29 8 0 W2A 0 0 W2B 0 0 W2C 0 0 W2D 0 0 W2E 0 0 W2F 0 0 W30 0 0 W31 0 0 W32 8 0 W33 0 0 W34 0 0 W35 0 0 W36 0 0 W37 0 0 W38 0 0 W39 0 0 W3A 0 0 W13 WF W3B 8 0 W3C 0 0 W3D 0 0 W3E 0 0 W3F 0 0 W40 0 0 W41 0 0 W42 0 0 W43 0 0 WB W1D W1C W27 W44 5 0 W1 W1D W3B W26 W27 0 C6E W0 5 0 W1 0 2 A0 r R0 A9 a A9 W2 8 3 A0 r RCE A15 a A15 A9 a A9 W3 0 0 W4 0 0 W5 0 0 W6 0 0 W7 0 0 W8 0 0 W9 0 0 WA 0 0 WB 8 3 A0 r REF A15 a A15 A9 a A9 WC 0 0 WD 0 0 WE 0 0 WF 0 0 W10 0 0 W11 0 0 W12 0 0 W13 0 0 W14 0 2 A0 r RF0 A9 a A9 W15 0 2 A0 r R52 A9 a A9 1 A0 r R11F RA3 C21 8 2 1 2 0 W45 5 0 W1 W1D W3B W26 W27 0 C6E W46 5 0 W1 W1D W3B W26 W27 0 C6E W47 4 0 W1 W29 W3B W27 0 C6F W0 4 0 W1 0 2 A0 r R0 A9 a A9 W2 8 3 A0 r RD4 A15 a A15 A9 a A9 W3 0 0 W4 0 0 W5 0 0 W6 0 0 W7 0 0 W8 0 0 W9 0 0 WA 0 0 WB 8 3 A0 r RC5 A15 a A15 A9 a A9 WC 0 0 WD 0 0 WE 0 0 WF 0 0 W10 0 0 W11 0 0 W12 0 0 W13 0 0 W14 0 2 A0 r R52 A9 a A9 1 A0 r R11F RA3 C20 8 2 1 2 0 W48 4 0 W1 W32 W2 W27 0 C70 W0 4 0 W1 0 2 A0 r R0 A9 a A9 W2 8 3 A0 r RCF A15 a A15 A9 a A9 W3 0 0 W4 0 0 W5 0 0 W6 0 0 W7 0 0 W8 0 0 W9 0 0 WA 0 0 WB 8 3 A0 r RCE A15 a A15 A9 a A9 WC 0 0 WD 0 0 WE 0 0 WF 0 0 W10 0 0 W11 0 0 W12 0 0 W13 0 0 W14 0 2 A0 r R52 A9 a A9 1 A0 r R11F RA3 C49 8 2 1 2 0 W49 5 0 W1 W27 WB W29 W1C 0 C71 W0 5 0 W1 0 2 A0 r R1D3 "Vdd" AA l agg n 0 W2 0 2 A0 r R1D4 "Gnd" AA l agg n 0 W3 3 2 A0 r R1AD AA ls agg n 0 W4 0 0 W5 0 0 W6 0 0 W7 8 2 A0 r R1AE AA ls agg d 0 W8 0 0 W9 0 0 WA 0 0 WB 0 0 WC 0 0 WD 0 0 WE 0 0 WF 0 0 W10 0 2 A0 r R1D5 "Enable" AA l agg n 0 4 A0 r R1B0 AB r R1B1 AC lor 1 R9D AD r R1D6 "Decoder a=3 s=8" R54 3 W11 8 0 W1 W2 W3 W7 W10 W12 3 1 A0 r R1B3 W13 0 0 W14 0 0 W15 0 0 W16 3 1 A0 r R1B4 W17 0 0 W18 0 0 W19 0 0 W1A 0 1 A0 r R1D7 "nEn" W1B 6 0 W1 W2 W12 W16 W7 W1A 0 C72 W0 6 0 W1 0 1 A0 r R1D8 "Vdd" W2 0 1 A0 r R1D9 "Gnd" W3 3 1 A0 r R1B3 W4 0 0 W5 0 0 W6 0 0 W7 3 1 A0 r R1B4 W8 0 0 W9 0 0 WA 0 0 WB 8 1 A0 r R1AE WC 0 0 WD 0 0 WE 0 0 WF 0 0 W10 0 0 W11 0 0 W12 0 0 W13 0 0 W14 0 1 A0 r R1DA "nEn" 1 A0 r R1B9 R54 8 W15 14 0 W1 W2 W3 W7 WB W14 W16 4 0 W4 W5 W6 W14 W17 4 0 W4 W5 WA W14 W18 4 0 W4 W9 W6 W14 W19 4 0 W4 W9 WA W14 W1A 4 0 W8 W5 W6 W14 W1B 4 0 W8 W5 WA W14 W1C 4 0 W8 W9 W6 W14 W1D 4 0 W8 W9 WA W14 W1E 4 0 W1 W2 W16 W13 0 C73 W0 4 0 W1 0 1 A0 r R1DB "Vdd" W2 0 1 A0 r R1DC "Gnd" W3 4 1 A0 r RF2 W4 0 0 W5 0 0 W6 0 0 W7 0 0 W8 0 1 A0 r R1DD "X" 2 A0 r R1DE "Nor4" AD r R1DF "Nor n=4" R54 1 W0 W9 7 0 W1 W7 W4 W6 W5 W8 W2 0 C74 W0 7 0 W1 0 3 A0 r RA5 A16 H AA l agg n 0 W2 0 3 A0 r R13C A17 b agg f 0 AA l agg n 0 W3 0 3 A0 r RFA A17 b agg f 0 AA l agg n 0 W4 0 3 A0 r R13D A17 b agg f 0 AA l agg n 0 W5 0 3 A0 r RF8 A17 b agg f 0 AA l agg n 0 W6 0 4 A0 r RC5 A17 b agg e 0 AA l agg d 0 A18 r R1E0 "~(I-A + I-B + I-C + I-D)" W7 0 3 A0 r RAA A16 L AA l agg n 0 8 AE r RAB A0 r R1E1 "nor4" A5 a AF AC lor 2 RCA RCB A10 i 266240 AB r RCC A19 rb 1 A11 r RAD R54 8 W8 10 0 W1 W2 W9 0 0 W3 WA 0 0 W4 W5 W6 WB 0 0 W7 WC 4 0 W3 WB W1 W1 0 C6 WD 4 0 W5 W9 WB W1 0 C6 WE 4 0 W4 WA W9 W1 0 C6 WF 4 0 W2 W6 WA W1 0 C6 W10 3 0 W7 W2 W6 0 C8 W11 3 0 W7 W4 W6 0 C8 W12 3 0 W7 W5 W6 0 C8 W13 3 0 W7 W3 W6 0 C8 W1F 4 0 W1 W2 W17 W12 0 C73 W20 4 0 W1 W2 W18 W11 0 C73 W21 4 0 W1 W2 W19 W10 0 C73 W22 4 0 W1 W2 W1A WF 0 C73 W23 4 0 W1 W2 W1B WE 0 C73 W24 4 0 W1 W2 W1C WD 0 C73 W25 4 0 W1 W2 W1D WC 0 C73 W1C 4 0 W1 W10 W1A W2 0 C75 W0 4 0 W1 0 3 A9 a A9 A0 r R0 AA l agg n 0 W2 0 2 A0 r RCF AA l agg n 0 W3 0 2 A0 r RCE AA l agg d 0 W4 0 3 A9 a A9 A0 r R52 AA l agg n 0 4 A0 r R1E2 "invDriver8" AB r RD6 AC lor 1 R9D AD r R1E3 "InvDriver d=8" R54 1 W5 4 0 W1 W3 W2 W4 W6 4 0 W1 W2 W3 W4 0 C19 W1D 5 0 W1 W12 W3 W16 W2 0 C76 W0 5 0 W1 0 1 A0 r R0 W2 3 1 A0 r RD0 W3 0 0 W4 0 0 W5 0 0 W6 3 1 A0 r RCF W7 0 0 W8 0 0 W9 0 0 WA 3 1 A0 r RCE WB 0 0 WC 0 0 WD 0 0 WE 0 1 A0 r R52 0 RA3 C42 3 3 2 1 3 -1 W4A 4 0 W1 W32 W13 W27 0 C77 W0 4 0 W1 0 2 A0 r R0 A9 a A9 W2 8 3 A0 r RCF A15 a A15 A9 a A9 W3 0 0 W4 0 0 W5 0 0 W6 0 0 W7 0 0 W8 0 0 W9 0 0 WA 0 0 WB 8 3 A0 r RCE A15 a A15 A9 a A9 WC 0 0 WD 0 0 WE 0 0 WF 0 0 W10 0 0 W11 0 0 W12 0 0 W13 0 0 W14 0 2 A0 r R52 A9 a A9 1 A0 r R11F RA3 C67 8 2 1 2 0 W4B 4 0 W1 W27 WF W32 0 C78 W0 4 0 W1 0 2 A0 r R1E4 "Vdd" AA l agg n 0 W2 0 2 A0 r R1E5 "Gnd" AA l agg n 0 W3 3 2 A0 r R1AD AA ls agg n 0 W4 0 0 W5 0 0 W6 0 0 W7 8 2 A0 r R1AE AA ls agg d 0 W8 0 0 W9 0 0 WA 0 0 WB 0 0 WC 0 0 WD 0 0 WE 0 0 WF 0 0 4 A0 r R1CC AB r R1CD AC lor 1 R9D AD r R1E6 "DecoderS a=3 s=8" R54 2 W10 6 0 W1 W2 W3 W7 W11 3 1 A0 r R1B3 W12 0 0 W13 0 0 W14 0 0 W15 3 1 A0 r R1B4 W16 0 0 W17 0 0 W18 0 0 W19 5 0 W1 W2 W11 W15 W7 0 C79 W0 5 0 W1 0 1 A0 r R1E7 "Vdd" W2 0 1 A0 r R1E8 "Gnd" W3 3 1 A0 r R1B3 W4 0 0 W5 0 0 W6 0 0 W7 3 1 A0 r R1B4 W8 0 0 W9 0 0 WA 0 0 WB 8 1 A0 r R1AE WC 0 0 WD 0 0 WE 0 0 WF 0 0 W10 0 0 W11 0 0 W12 0 0 W13 0 0 1 A0 r R1D1 R54 8 W14 13 0 W1 W2 W3 W7 WB W15 3 0 W4 W5 W6 W16 3 0 W4 W5 WA W17 3 0 W4 W9 W6 W18 3 0 W4 W9 WA W19 3 0 W8 W5 W6 W1A 3 0 W8 W5 WA W1B 3 0 W8 W9 W6 W1C 3 0 W8 W9 WA W1D 4 0 W1 W2 W15 W13 0 C61 W1E 4 0 W1 W2 W16 W12 0 C61 W1F 4 0 W1 W2 W17 W11 0 C61 W20 4 0 W1 W2 W18 W10 0 C61 W21 4 0 W1 W2 W19 WF 0 C61 W22 4 0 W1 W2 W1A WE 0 C61 W23 4 0 W1 W2 W1B WD 0 C61 W24 4 0 W1 W2 W1C WC 0 C61 W1A 5 0 W1 W11 W3 W15 W2 0 C7A W0 5 0 W1 0 1 A0 r R0 W2 3 1 A0 r RD0 W3 0 0 W4 0 0 W5 0 0 W6 3 1 A0 r RCF W7 0 0 W8 0 0 W9 0 0 WA 3 1 A0 r RCE WB 0 0 WC 0 0 WD 0 0 WE 0 1 A0 r R52 0 RA3 C42 3 3 2 1 3 -1 W53 9 0 W1 W46 W4E W32 W3B W2C W11 W4D W4B 0 C5B W16E 29 0 W1 W32 W153 WDC W1A W164 WD8 W12E WA4 W2 W149 WA W36 W134 W125 W73 W150 W89 WBF WF8 W13E W3A W93 WE5 WF1 WC1 W12D WB2 W118 0 C7B W0 29 0 W1 0 1 A0 r R0 W2 3 1 A0 r RF W3 0 0 W4 0 0 W5 0 0 W6 0 1 A0 r R1E9 "LdErrorAdd" W7 2 1 A0 r R41 W8 0 1 A3 a A4 W9 0 0 WA 2 1 A0 r RB WB 0 0 WC 0 0 WD 0 1 A0 r R8C WE 2 1 A0 r R1EA "SelRamBufDec" WF 0 0 W10 0 0 W11 0 1 A0 r R1EB "LdSyndrome" W12 0 1 A0 r R1EC "SelColumnAdd" W13 2 1 A0 r R1ED "SelColAddDec" W14 0 0 W15 0 0 W16 0 1 A0 r R78 W17 0 1 A0 r R3 W18 2 1 A0 r R1EE "LatchCAddDec" W19 0 0 W1A 0 0 W1B 0 1 A0 r R1EF "SelIORdData" W1C 0 1 A0 r R5A W1D 10 1 A0 r R1F0 "HighAddSelDec" W1E 0 0 W1F 0 0 W20 0 0 W21 0 0 W22 0 0 W23 0 0 W24 0 0 W25 0 0 W26 0 0 W27 0 0 W28 0 1 A0 r R7C W29 3 1 A0 r R1F1 "LowAddSelect" W2A 0 0 W2B 0 0 W2C 0 0 W2D 0 1 A0 r R38 W2E 4 1 A0 r R1F2 "EnResetStage2Dec" W2F 0 0 W30 0 0 W31 0 0 W32 0 0 W33 0 1 A0 r R1F3 "EnStage1" W34 2 1 A0 r R12 W35 0 0 W36 0 0 W37 4 1 A0 r R1F4 "HighAddSelect" W38 0 0 W39 0 0 W3A 0 0 W3B 0 0 W3C 2 1 A0 r R1F5 "SelIORdDataDec" W3D 0 0 W3E 0 0 W3F 5 1 A0 r R1F6 "LowAddSelDec" W40 0 0 W41 0 0 W42 0 0 W43 0 0 W44 0 0 W45 2 1 A0 r R1F7 "EnStage1Dec" W46 0 0 W47 0 0 W48 0 1 A0 r R1F8 "SelRamBuf" W49 3 1 A0 r R34 W4A 0 0 W4B 0 0 W4C 0 0 W4D 0 1 A0 r R52 1 A0 r R1F9 "MuxDecodes" R54 32 W4E 37 0 W1 W2 W34 W49 W4F 3 0 W50 0 0 W11 W6 W51 0 0 WD W52 0 0 W13 W53 0 0 W29 W3C W54 3 0 W55 0 0 W56 0 0 W57 0 0 W3F W18 W45 W17 W7 WA W1B W37 W2D W33 W58 0 0 W59 0 0 W5A 0 0 W5B 4 0 W5C 0 0 W5D 0 0 W5E 0 0 W5F 0 0 W12 W60 2 2 A0 r R1AD A9 a A9 W16 W28 W61 0 0 W1D W62 0 0 W1C WE W2E W48 W4D W63 4 0 W1 W1C W19 W4D 0 C75 W64 4 0 W1 W51 W1A W4D 0 C75 W65 4 0 W1 W1C W51 W4D 0 C20 W66 4 0 W1 W4D W37 W1D 0 C7C W0 4 0 W1 0 2 A0 r R1FA "Vdd" AA l agg n 0 W2 0 2 A0 r R1FB "Gnd" AA l agg n 0 W3 4 2 A0 r R1AD AA ls agg n 0 W4 0 0 W5 0 0 W6 0 0 W7 0 0 W8 10 2 A0 r R1AE AA ls agg d 0 W9 0 0 WA 0 0 WB 0 0 WC 0 0 WD 0 0 WE 0 0 WF 0 0 W10 0 0 W11 0 0 W12 0 0 4 A0 r R1CC AB r R1CD AC lor 1 R9D AD r R1FC "DecoderS a=4 s=10" R54 2 W13 6 0 W1 W2 W3 W8 W14 4 1 A0 r R1B3 W15 0 0 W16 0 0 W17 0 0 W18 0 0 W19 4 1 A0 r R1B4 W1A 0 0 W1B 0 0 W1C 0 0 W1D 0 0 W1E 5 0 W1 W2 W14 W19 W8 0 C7D W0 5 0 W1 0 1 A0 r R1FD "Vdd" W2 0 1 A0 r R1FE "Gnd" W3 4 1 A0 r R1B3 W4 0 0 W5 0 0 W6 0 0 W7 0 0 W8 4 1 A0 r R1B4 W9 0 0 WA 0 0 WB 0 0 WC 0 0 WD 10 1 A0 r R1AE WE 0 0 WF 0 0 W10 0 0 W11 0 0 W12 0 0 W13 0 0 W14 0 0 W15 0 0 W16 0 0 W17 0 0 1 A0 r R1D1 R54 10 W18 15 0 W1 W2 W3 W8 WD W19 4 0 W4 WA WB W7 W1A 4 0 W4 WA WB WC W1B 4 0 W9 W5 W6 W7 W1C 4 0 W9 W5 W6 WC W1D 4 0 W9 W5 WB W7 W1E 4 0 W9 W5 WB WC W1F 4 0 W9 WA W6 W7 W20 4 0 W9 WA W6 WC W21 4 0 W9 WA WB W7 W22 4 0 W9 WA WB WC W23 4 0 W1 W2 W19 W17 0 C73 W24 4 0 W1 W2 W1A W16 0 C73 W25 4 0 W1 W2 W1B W15 0 C73 W26 4 0 W1 W2 W1C W14 0 C73 W27 4 0 W1 W2 W1D W13 0 C73 W28 4 0 W1 W2 W1E W12 0 C73 W29 4 0 W1 W2 W1F W11 0 C73 W2A 4 0 W1 W2 W20 W10 0 C73 W2B 4 0 W1 W2 W21 WF 0 C73 W2C 4 0 W1 W2 W22 WE 0 C73 W1F 5 0 W1 W3 W19 W14 W2 0 C7E W0 5 0 W1 0 1 A0 r R0 W2 4 1 A0 r RCF W3 0 0 W4 0 0 W5 0 0 W6 0 0 W7 4 1 A0 r RCE W8 0 0 W9 0 0 WA 0 0 WB 0 0 WC 4 1 A0 r RD0 WD 0 0 WE 0 0 WF 0 0 W10 0 0 W11 0 1 A0 r R52 0 RA3 C7F W0 5 0 W1 0 2 A0 r R0 AA l agg n 0 W2 0 2 A0 r RCF AA l agg n 0 W3 0 2 A0 r RCE AA l agg d 0 W4 0 2 A0 r RD0 AA l agg d 0 W5 0 2 A0 r R52 AA l agg n 0 4 A0 r R1FF "symDriver" AB r RD2 AC lor 1 R9D AD r R200 "SymDriver d=8" R54 2 W6 5 0 W1 W2 W3 W4 W5 W7 4 0 W1 W3 W4 W5 0 C1D W8 4 0 W1 W3 W2 W5 0 C1C 4 3 1 3 2 -1 W67 4 0 W1 W4D W29 W3F 0 C80 W0 4 0 W1 0 2 A0 r R201 "Vdd" AA l agg n 0 W2 0 2 A0 r R202 "Gnd" AA l agg n 0 W3 3 2 A0 r R1AD AA ls agg n 0 W4 0 0 W5 0 0 W6 0 0 W7 5 2 A0 r R1AE AA ls agg d 0 W8 0 0 W9 0 0 WA 0 0 WB 0 0 WC 0 0 4 A0 r R1CC AB r R1CD AC lor 1 R9D AD r R203 "DecoderS a=3 s=5" R54 2 WD 6 0 W1 W2 W3 W7 WE 3 1 A0 r R1B3 WF 0 0 W10 0 0 W11 0 0 W12 3 1 A0 r R1B4 W13 0 0 W14 0 0 W15 0 0 W16 5 0 W1 W2 WE W12 W7 0 C81 W0 5 0 W1 0 1 A0 r R204 "Vdd" W2 0 1 A0 r R205 "Gnd" W3 3 1 A0 r R1B3 W4 0 0 W5 0 0 W6 0 0 W7 3 1 A0 r R1B4 W8 0 0 W9 0 0 WA 0 0 WB 5 1 A0 r R1AE WC 0 0 WD 0 0 WE 0 0 WF 0 0 W10 0 0 1 A0 r R1D1 R54 5 W11 10 0 W1 W2 W3 W7 WB W12 3 0 W4 W9 WA W13 3 0 W8 W5 W6 W14 3 0 W8 W5 WA W15 3 0 W8 W9 W6 W16 3 0 W8 W9 WA W17 4 0 W1 W2 W12 W10 0 C61 W18 4 0 W1 W2 W13 WF 0 C61 W19 4 0 W1 W2 W14 WE 0 C61 W1A 4 0 W1 W2 W15 WD 0 C61 W1B 4 0 W1 W2 W16 WC 0 C61 W17 5 0 W1 WE W3 W12 W2 0 C82 W0 5 0 W1 0 1 A0 r R0 W2 3 1 A0 r RD0 W3 0 0 W4 0 0 W5 0 0 W6 3 1 A0 r RCF W7 0 0 W8 0 0 W9 0 0 WA 3 1 A0 r RCE WB 0 0 WC 0 0 WD 0 0 WE 0 1 A0 r R52 0 RA3 C42 3 3 2 1 3 -1 W68 4 0 W1 W1B W3D W4D 0 C75 W69 4 0 W1 W61 W3E W4D 0 C75 W6A 4 0 W1 W48 WF W4D 0 C75 W6B 4 0 W1 W1B W61 W4D 0 C20 W6C 4 0 W1 W59 W10 W4D 0 C75 W6D 4 0 W1 W33 W46 W4D 0 C75 W6E 4 0 W1 W48 W59 W4D 0 C20 W6F 4 0 W1 W5A W47 W4D 0 C75 W70 4 0 W1 W5B W2E W4D 0 C83 W0 4 0 W1 0 2 A0 r R0 A9 a A9 W2 4 3 A0 r RCF A15 a A15 A9 a A9 W3 0 0 W4 0 0 W5 0 0 W6 0 0 W7 4 3 A0 r RCE A15 a A15 A9 a A9 W8 0 0 W9 0 0 WA 0 0 WB 0 0 WC 0 2 A0 r R52 A9 a A9 1 A0 r R11F RA3 C49 4 2 1 2 0 W71 4 0 W1 W33 W5A W4D 0 C20 W72 4 0 W1 W4D W60 W5B 0 C6A W73 4 0 W1 W4F W2 W4D 0 C84 W0 4 0 W1 0 2 A0 r R0 A9 a A9 W2 3 3 A0 r RCF A15 a A15 A9 a A9 W3 0 0 W4 0 0 W5 0 0 W6 3 3 A0 r RCE A15 a A15 A9 a A9 W7 0 0 W8 0 0 W9 0 0 WA 0 2 A0 r R52 A9 a A9 1 A0 r R11F RA3 C49 3 2 1 2 0 W74 4 0 W1 WD W35 W4D 0 C75 W75 4 0 W1 W58 W36 W4D 0 C75 W76 4 0 W1 WD W58 W4D 0 C20 W77 5 0 W1 W50 W11 W6 W4D 0 C21 W78 4 0 W1 W54 W49 W4D 0 C84 W79 4 0 W1 W9 WB W4D 0 C75 W7A 4 0 W1 W62 WC W4D 0 C75 W7B 4 0 W1 W2D W55 W4D 0 C20 W7C 4 0 W1 W9 W62 W4D 0 C20 W7D 5 0 W1 W53 W2D W56 W4D 0 C24 W7E 5 0 W1 W17 W2D W57 W4D 0 C24 W7F 4 0 W1 W12 W14 W4D 0 C75 W80 4 0 W1 W17 W53 W4D 0 C20 W81 4 0 W1 W52 W15 W4D 0 C75 W82 4 0 W1 W12 W52 W4D 0 C20 W16F 26 0 W1 WC0 W164 W7F W15D W12D W124 W7E W12 W163 W111 WE8 W138 W158 WCF WB0 W4D W126 W149 W6A W13E W144 W128 WF0 W150 W118 0 C85 W0 26 0 W1 0 1 A0 r R0 W2 0 1 A0 r R39 W3 0 1 A0 r R8C W4 0 1 A0 r R1E W5 0 1 A0 r R87 W6 0 1 A0 r R206 "SelRamBuf" W7 0 1 A0 r R59 W8 0 1 A0 r R1D W9 0 1 A0 r R7 WA 0 1 A0 r R207 "DGrant" WB 0 1 A0 r R50 WC 0 1 A0 r R45 WD 0 1 A0 r R208 "TwoErrors" WE 0 1 A0 r R84 WF 8 1 A0 r R3E W10 0 0 W11 0 0 W12 0 0 W13 0 0 W14 0 0 W15 0 0 W16 0 0 W17 0 0 W18 0 1 A0 r R32 W19 0 1 A0 r R16 W1A 0 1 A0 r R209 "OneError" W1B 0 1 A0 r R78 W1C 0 1 A0 r R20A "HeaderCycleOut" W1D 0 1 A0 r R20B "EnStage1" W1E 0 1 A0 r R20C "SetShared" W1F 0 1 A0 r R5D W20 0 1 A0 r R48 W21 0 1 A0 r R7C W22 0 1 A0 r R52 1 A0 r R20D "OutputPipeCtl" R54 21 W23 44 0 W1 W24 1 0 W7 W25 2 0 W5 W6 W26 2 0 W27 0 0 W28 0 0 W1F W8 W4 WE W29 0 0 W2A 0 0 W2B 0 1 A3 a A4 W2 W2C 0 0 W2D 1 1 A3 a A4 W2E 0 0 W2F 0 0 W30 1 1 A3 a A4 W31 0 0 W32 0 0 WA W1A W33 1 0 W1C W34 2 1 A3 a A4 W35 0 0 W36 0 0 W37 1 0 W7 W38 0 0 W18 W9 W1B W39 0 0 W3A 1 0 W27 W3B 0 0 W3C 0 0 WF W3 W3D 7 2 A0 r RF2 A9 a A9 W10 W11 W12 W13 W14 W15 W16 W3E 0 0 W21 WD W3F 0 0 W1E W1D WB W19 WC W20 W22 W40 8 0 W1 W3 W4 W3F W9 W2B W38 W22 0 C86 W0 8 0 W1 0 1 A0 r R0 W2 0 1 A0 r R20E "en" W3 0 1 A0 r R99 W4 0 1 A0 r R95 W5 0 1 A0 r R20F "r" W6 0 1 A0 r R92 W7 0 1 A0 r R96 W8 0 1 A0 r R52 1 A0 r R210 "reg1R" R54 4 W9 11 0 W1 W2 WA 0 0 W5 W6 W7 WB 0 0 W3 WC 0 0 W4 W8 WD 6 0 W1 WB W3 W6 W7 W8 0 C5 WE 5 0 W1 WB W5 WA W8 0 C21 WF 7 0 W1 W6 WA W2 WC W4 W8 0 C16 W10 4 0 W1 W2 WC W8 0 C20 W41 5 0 W1 W38 WA W3 W22 0 C32 W42 7 0 W1 W4 W2D W3 W33 W24 W22 0 C87 W0 7 0 W1 0 2 A0 r R0 AA l agg n 0 W2 0 2 A0 r R99 AA l agg n 0 W3 1 2 A0 r R96 AA ls agg d 0 W4 0 0 W5 0 2 A0 r R211 "en" AA l agg n 0 W6 1 2 A0 r R92 AA ls agg d 0 W7 0 0 W8 1 2 A0 r R95 AA ls agg n 0 W9 0 0 WA 0 2 A0 r R52 AA l agg n 0 4 A0 r R212 "register" AB r R213 "LogicRegister" AC lor 1 R9D AD r R214 "Register b=1" R54 2 WB 9 0 W1 W3 W6 W2 W8 W5 WC 0 1 A0 r RC2 WD 0 1 A0 r RC3 WA WE 8 0 W1 WC WD W8 W2 W3 W6 WA 0 C88 W0 8 0 W1 0 2 A0 r R0 A9 a A9 W2 0 2 A0 r R215 "nEn" A9 a A9 W3 0 2 A0 r R216 "en" A9 a A9 W4 1 3 A0 r RA6 A15 a A15 A9 a A9 W5 0 0 W6 0 2 A0 r RA7 A9 a A9 W7 1 3 A0 r RA9 A15 a A15 A9 a A9 W8 0 0 W9 1 3 A0 r RA8 A15 a A15 A9 a A9 WA 0 0 WB 0 2 A0 r R52 A9 a A9 1 A0 r R217 "SeqffEn" RA3 C89 W0 8 0 W1 0 2 A0 r RA5 AA l agg n 0 W2 0 2 A0 r R215 AA l agg n 0 W3 0 2 A0 r R216 AA l agg n 0 W4 0 2 A0 r RA6 AA l agg n 0 W5 0 2 A0 r RA7 AA l agg n 0 W6 0 2 A0 r RA9 AA l agg d 0 W7 0 2 A0 r RA8 AA l agg d 0 W8 0 2 A0 r RAA AA l agg n 0 8 AE r RAB A5 a AF A0 r R218 "ffEn" A10 i 798720 A11 r RAD AB r R219 "LogicFlipFlopEnable" AC lor 1 RAF AD r R21A "FlipFlopEnable" R54 30 W9 21 0 W1 WA 0 0 W2 WB 0 0 W6 WC 0 1 A0 r RB2 W7 WD 0 0 WE 0 0 WF 0 0 W4 W10 0 0 W11 0 0 W12 0 0 W13 0 1 A0 r RB1 W3 W14 0 0 W15 0 1 A0 r RB4 W16 0 1 A0 r RB3 W5 W8 W17 4 0 W6 W7 W1 W1 0 C6 W18 3 0 W8 W6 W7 0 C8 W19 4 0 W13 W6 W1 W1 0 C6 W1A 3 0 W8 W13 W6 0 C8 W1B 4 0 W11 W1 W13 W1 0 C8A W0 4 0 W1 0 1 A0 r RB5 W2 0 1 A0 r RB7 W3 0 1 A0 r RB6 W4 0 1 A0 r RA5 3 A14 dw A12 i 3 A13 i 4 RB9 pE W1C 4 0 W16 WD W13 W1 0 C6 W1D 4 0 W16 W1 WC W1 0 CB W1E 3 0 W11 W13 W8 0 C8B W0 3 0 W1 0 1 A0 r RB5 W2 0 1 A0 r RB7 W3 0 1 A0 r RB6 3 A14 dw A12 i 3 A13 i 4 RB9 nE W1F 4 0 W13 W1 W11 W1 0 C8C W0 4 0 W1 0 1 A0 r RB5 W2 0 1 A0 r RB7 W3 0 1 A0 r RB6 W4 0 1 A0 r RA5 3 A14 dw A12 i 3 A13 i 2 RB9 pE W20 3 0 W13 WC W10 0 C8 W21 4 0 W15 WD W1 W1 0 C6 W22 3 0 W16 WC W8 0 CE W23 3 0 W13 W11 W8 0 C8D W0 3 0 W1 0 1 A0 r RB5 W2 0 1 A0 r RB7 W3 0 1 A0 r RB6 3 A14 dw A12 i 3 A13 i 2 RB9 nE W24 3 0 W8 W15 W10 0 C8 W25 4 0 W5 W1 W16 W1 0 CB W26 3 0 W5 W16 W8 0 CE W27 4 0 WA W1 W15 W1 0 C8E W0 4 0 W1 0 1 A0 r RB5 W2 0 1 A0 r RB7 W3 0 1 A0 r RB6 W4 0 1 A0 r RA5 3 A14 dw A12 i 3 A13 i 4 RB9 pE W28 4 0 W4 WB W1 W1 0 C6 W29 4 0 WC WF W15 W1 0 C6 W2A 3 0 WA W15 W8 0 C8F W0 3 0 W1 0 1 A0 r RB5 W2 0 1 A0 r RB7 W3 0 1 A0 r RB6 3 A14 dw A12 i 3 A13 i 4 RB9 nE W2B 4 0 W15 W1 WA W1 0 C90 W0 4 0 W1 0 1 A0 r RB5 W2 0 1 A0 r RB7 W3 0 1 A0 r RB6 W4 0 1 A0 r RA5 3 A14 dw A12 i 3 A13 i 2 RB9 pE W2C 3 0 W15 W16 W12 0 C8 W2D 4 0 W13 WF WB W1 0 C6 W2E 4 0 W3 WB W1 W1 0 C6 W2F 3 0 W15 WA W8 0 C91 W0 3 0 W1 0 1 A0 r RB5 W2 0 1 A0 r RB7 W3 0 1 A0 r RB6 3 A14 dw A12 i 3 A13 i 2 RB9 nE W30 4 0 W2 WF WB W1 0 C6 W31 3 0 WE W13 W12 0 C8 W32 3 0 W8 W2 WE 0 C8 W33 3 0 W14 W4 W12 0 C8 W34 3 0 W8 W3 W14 0 C8 1 3 3 5 6 0 WF 5 0 W1 WD WC W5 WA 0 C65 W43 6 0 W1 WD W2A W3E W39 W22 0 C92 W0 6 0 W1 0 2 A9 a A9 A0 r R0 W2 0 1 A0 r RCE W3 0 1 A0 r REF W4 0 1 A0 r R134 W5 0 1 A0 r RF0 W6 0 2 A9 a A9 A0 r R52 1 A0 r R21B "nor3" R54 1 W7 4 0 W1 W8 3 2 A0 r RF2 A9 a A9 W5 W3 W4 W2 W6 W9 4 0 W1 W6 W8 W2 0 C61 W44 8 0 W1 W21 W4 W2C W9 W3F W3C W22 0 C86 W45 4 0 W1 WA W39 W22 0 C20 W46 6 0 W1 WA W38 W3C W21 W22 0 C93 W0 6 0 W1 0 2 A9 a A9 A0 r R0 W2 0 1 A0 r R134 W3 0 1 A0 r RF0 W4 0 1 A0 r REF W5 0 1 A0 r RCE W6 0 2 A9 a A9 A0 r R52 1 A0 r R21C "or3" R54 1 W7 4 0 W1 W8 3 2 A0 r RF2 A9 a A9 W3 W4 W2 W5 W6 W9 4 0 W1 W6 W8 W5 0 C94 W0 4 0 W1 0 1 A0 r R21D "Vdd" W2 0 1 A0 r R21E "Gnd" W3 3 1 A0 r RF2 W4 0 0 W5 0 0 W6 0 0 W7 0 1 A0 r R21F "X" 2 A0 r R220 "Or3" AD r R221 "Or n=3" R54 1 W0 W8 6 0 W1 W4 W7 W5 W6 W2 0 C95 W0 6 0 W1 0 3 A0 r RA5 A16 H AA l agg n 0 W2 0 3 A0 r RFA A17 b agg f 0 AA l agg n 0 W3 0 4 A0 r RC5 A17 b agg e 0 AA l agg d 0 A18 r R222 "I-A + I-B + I-C" W4 0 3 A0 r RF8 A17 b agg f 0 AA l agg n 0 W5 0 3 A0 r R13D A17 b agg f 0 AA l agg n 0 W6 0 3 A0 r RAA A16 L AA l agg n 0 8 AE r RAB A0 r R223 "or3" A5 a AF AC lor 2 RCA RCB A10 i 266240 AB r RCC A19 rb 1 A11 r RAD R54 7 W7 9 0 W1 W8 0 0 W9 0 0 W2 W5 W3 W4 WA 0 0 W6 WB 4 0 W2 W8 W1 W1 0 C6 WC 4 0 W4 W9 W8 W1 0 C6 WD 4 0 W1 WA W3 W6 0 C27 WE 4 0 W5 WA W9 W1 0 C6 WF 3 0 W6 W5 WA 0 C8 W10 3 0 W6 W4 WA 0 C8 W11 3 0 W6 W2 WA 0 C8 W47 5 0 W1 WA W3E W1A W22 0 C24 W48 4 0 W1 W22 W3D W2A 0 C96 W0 4 0 W1 0 1 A0 r R224 "Vdd" W2 0 1 A0 r R225 "Gnd" W3 7 1 A0 r RF2 W4 0 0 W5 0 0 W6 0 0 W7 0 0 W8 0 0 W9 0 0 WA 0 0 WB 0 1 A0 r R226 "X" 2 A0 r R227 "Nor7" AD r R228 "Nor n=7" R54 3 WC 9 0 W1 W2 W3 WB WD 0 1 A0 r R229 "One" WE 0 1 A0 r R22A "Two" WF 2 0 WD WE W10 3 0 W4 W5 W6 W11 4 0 W7 W8 W9 WA W12 4 0 W1 W2 WF WB 0 C22 W13 4 0 W1 W2 W10 WD 0 C94 W14 4 0 W1 W2 W11 WE 0 C52 W49 5 0 W1 W3E W10 W17 W22 0 C97 W0 5 0 W1 0 3 A0 r RA5 A16 H AA l agg n 0 W2 0 4 A0 r RC5 A17 b agg e 0 AA l agg d 0 A18 r R22B "(I-A*~I-B)+(~I-A*I-B)" W3 0 3 A0 r RF8 A17 b agg f 0 AA l agg n 0 W4 0 3 A0 r RFA A17 b agg f 0 AA l agg n 0 W5 0 3 A0 r RAA A16 L AA l agg n 0 9 AE r RAB A5 a AF A0 r R22C "xor2" AC lor 2 RCA RCB A10 i 319488 AB r RCC A19 rb 1 A11 r RAD AD r R22D "Xor2" R54 10 W6 9 0 W1 W7 0 0 W2 W8 0 0 W3 W9 0 0 W4 WA 0 0 W5 WB 4 0 W3 W2 W7 W1 0 C6 WC 4 0 W8 W7 W1 W1 0 C6 WD 3 0 W9 W4 W2 0 C8 WE 4 0 W4 W2 W7 W1 0 C6 WF 3 0 W5 W3 W9 0 C8 W10 3 0 W5 W8 W2 0 C8 W11 4 0 W4 WA W1 W1 0 C6 W12 4 0 W3 W8 WA W1 0 C6 W13 3 0 W5 W3 W8 0 C8 W14 3 0 W5 W4 W8 0 C8 W4A 5 0 W1 W28 W1B W8 W22 0 C2A W4B 7 0 W1 W4 W30 W21 W37 W3A W22 0 C87 W4C 8 0 W1 W1D W4 W32 W9 W2C W3B W22 0 C86 W4D 7 0 W1 W1D W38 W3C WA W3B W22 0 C51 W4E 4 0 W1 WE W32 W22 0 C20 W4F 7 0 W1 W26 W25 W1D W4 W34 W22 0 C98 W0 7 0 W1 0 2 A0 r R0 AA l agg n 0 W2 2 2 A0 r R92 AA ls agg d 0 W3 0 0 W4 0 0 W5 2 2 A0 r R95 AA ls agg n 0 W6 0 0 W7 0 0 W8 0 2 A0 r R211 AA l agg n 0 W9 0 2 A0 r R99 AA l agg n 0 WA 2 2 A0 r R96 AA ls agg d 0 WB 0 0 WC 0 0 WD 0 2 A0 r R52 AA l agg n 0 4 A0 r R22E "register" AB r R213 AC lor 1 R9D AD r R22F "Register b=2" R54 2 WE 9 0 W1 WF 0 1 A0 r RC3 WA W5 W2 W9 W8 W10 0 1 A0 r RC2 WD W11 8 0 W1 W10 WF W5 W9 WA W2 WD 0 C99 W0 8 0 W1 0 2 A0 r R0 A9 a A9 W2 0 2 A0 r R215 A9 a A9 W3 0 2 A0 r R216 A9 a A9 W4 2 3 A0 r RA6 A15 a A15 A9 a A9 W5 0 0 W6 0 0 W7 0 2 A0 r RA7 A9 a A9 W8 2 3 A0 r RA9 A15 a A15 A9 a A9 W9 0 0 WA 0 0 WB 2 3 A0 r RA8 A15 a A15 A9 a A9 WC 0 0 WD 0 0 WE 0 2 A0 r R52 A9 a A9 1 A0 r R230 "SeqffEn" RA3 C89 2 3 3 5 6 0 W12 5 0 W1 WF W10 W8 WD 0 C65 W50 5 0 W1 W2 W29 W18 W22 0 C32 W51 5 0 W1 W1E W5 W29 W22 0 C24 W52 5 0 W1 WC W2F W20 W22 0 C32 W53 4 0 W1 W1F W2F W22 0 C20 W54 5 0 W1 W1F W19 WB W22 0 C24 W170 11 0 W1 W9E W4D WDC W7F W2C W12 W167 W166 W11D W118 0 C9A W0 11 0 W1 0 1 A0 r R0 W2 5 1 A0 r R2C W3 0 0 W4 0 0 W5 0 0 W6 0 0 W7 0 0 W8 0 1 A0 r R231 "UserMode" W9 2 1 A0 r R232 "IORegAdd" WA 0 0 WB 0 0 WC 0 1 A0 r R233 "Clock" WD 5 1 A0 r R234 "LdCtlRegDec" WE 0 0 WF 0 0 W10 0 0 W11 0 0 W12 0 0 W13 0 1 A0 r R235 "Reset" W14 0 1 A0 r R236 "ResetErrStatus" W15 0 1 A0 r R237 "WrCtlReg" W16 5 1 A0 r R57 W17 0 0 W18 0 0 W19 0 0 W1A 0 0 W1B 0 0 W1C 0 1 A0 r R52 1 A0 r R238 "ControlReg" R54 8 W1D 16 0 W1 W1E 0 0 W1F 0 0 W2 W20 4 2 A0 r R1AE A9 a A9 W21 0 0 W22 0 0 W23 0 0 W14 W24 0 0 WC W9 WD W25 0 0 W8 W15 W26 5 2 A0 r RCF A9 a A9 W27 0 2 A0 r RCE A9 a A9 W21 W22 W23 W13 W28 5 3 A0 r R96 A3 a A4 A9 a A9 W29 0 0 W2A 0 0 W2B 0 0 W2C 0 0 W2D 0 0 W16 W1C W2E 8 0 W1 W21 W16 W28 W13 WC W2 W1C 0 C9B W0 8 0 W1 0 2 A0 r R0 AA l agg n 0 W2 0 2 A0 r R211 AA l agg n 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RA7 A9 a A9 W5 0 2 A0 r REF A9 a A9 W6 0 2 A0 r RA6 A9 a A9 W7 0 0 W8 0 2 A0 r RC4 A9 a A9 W9 0 1 A0 r R52 1 A0 r R23E "reg1BitReset" R54 3 WA 11 0 W1 W5 W2 WB 0 0 W8 W3 W4 W7 WC 0 0 W6 W9 WD 6 0 W1 WC W4 W7 W3 W9 0 C5 WE 5 0 W1 WC W5 WB W9 0 C21 WF 7 0 W1 W8 WB W2 W7 W6 W9 0 C16 5 3 2 5 6 0 W1D 5 0 W1 W1A W2 W1B W17 0 C42 W1E 4 0 W1 WF W19 W17 0 C49 W2F 4 0 W1 W26 WD W1C 0 C9E W0 4 0 W1 0 2 A0 r R0 A9 a A9 W2 5 3 A0 r RCF A15 a A15 A9 a A9 W3 0 0 W4 0 0 W5 0 0 W6 0 0 W7 0 0 W8 5 3 A0 r RCE A15 a A15 A9 a A9 W9 0 0 WA 0 0 WB 0 0 WC 0 0 WD 0 0 WE 0 2 A0 r R52 A9 a A9 1 A0 r R11F RA3 C49 5 2 1 2 0 W30 5 0 W1 W25 W1F W27 W1C 0 C24 W31 5 0 W1 W15 W25 W24 W1C 0 C2A W32 4 0 W1 W13 W1F W1C 0 C20 W33 6 0 W1 W1F W24 W15 W1E W1C 0 C45 W34 5 0 W1 W1C W9 W20 W1E 0 C5F W35 4 0 W1 W8 W24 W1C 0 C20 W171 4 0 W1 W57 WCF W118 0 C9F W0 4 0 W1 0 1 A0 r R0 W2 18 1 A0 r R23F "CorrectSel" W3 0 0 W4 0 0 W5 0 0 W6 0 0 W7 0 0 W8 0 0 W9 0 0 WA 0 0 WB 0 0 WC 0 0 WD 0 0 WE 0 0 WF 0 0 W10 0 0 W11 0 0 W12 0 0 W13 0 0 W14 0 0 W15 8 1 A0 r R240 "Check" W16 0 0 W17 0 0 W18 0 0 W19 0 0 W1A 0 0 W1B 0 0 W1C 0 0 W1D 0 1 A3 a A4 W1E 0 1 A0 r R52 1 A0 r R241 "CorrectDecode" R54 6 W1F 10 0 W1 W2 W20 8 0 W3 W4 W5 W6 W7 W8 W9 WA W21 3 0 W17 W18 W19 W15 W22 8 0 WB WC WD WE WF W10 W11 W12 W23 8 0 W24 0 0 W25 0 0 W26 0 0 W27 0 0 W28 0 0 W29 0 0 W2A 0 0 W2B 0 0 W2C 3 0 W1A W1B W1C W2D 8 0 W2E 0 0 W2F 0 0 W30 0 0 W31 0 0 W32 0 0 W33 0 0 W34 0 0 W35 0 0 W1E W36 4 0 W1 W23 W20 W1E 0 CA0 W0 4 0 W1 0 2 A0 r R0 A9 a A9 W2 8 3 A0 r RCF A15 a A15 A9 a A9 W3 0 0 W4 0 0 W5 0 0 W6 0 0 W7 0 0 W8 0 0 W9 0 0 WA 0 0 WB 8 3 A0 r RCE A15 a A15 A9 a A9 WC 0 0 WD 0 0 WE 0 0 WF 0 0 W10 0 0 W11 0 0 W12 0 0 W13 0 0 W14 0 2 A0 r R52 A9 a A9 1 A0 r R11F RA3 C75 8 2 1 2 0 W37 4 0 W1 W2D W22 W1E 0 CA0 W38 4 0 W1 W1E W2C W23 0 C78 W39 4 0 W1 W16 W13 W1E 0 C49 W3A 4 0 W1 W16 W14 W1E 0 CA1 W0 4 0 W1 0 2 A0 r R0 AA l agg n 0 W2 0 2 A0 r RCF AA l agg n 0 W3 0 2 A0 r RCE AA l agg d 0 W4 0 2 A0 r R52 AA l agg n 0 4 A0 r R242 "invDriver" AB r RD6 AC lor 1 R9D AD r R243 "InvDriver d=20" R54 2 W5 5 0 W1 W3 W2 W6 0 0 W4 W7 4 0 W1 W3 W6 W4 0 CA2 W0 4 0 W1 0 2 A0 r R0 AA l agg n 0 W2 0 2 A0 r RCE AA l agg d 0 W3 0 2 A0 r RCF AA l agg n 0 W4 0 2 A0 r R52 AA l agg n 0 4 A0 r R244 "driver" AD r R245 "Driver d=20" AC lor 2 R9D R9D AB r RDD R54 2 W5 5 0 W1 W3 W6 0 0 W2 W4 W7 4 0 W1 W6 W2 W4 0 CA3 W0 4 0 W1 0 2 A0 r RA5 AA l agg n 0 W2 0 2 A0 r RD4 AA l agg n 0 W3 0 2 A0 r RC5 AA l agg d 0 W4 0 2 A0 r RAA AA l agg n 0 4 A0 r RD5 AB r RD6 AC lor 1 RAF AD r R246 "Buffer d=5" RA3 C19 3 -1 -1 W8 4 0 W1 W3 W6 W4 0 C1D W8 4 0 W1 W2 W6 W4 0 C20 W3B 4 0 W1 W1E W21 W2D 0 C78 W172 19 0 W1 W167 W153 W127 W165 WAE W11B W15A W126 W13A W7F W12 W12A WE9 WEA W138 W124 W12E W118 0 CA4 W0 19 0 W1 0 1 A0 r R0 W2 0 1 A0 r R236 W3 0 1 A0 r R1E9 W4 0 1 A0 r R5C W5 0 1 A0 r R8D W6 0 1 A0 r R247 "LoadFifo" W7 0 1 A0 r R55 W8 0 1 A0 r R248 "ReadB" W9 0 1 A0 r R209 WA 0 1 A0 r R189 WB 0 1 A0 r R1E WC 0 1 A0 r R7 WD 0 1 A0 r R19C WE 0 1 A0 r R46 WF 5 1 A0 r R249 "ErrorReg" W10 0 1 A0 r R24A "Overflow" W11 0 1 A0 r R24B "TwoBit" W12 0 1 A0 r R24C "BufferSync" W13 0 1 A0 r R24D "OneBit" W14 0 1 A0 r R24E "MultMemErrors" W15 0 1 A0 r R208 W16 0 1 A0 r R59 W17 0 1 A0 r R1EB W18 0 1 A0 r R52 1 A0 r R24F "ErrorRegister" R54 17 W19 34 0 W1 W4 W1A 0 0 W1B 0 0 W1C 0 0 W1D 0 1 A3 a A4 W1E 0 0 WE W1F 0 0 W20 0 0 W6 W2 W9 W21 0 0 W22 0 1 A0 r R250 "MemError" W3 W5 WF W23 0 0 W17 W24 0 1 A3 a A4 W25 0 1 A3 a A4 W16 W15 WB W26 0 0 W27 0 0 W7 WD W28 0 0 W8 WC WA W18 W29 6 0 W1 W1A W4 W26 W20 W18 0 C3A W2A 4 0 W1 W15 W26 W18 0 C20 W2B 8 0 W1 WB W1C W10 W20 W1B W10 W18 0 C31 W2C 5 0 W1 WE W6 W1C W18 0 C24 W2D 8 0 W1 WB W15 W11 W1D W1B W11 W18 0 C31 W2E 8 0 W1 WB W1F W12 W1A W1B W12 W18 0 C31 W2F 5 0 W1 W1F W23 W1E W18 0 C21 W30 6 0 W1 W5 W1E WA W7 W18 0 C3A W31 8 0 W1 WB W9 W13 W25 W1B W13 W18 0 C31 W32 5 0 W1 WD W23 W8 W18 0 C30 W33 5 0 W1 W17 W16 W22 W18 0 C21 W34 8 0 W1 WB W21 W14 W24 W1B W14 W18 0 C31 W35 5 0 W1 W16 W27 W3 W18 0 C24 W36 5 0 W1 W28 W22 W21 W18 0 C24 W37 8 0 W1 WB W28 W22 W27 W1B W22 W18 0 C31 W38 5 0 W1 W9 W15 W28 W18 0 C32 W39 5 0 W1 W2 WC W1B W18 0 C32 W173 20 0 W1 W8F W90 W8E WDB W7F W127 W15F WB1 W91 W88 W87 WFD W11 W10F W39 W86 W163 WC4 W118 0 CA5 W0 20 0 W1 0 1 A0 r R0 W2 0 1 A0 r R26 W3 0 1 A0 r R27 W4 0 1 A0 r R25 W5 0 1 A0 r R40 W6 0 1 A0 r R233 W7 0 1 A0 r R5C W8 2 1 A0 r R89 W9 0 0 WA 0 0 WB 0 1 A0 r R251 "CkIn" WC 0 1 A0 r R28 WD 0 1 A0 r R22 WE 0 1 A0 r R21 WF 2 1 A0 r R4C W10 0 0 W11 0 0 W12 0 1 A0 r R6 W13 0 1 A0 r R4E W14 0 1 A0 r R11 W15 0 1 A0 r R20 W16 0 1 A0 r R8B W17 0 1 A0 r R3B W18 0 1 A0 r R52 1 A0 r R252 "DynabusIF" R54 10 W19 20 0 W1 W1A 0 0 W1B 7 2 A0 r R92 A9 a A9 W2 W14 WC W16 W10 W11 WD WF W1C 7 2 A0 r R96 A9 a A9 W1D 0 0 W1E 0 0 W1F 0 0 W20 0 2 A0 r RD4 A9 a A9 W21 0 0 W22 0 0 W23 0 0 W24 0 0 W17 W25 0 0 W8 W5 W6 W26 3 1 A3 a A4 W21 W22 W23 W27 3 1 A3 a A4 W1D W1E W1F WB W28 0 0 W4 W29 7 2 A0 r R95 A9 a A9 W3 W12 W13 W15 W9 WA W7 WE W2A 0 0 W18 W2B 4 0 W1 W2A W17 W18 0 C55 W2C 4 0 W1 W24 W5 W18 0 C55 W2D 4 0 W1 W25 W2A W18 0 C56 W2E 4 0 W1 W28 W24 W18 0 C56 W2F 4 0 W1 W1A W25 W18 0 C1D W30 4 0 W1 W20 W28 W18 0 C1D W31 4 0 W1 W4 W1A W18 0 C20 W32 6 0 W1 W29 W1C W6 W1B W18 0 CA6 W0 6 0 W1 0 2 A0 r R0 AA l agg n 0 W2 7 2 A0 r R95 AA ls agg n 0 W3 0 0 W4 0 0 W5 0 0 W6 0 0 W7 0 0 W8 0 0 W9 0 0 WA 7 2 A0 r R96 AA ls agg d 0 WB 0 0 WC 0 0 WD 0 0 WE 0 0 WF 0 0 W10 0 0 W11 0 0 W12 0 2 A0 r R99 AA l agg n 0 W13 7 2 A0 r R92 AA ls agg d 0 W14 0 0 W15 0 0 W16 0 0 W17 0 0 W18 0 0 W19 0 0 W1A 0 0 W1B 0 2 A0 r R52 AA l agg n 0 4 A0 r RA0 AB r RA1 AC lor 1 R9D AD r R253 "RegisterSimple b=7" RA3 C4 7 3 1 4 2 -1 W33 4 0 W1 WE W6 W18 0 CA7 W0 4 0 W1 0 2 A0 r RA5 AA l agg n 0 W2 0 2 A0 r RD4 AA l agg n 0 W3 0 2 A0 r RC5 AA l agg d 0 W4 0 2 A0 r RAA AA l agg n 0 4 A0 r R254 "CKBuffer" AB r RD6 AC lor 1 RAF AD r R255 "CKBuffer d=48 numRows=40 " R54 24 W5 28 0 W1 W2 W3 W4 W6 4 0 W1 W2 W3 W4 W7 4 0 W1 W2 W3 W4 W8 4 0 W1 W2 W3 W4 W9 4 0 W1 W2 W3 W4 WA 4 0 W1 W2 W3 W4 WB 4 0 W1 W2 W3 W4 WC 4 0 W1 W2 W3 W4 WD 4 0 W1 W2 W3 W4 WE 4 0 W1 W2 W3 W4 WF 4 0 W1 W2 W3 W4 W10 4 0 W1 W2 W3 W4 W11 4 0 W1 W2 W3 W4 W12 4 0 W1 W2 W3 W4 W13 4 0 W1 W2 W3 W4 W14 4 0 W1 W2 W3 W4 W15 4 0 W1 W2 W3 W4 W16 4 0 W1 W2 W3 W4 W17 4 0 W1 W2 W3 W4 W18 4 0 W1 W2 W3 W4 W19 4 0 W1 W2 W3 W4 W1A 4 0 W1 W2 W3 W4 W1B 4 0 W1 W2 W3 W4 W1C 4 0 W1 W2 W3 W4 W1D 4 0 W1 W2 W3 W4 W6 2 A0 r R256 "invBuffer0" A1D Row i 1 C19 W7 2 A0 r R257 "invBuffer1" A1D i 2 C19 W8 2 A0 r R258 "invBuffer2" A1D i 3 C19 W9 2 A0 r R259 "invBuffer3" A1D i 4 C19 WA 2 A0 r R25A "invBuffer4" A1D i 5 C19 WB 2 A0 r R25B "invBuffer5" A1D i 6 C19 WC 2 A0 r R25C "invBuffer6" A1D i 7 C19 WD 2 A0 r R25D "invBuffer7" A1D i 8 C19 WE 2 A0 r R25E "invBuffer8" A1D i 9 C19 WF 2 A0 r R25F "invBuffer9" A1D i 10 C19 W10 2 A0 r R260 "invBuffer10" A1D i 11 C19 W11 2 A0 r R261 "invBuffer11" A1D i 12 C19 W12 2 A0 r R262 "invBuffer12" A1D i 13 C19 W13 2 A0 r R263 "invBuffer13" A1D i 14 C19 W14 2 A0 r R264 "invBuffer14" A1D i 15 C19 W15 2 A0 r R265 "invBuffer15" A1D i 16 C19 W16 2 A0 r R266 "invBuffer16" A1D i 17 C19 W17 2 A0 r R267 "invBuffer17" A1D i 18 C19 W18 2 A0 r R268 "invBuffer18" A1D i 19 C19 W19 2 A0 r R269 "invBuffer19" A1D i 20 C19 W1A 2 A0 r R26A "invBuffer20" A1D i 21 C19 W1B 2 A0 r R26B "invBuffer21" A1D i 22 C19 W1C 2 A0 r R26C "invBuffer22" A1D i 23 C19 W1D 2 A0 r R26D "invBuffer23" A1D i 24 C19 W34 4 0 W1 WB WE W18 0 CA8 W0 4 0 W1 0 2 A0 r RA5 AA l agg n 0 W2 0 2 A0 r RD4 AA l agg n 0 W3 0 2 A0 r RC5 AA l agg d 0 W4 0 2 A0 r RAA AA l agg n 0 4 A0 r R254 AB r RD6 AC lor 1 RAF AD r R26E "CKBuffer d=12 numRows=40 " R54 6 W5 10 0 W1 W2 W3 W4 W6 4 0 W1 W2 W3 W4 W7 4 0 W1 W2 W3 W4 W8 4 0 W1 W2 W3 W4 W9 4 0 W1 W2 W3 W4 WA 4 0 W1 W2 W3 W4 WB 4 0 W1 W2 W3 W4 W6 2 A0 r R26F "invBuffer0" A1D i 1 C19 W7 2 A0 r R270 "invBuffer1" A1D i 7 C19 W8 2 A0 r R271 "invBuffer2" A1D i 13 C19 W9 2 A0 r R272 "invBuffer3" A1D i 19 C19 WA 2 A0 r R273 "invBuffer4" A1D i 25 C19 WB 2 A0 r R274 "invBuffer5" A1D i 31 C19 W174 33 0 W1 W144 W7F W13E W19 W151 W141 W13C W12A W162 WCE W8D W11C W132 W139 W13B W156 W123 W12 W142 W129 W15A W14A W14F W133 W131 WBE W143 W136 W152 W137 W12B W118 0 CA9 W0 33 0 W1 0 1 A0 r R0 W2 0 1 A0 r R20C W3 0 1 A0 r R1E W4 0 1 A0 r R194 W5 0 1 A0 r RA W6 0 1 A0 r R275 "PostNeedS" W7 0 1 A0 r R72 W8 0 1 A0 r R6F W9 0 1 A0 r R276 "WriteB" WA 0 1 A0 r R8A WB 0 1 A0 r R3D WC 0 1 A0 r R24 WD 0 1 A0 r R56 WE 0 1 A0 r R65 WF 0 1 A0 r R277 "PostNeedO" W10 0 1 A0 r R6E W11 0 1 A0 r R82 W12 0 1 A0 r R278 "nWriteB" W13 0 1 A0 r R7 W14 0 1 A0 r R279 "TwoReqPend" W15 0 1 A0 r R18E W16 0 1 A0 r R248 W17 0 1 A0 r R27A "AReq" W18 0 1 A0 r R7B W19 0 1 A0 r R27B "nReadB" W1A 0 1 A0 r R18A W1B 0 1 A0 r R37 W1C 0 1 A0 r R184 W1D 0 1 A0 r R69 W1E 0 1 A0 r R27C "PostReq" W1F 0 1 A0 r R27D "BReq" W20 0 1 A0 r R27E "PopReq" W21 0 1 A0 r R52 1 A0 r R27F "RequestQueue" R54 26 W22 56 0 W1 W10 WA W1D W13 W23 0 0 W24 0 1 A3 a A4 W17 W12 W25 0 0 W26 0 0 W27 5 2 A0 r R280 "In0" A9 a A9 W28 0 0 W29 0 0 W2A 0 0 W2B 0 1 A0 r R281 "FiveCycA" W2C 0 1 A0 r R282 "TwoCycA" W5 W2D 0 0 WB W1F W9 W1C W2E 5 2 A0 r R283 "Output" A9 a A9 W11 W2 WD W8 WE W18 W1E W2F 0 1 A0 r R284 "nReqPendB" W4 W30 0 0 W16 W31 0 0 WF W3 W32 0 1 A3 a A4 W1A W15 W1B W33 0 0 W20 W34 0 0 W6 W35 0 0 W36 0 1 A0 r R285 "NeedOSB" W37 0 0 W38 5 2 A0 r R286 "In1" A9 a A9 W39 0 0 W3A 0 0 W3B 0 0 W3C 0 1 A0 r R287 "FiveCycB" W3D 0 1 A0 r R288 "TwoCycB" W3E 0 0 W3F 0 1 A0 r R289 "PopReqA" W40 0 1 A0 r R28A "nReqPendA" W41 0 1 A0 r R28B "NeedOSA" W42 0 1 A3 a A4 W19 WC W43 0 0 W7 W14 W44 0 1 A3 a A4 W45 0 0 W46 0 1 A0 r R28C "PopReqB" W47 0 1 A0 r R28D "DoneB" W48 0 1 A0 r R28E "DoneA" W21 W49 5 0 W1 W14 W2F W40 W21 0 C21 W4A 5 0 W1 W34 W1D W16 W21 0 C97 W4B 5 0 W1 W2F W15 W40 W21 0 C2A W4C 6 0 W1 W38 W27 W2E W34 W21 0 CAA W0 6 0 W1 0 2 A9 a A9 A0 r R0 W2 5 1 A0 r R286 W3 0 0 W4 0 0 W5 0 0 W6 0 0 W7 0 0 W8 5 1 A0 r R280 W9 0 0 WA 0 0 WB 0 0 WC 0 0 WD 0 0 WE 5 2 A0 r R283 A9 a A9 WF 0 0 W10 0 0 W11 0 0 W12 0 0 W13 0 0 W14 0 1 A0 r RBC W15 0 2 A9 a A9 A0 r R52 1 A0 r R28F "mux2" R54 1 W16 5 0 W1 W17 1 0 W14 W18 2 2 A0 r R93 A9 a A9 W8 W2 WE W15 W19 5 0 W1 W17 W18 WE W15 0 CAB W0 5 0 W1 0 2 A0 r R0 AA l agg n 0 W2 1 2 A0 r RBC AA ls agg n 0 W3 0 0 W4 2 1 A0 r R93 W5 5 1 AA ls agg n 0 W6 0 0 W7 0 0 W8 0 0 W9 0 0 WA 0 0 WB 5 1 AA ls agg n 0 WC 0 0 WD 0 0 WE 0 0 WF 0 0 W10 0 0 W11 5 2 A0 r R283 AA ls agg d 0 W12 0 0 W13 0 0 W14 0 0 W15 0 0 W16 0 0 W17 0 2 A0 r R52 AA l agg n 0 4 A0 r R290 "mux2b" AB r R291 "LogicMux" AC lor 1 R9D AD r R292 "Mux n=2 b=5" R54 2 W18 7 0 W1 W19 0 1 A0 r RC3 W11 W1A 0 1 A0 r RC2 W2 W4 W17 W1B 7 0 W1 W19 W1A W11 WB W5 W17 0 CAC W0 7 0 W1 0 2 A0 r R0 A9 a A9 W2 0 2 A0 r RA6 A9 a A9 W3 0 2 A0 r RC4 A9 a A9 W4 5 3 A0 r RC5 A15 a A15 A9 a A9 W5 0 0 W6 0 0 W7 0 0 W8 0 0 W9 0 0 WA 5 3 A0 r RB2 A15 a A15 A9 a A9 WB 0 0 WC 0 0 WD 0 0 WE 0 0 WF 0 0 W10 5 3 A0 r RC6 A15 a A15 A9 a A9 W11 0 0 W12 0 0 W13 0 0 W14 0 0 W15 0 0 W16 0 2 A0 r R52 A9 a A9 1 A0 r R293 "mux21bit" RA3 CAD W0 7 0 W1 0 1 A0 r R0 W2 0 2 A9 a A9 A0 r RA6 W3 0 2 A9 a A9 A0 r RC4 W4 0 2 A9 a A9 A0 r RC5 W5 0 2 A9 a A9 A0 r RB2 W6 0 2 A9 a A9 A0 r RC6 W7 0 1 A0 r R52 1 A0 r R11F R54 2 W8 8 0 W1 W2 W3 W9 0 0 W4 W5 W6 W7 WA 4 0 W1 W9 W4 W7 0 C20 WB 7 0 W1 W3 W9 W5 W6 W2 W7 0 C16 5 3 3 4 5 0 W1C 5 0 W1 W1A W3 W19 W17 0 C42 W4D 5 0 W1 W26 W1C W35 W21 0 C2A W4E 5 0 W1 W2C W26 W25 W21 0 C2A W4F 5 0 W1 W3D W35 W43 W21 0 C2A W50 6 0 W1 W2C W3 W42 W25 W21 0 C5 W51 5 0 W1 W3E W1A W45 W21 0 C2A W52 5 0 W1 W2B W3E W23 W21 0 C2A W53 6 0 W1 W3D W3 W24 W43 W21 0 C5 W54 6 0 W1 W2B W3 W32 W23 W21 0 C5 W55 5 0 W1 W3C W45 W30 W21 0 C2A W56 6 0 W1 W3C W3 W44 W30 W21 0 C5 W57 5 0 W1 W31 WC W33 W21 0 C2A W58 22 0 W48 WB W1B W18 WA WF W6 W17 W10 W5 W13 W3 W1 W21 W28 W2B W41 W40 W2A W3F W29 W2C 0 CAE W0 22 0 W1 0 1 A0 r R294 "Done" W2 0 1 A0 r R295 "OSAvail" W3 0 1 A0 r R296 "Owner" W4 0 1 A0 r R297 "Post2Cycle" W5 0 1 A0 r R298 "PostCWS" W6 0 1 A0 r R299 "PostNeedO" W7 0 1 A0 r R29A "PostNeedS" W8 0 1 A0 r R29B "PostReq" W9 0 1 A0 r R29C "Priority" WA 0 1 A0 r R29D "Shared" WB 0 1 A0 r R29E "Reset" WC 0 1 A0 r R29F "Clock" WD 0 1 A0 r R2A0 "Vdd" WE 0 1 A0 r R2A1 "Gnd" WF 0 1 A0 r R2A2 "CWSReq" W10 0 1 A0 r R2A3 "FiveCycReq" W11 0 1 A0 r R2A4 "NeedOS" W12 0 1 A0 r R2A5 "nReqPend" W13 0 1 A0 r R2A6 "OwnerAbort" W14 0 1 A0 r R2A7 "PopReq" W15 0 1 A0 r R2A8 "SetShared" W16 0 1 A0 r R2A9 "TwoCycReq" 1 A0 r R2AA "RequestControlFSMXlate" R54 1 W17 22 0 W16 W15 W14 W13 W12 W11 W10 WF WE WD WC WB WA W9 W8 W7 W6 W5 W4 W3 W2 W1 W18 22 0 WF WC W1 W10 WE W11 W2 W3 W13 W14 W4 W5 W6 W7 W8 W9 WB W15 WA W16 WD W12 0 CAF W0 22 0 W1 0 1 A0 r R2AB "CWSReq" W2 0 1 A0 r R29F W3 0 1 A0 r R2AC "Done" W4 0 1 A0 r R2AD "FiveCycReq" W5 0 1 A0 r R2A1 W6 0 1 A0 r R2AE "NeedOS" W7 0 1 A0 r R2AF "OSAvail" W8 0 1 A0 r R2B0 "Owner" W9 0 1 A0 r R2B1 "OwnerAbort" WA 0 1 A0 r R2B2 "PopReq" WB 0 1 A0 r R2B3 "Post2Cycle" WC 0 1 A0 r R2B4 "PostCWS" WD 0 1 A0 r R2B5 "PostNeedO" WE 0 1 A0 r R2B6 "PostNeedS" WF 0 1 A0 r R2B7 "PostReq" W10 0 1 A0 r R2B8 "Priority" W11 0 1 A0 r R2B9 "Reset" W12 0 1 A0 r R2BA "SetShared" W13 0 1 A0 r R2BB "Shared" W14 0 1 A0 r R2BC "TwoCycReq" W15 0 1 A0 r R2A0 W16 0 1 A0 r R2BD "nReqPend" 1 A0 r R2BE "RequestControlFSM" R54 2 W17 38 0 W1 W2 W3 W4 W5 W6 W7 W8 W9 WA WB WC WD WE WF W10 W11 W12 W13 W14 W15 W16 W18 0 1 A0 r R2BF "NxtCWSReq" W19 0 1 A0 r R2C0 "NxtFiveCycReq" W1A 0 1 A0 r R2C1 "NxtNeedOS" W1B 0 1 A0 r R2C2 "NxtOwnerAbort" W1C 0 1 A0 r R2C3 "NxtPopReq" W1D 0 1 A0 r R2C4 "NxtSetShared" W1E 0 1 A0 r R2C5 "NxtTwoCycReq" W1F 0 1 A0 r R2C6 "NxtXtra0" W20 0 1 A0 r R2C7 "NxtXtra1" W21 0 1 A0 r R2C8 "NxtnReqPend" W22 0 1 A0 r R2C9 "Xtra0" W23 0 1 A0 r R2CA "Xtra1" W24 10 0 W18 W1A W1C W1E W1D W21 W1F W19 W1B W20 W25 10 0 W1 W6 WA W14 W12 W16 W22 W4 W9 W23 W26 21 0 WF W11 WD W10 W7 WB WE W13 WC W4 W6 W3 W22 W9 W1 W8 W23 W12 W16 W14 WA W27 10 0 W18 W1A W1C W1E W1D W21 W1F W19 W1B W20 W28 5 0 W24 W25 W2 W15 W5 0 CB0 W0 5 0 W1 10 1 A0 r R2CB "in" W2 0 1 A0 r R2CC "NxtCWSReq" W3 0 1 A0 r R2CD "NxtNeedOS" W4 0 1 A0 r R2CE "NxtPopReq" W5 0 1 A0 r R2CF "NxtTwoCycReq" W6 0 1 A0 r R2D0 "NxtSetShared" W7 0 1 A0 r R2D1 "NxtnReqPend" W8 0 1 A0 r R2D2 "NxtXtra0" W9 0 1 A0 r R2D3 "NxtFiveCycReq" WA 0 1 A0 r R2D4 "NxtOwnerAbort" WB 0 1 A0 r R2D5 "NxtXtra1" WC 10 1 A0 r R2D6 "out" WD 0 1 A0 r R2D7 "CWSReq" WE 0 1 A0 r R2D8 "NeedOS" WF 0 1 A0 r R2D9 "PopReq" W10 0 1 A0 r R2DA "TwoCycReq" W11 0 1 A0 r R2DB "SetShared" W12 0 1 A0 r R2DC "nReqPend" W13 0 1 A0 r R2DD "Xtra0" W14 0 1 A0 r R2DE "FiveCycReq" W15 0 1 A0 r R2DF "OwnerAbort" W16 0 1 A0 r R2E0 "Xtra1" W17 0 1 A0 r R29F W18 0 1 A0 r R2A0 W19 0 1 A0 r R2A1 1 A0 r R2E1 "RequestControlFSMReg" R54 10 W1A 15 0 W1 WC W17 W18 W19 W1B 0 1 A3 a A4 W1C 0 1 A3 a A4 W1D 0 1 A3 a A4 W1E 0 1 A3 a A4 W1F 0 1 A3 a A4 W20 0 1 A3 a A4 W21 0 1 A3 a A4 W22 0 1 A3 a A4 W23 0 1 A3 a A4 W24 0 1 A3 a A4 W25 6 0 W18 W2 W17 WD W1B W19 0 C5 W26 6 0 W18 W3 W17 WE W1C W19 0 C5 W27 6 0 W18 W4 W17 WF W1D W19 0 C5 W28 6 0 W18 W5 W17 W10 W1E W19 0 C5 W29 6 0 W18 W6 W17 W11 W1F W19 0 C5 W2A 6 0 W18 W7 W17 W12 W20 W19 0 C5 W2B 6 0 W18 W8 W17 W13 W21 W19 0 C5 W2C 6 0 W18 W9 W17 W14 W22 W19 0 C5 W2D 6 0 W18 WA W17 W15 W23 W19 0 C5 W2E 6 0 W18 WB W17 W16 W24 W19 0 C5 W29 4 0 W26 W27 W15 W5 0 CB1 W0 4 0 W1 21 1 A0 r R2CB W2 0 1 A0 r R2B7 W3 0 1 A0 r R2B9 W4 0 1 A0 r R2B5 W5 0 1 A0 r R2B8 W6 0 1 A0 r R2AF W7 0 1 A0 r R2B3 W8 0 1 A0 r R2B6 W9 0 1 A0 r R2BB WA 0 1 A0 r R2B4 WB 0 1 A0 r R2AD WC 0 1 A0 r R2AE WD 0 1 A0 r R2AC WE 0 1 A0 r R2C9 WF 0 1 A0 r R2B1 W10 0 1 A0 r R2AB W11 0 1 A0 r R2B0 W12 0 1 A0 r R2CA W13 0 1 A0 r R2BA W14 0 1 A0 r R2BD W15 0 1 A0 r R2BC W16 0 1 A0 r R2B2 W17 10 1 A0 r R2D6 W18 0 1 A0 r R2BF W19 0 1 A0 r R2C1 W1A 0 1 A0 r R2C3 W1B 0 1 A0 r R2C5 W1C 0 1 A0 r R2C4 W1D 0 1 A0 r R2C8 W1E 0 1 A0 r R2C6 W1F 0 1 A0 r R2C0 W20 0 1 A0 r R2C2 W21 0 1 A0 r R2C7 W22 0 1 A0 r R2A0 W23 0 1 A0 r R2A1 1 A0 r R2E2 "RequestControlFSMLogic" R54 102 W24 197 0 W1 W17 W25 0 1 A0 r R2E3 "Sum0x002" W18 W26 0 1 A0 r R2E4 "Factor1x015" W27 0 1 A0 r R2E5 "Factor1x003" W28 0 1 A0 r R2E6 "NOTPostNeedO" W29 0 1 A0 r R2E7 "Factor1x017" W2A 0 1 A0 r R2E8 "Sum0x009" W19 W2B 0 1 A0 r R2E9 "Factor1x008" W2C 0 1 A0 r R2EA "NOTPostNeedS" W2D 0 1 A0 r R2EB "Factor0x016" W2E 0 1 A0 r R2EC "Factor1x026" W2F 0 1 A0 r R2ED "Sum0x008" W1A W30 0 1 A0 r R2EE "Factor1x018" W31 0 1 A0 r R2EF "Factor1x030" W32 0 1 A0 r R2F0 "Sum0x011" W33 0 1 A0 r R2F1 "Sum0x001" W1B W34 0 1 A0 r R2F2 "Factor1x007" W35 0 1 A0 r R2F3 "Factor1x001" W36 0 1 A0 r R2F4 "Sum0x007" W1C W37 0 1 A0 r R2F5 "Factor1x020" W38 0 1 A0 r R2F6 "Sum0x013" W39 0 1 A0 r R2F7 "Factor1x021" W3A 0 1 A0 r R2F8 "Factor0x007" W3B 0 1 A0 r R2F9 "Factor1x022" W3C 0 1 A0 r R2FA "Factor0x015" W3D 0 1 A0 r R2FB "Factor1x028" W3E 0 1 A0 r R2FC "NOTPostReq" W3F 0 1 A0 r R2FD "Factor0x018" W40 0 1 A0 r R2FE "NOTFactor0x018" W41 0 1 A0 r R2FF "Sum0x005" W1D W42 0 1 A0 r R300 "Factor0x008" W43 0 1 A0 r R301 "Factor1x013" W44 0 1 A0 r R302 "Factor0x012" W45 0 1 A0 r R303 "Factor1x019" W46 0 1 A0 r R304 "Sum0x006" W47 0 1 A0 r R305 "NOTPostCWS" W48 0 1 A0 r R306 "Factor1x023" W49 0 1 A0 r R307 "Factor1x012" W4A 0 1 A0 r R308 "Factor1x004" W4B 0 1 A0 r R309 "Sum0x003" W1E W4C 0 1 A0 r R30A "Factor1x000" W4D 0 1 A0 r R30B "Factor1x029" W4E 0 1 A0 r R30C "Factor0x010" W4F 0 1 A0 r R30D "Factor1x025" W50 0 1 A0 r R30E "NOTNeedOS" W51 0 1 A0 r R30F "Factor0x014" W52 0 1 A0 r R310 "Factor1x009" W53 0 1 A0 r R311 "Sum0x010" W54 0 1 A0 r R312 "NOTShared" W55 0 1 A0 r R313 "Factor1x002" W56 0 1 A0 r R314 "NOTCWSReq" W57 0 1 A0 r R315 "Factor1x010" W58 0 1 A0 r R316 "NOTOwner" W59 0 1 A0 r R317 "Factor0x013" W5A 0 1 A0 r R318 "Factor1x014" W5B 0 1 A0 r R319 "NOTDone" W5C 0 1 A0 r R31A "Factor0x004" W5D 0 1 A0 r R31B "Factor1x024" W5E 0 1 A0 r R31C "Sum0x000" W1F W5F 0 1 A0 r R31D "Factor0x005" W60 0 1 A0 r R31E "Factor1x016" W61 0 1 A0 r R31F "NOTXtra0" W62 0 1 A0 r R320 "NOTXtra0BufX10" W63 0 1 A0 r R321 "Factor0x017" W64 0 1 A0 r R322 "NOTSetShared" W65 0 1 A0 r R323 "NOTSetSharedBufX7" W66 0 1 A0 r R324 "NOTPopReq" W67 0 1 A0 r R325 "NOTOwnerAbort" W68 0 1 A0 r R326 "Factor0x003" W69 0 1 A0 r R327 "Factor0x003BufX8" W6A 0 1 A0 r R328 "Factor0x002" W6B 0 1 A0 r R329 "Factor0x002BufX7" W6C 0 1 A0 r R32A "NOTTwoCycReq" W6D 0 1 A0 r R32B "Factor0x000" W6E 0 1 A0 r R32C "Factor0x000BufX12" W6F 0 1 A0 r R32D "Factor1x006" W70 0 1 A0 r R32E "Sum0x012" W20 W71 0 1 A0 r R32F "NOTOSAvail" W72 0 1 A0 r R330 "Factor0x006" W73 0 1 A0 r R331 "Factor1x011" W74 0 1 A0 r R332 "NOTXtra1" W75 0 1 A0 r R333 "NOTXtra1BufX7" W76 0 1 A0 r R334 "NOTPriority" W77 0 1 A0 r R335 "Factor0x011" W78 0 1 A0 r R336 "NOTnReqPend" W79 0 1 A0 r R337 "Factor0x001" W7A 0 1 A0 r R338 "Factor0x001BufX11" W7B 0 1 A0 r R339 "Factor1x005" W7C 0 1 A0 r R33A "NOTPost2Cycle" W7D 0 1 A0 r R33B "NOTReset" W7E 0 1 A0 r R33C "Factor0x009" W7F 0 1 A0 r R33D "Factor1x027" W80 0 1 A0 r R33E "Sum0x004" W21 W2 W3 W4 W5 W6 W7 W8 W9 WA WB WC WD WE WF W10 W11 W12 W13 W14 W15 W16 W22 W23 W81 4 0 W57 W55 W52 W4D W82 3 0 W4B W80 W2A W83 3 0 W29 W27 W26 W84 4 0 W7A W69 W72 W15 W85 4 0 W7A W69 W77 W15 W86 2 0 W7E W28 W87 2 0 W2E W2B W88 3 0 W6E W44 W5 W89 2 0 W2D W3 W8A 4 0 W2C W14 W7 W2 W8B 2 0 W33 W32 W8C 2 0 W31 W30 W8D 3 0 W7A W6B W75 W8E 2 0 W7A W42 W8F 4 0 W45 W35 W34 W43 W90 2 0 W5E W36 W91 2 0 W35 W34 W92 4 0 W7A W42 W65 WE W93 4 0 W7A W6B W54 W75 W94 2 0 W41 W38 W95 2 0 W37 W3 W96 2 0 W3C W6C W97 4 0 W40 W3D W3B W39 W98 3 0 W3A W65 W12 W99 3 0 W69 W3A W4E W9A 4 0 WD WB W78 W62 W9B 2 0 W5F W3C W9C 3 0 WD W78 W75 W9D 2 0 W3E W14 W9E 2 0 W4B W46 W9F 2 0 W45 W43 WA0 3 0 W7A W42 W62 WA1 3 0 W5B W75 W15 WA2 3 0 W6E W44 W76 WA3 3 0 W65 W62 W16 WA4 3 0 W4A W49 W48 WA5 2 0 W7E W47 WA6 3 0 W6E W72 W62 WA7 3 0 W6E W77 W62 WA8 2 0 W5E W53 WA9 4 0 W52 W4F W4D W4C WAA 4 0 W6E W6B W69 W11 WAB 3 0 W6E W6B W62 WAC 4 0 W7A W69 W5C W4E WAD 2 0 W50 W6C WAE 4 0 W7A W69 W5C W51 WAF 3 0 W10 W50 W6C WB0 4 0 W5D W5A W57 W55 WB1 4 0 W6E W6B W54 W62 WB2 4 0 W6E W5C W56 W65 WB3 4 0 W6E W6B W69 W59 WB4 2 0 W58 W9 WB5 3 0 W6E W5C W65 WB6 3 0 WB W5B W62 WB7 2 0 W6F W60 WB8 3 0 WD W6E W5F WB9 4 0 W66 W65 W62 WF WBA 4 0 W6E W6B W69 W63 WBB 2 0 W62 W11 WBC 3 0 W67 W66 W65 WBD 3 0 WC W6 W5 WBE 4 0 W78 W7D W6C W75 WBF 3 0 W7F W7B W73 WC0 3 0 W7A W72 W75 WC1 2 0 WC W71 WC2 3 0 W7A W77 W75 WC3 2 0 WC W76 WC4 2 0 W78 W7D WC5 2 0 W7E W7C WC6 4 0 W7D W14 W8 W2 WC7 4 0 W22 W25 W18 W23 0 C20 WC8 4 0 W22 W23 W81 W25 0 C73 WC9 4 0 W22 W23 W82 W19 0 C3B WCA 4 0 W22 W23 W83 W2A 0 C61 WCB 4 0 W22 W23 W84 W26 0 C73 WCC 4 0 W22 W23 W85 W27 0 C73 WCD 4 0 W22 W23 W86 W29 0 C22 WCE 4 0 W22 W4 W28 W23 0 C20 WCF 4 0 W22 W2F W1A W23 0 C20 WD0 4 0 W22 W23 W87 W2F 0 C22 WD1 4 0 W22 W23 W88 W2B 0 C61 WD2 4 0 W22 W23 W89 W2E 0 C22 WD3 4 0 W22 W23 W8A W2D 0 C38 WD4 4 0 W22 W8 W2C W23 0 C20 WD5 4 0 W22 W23 W8B W1B 0 C2B WD6 4 0 W22 W23 W8C W32 0 C22 WD7 4 0 W22 W23 W8D W30 0 C61 WD8 4 0 W22 W23 W8E W31 0 C22 WD9 4 0 W22 W23 W8F W33 0 C73 WDA 4 0 W22 W23 W90 W1C 0 C2B WDB 4 0 W22 W23 W91 W36 0 C22 WDC 4 0 W22 W23 W92 W34 0 C73 WDD 4 0 W22 W23 W93 W35 0 C73 WDE 4 0 W22 W23 W94 W1D 0 C2B WDF 4 0 W22 W23 W95 W38 0 C22 WE0 4 0 W22 W23 W96 W37 0 C22 WE1 4 0 W22 W23 W97 W41 0 C73 WE2 4 0 W22 W23 W98 W39 0 C61 WE3 4 0 W22 W23 W99 W3B 0 C61 WE4 4 0 W22 W23 W9A W3A 0 C38 WE5 4 0 W22 W23 W9B W3D 0 C22 WE6 4 0 W22 W23 W9C W3C 0 C3B WE7 4 0 W22 W3F W40 W23 0 C20 WE8 4 0 W22 W23 W9D W3F 0 C2B WE9 4 0 W22 W2 W3E W23 0 C20 WEA 4 0 W22 W23 W9E W1E 0 C2B WEB 4 0 W22 W23 W9F W46 0 C22 WEC 4 0 W22 W23 WA0 W43 0 C61 WED 4 0 W22 W23 WA1 W42 0 C3B WEE 4 0 W22 W23 WA2 W45 0 C61 WEF 4 0 W22 W23 WA3 W44 0 C3B WF0 4 0 W22 W23 WA4 W4B 0 C61 WF1 4 0 W22 W23 WA5 W48 0 C22 WF2 4 0 W22 WA W47 W23 0 C20 WF3 4 0 W22 W23 WA6 W49 0 C61 WF4 4 0 W22 W23 WA7 W4A 0 C61 WF5 4 0 W22 W23 WA8 W1F 0 C2B WF6 4 0 W22 W23 WA9 W53 0 C73 WF7 4 0 W22 W23 WAA W4C 0 C73 WF8 4 0 W22 W23 WAB W4D 0 C61 WF9 4 0 W22 W23 WAC W4F 0 C73 WFA 4 0 W22 W23 WAD W4E 0 C2B WFB 4 0 W22 W23 WAE W52 0 C73 WFC 4 0 W22 W23 WAF W51 0 C3B WFD 4 0 W22 WC W50 W23 0 C20 WFE 4 0 W22 W23 WB0 W5E 0 C73 WFF 4 0 W22 W23 WB1 W55 0 C73 W100 4 0 W22 W9 W54 W23 0 C20 W101 4 0 W22 W23 WB2 W57 0 C73 W102 4 0 W22 W10 W56 W23 0 C20 W103 4 0 W22 W23 WB3 W5A 0 C73 W104 4 0 W22 W23 WB4 W59 0 C2B W105 4 0 W22 W11 W58 W23 0 C20 W106 4 0 W22 W23 WB5 W5D 0 C61 W107 4 0 W22 W23 WB6 W5C 0 C3B W108 4 0 W22 WD W5B W23 0 C20 W109 4 0 W22 W70 W20 W23 0 C20 W10A 4 0 W22 W23 WB7 W70 0 C22 W10B 4 0 W22 W23 WB8 W60 0 C61 W10C 4 0 W22 W23 WB9 W5F 0 C38 W10D 4 0 W22 W23 WBA W6F 0 C73 W10E 4 0 W22 W23 WBB W63 0 C2B W10F 4 0 W22 W62 W61 W23 0 C1C W110 4 0 W22 WE W61 W23 0 C20 W111 4 0 W22 W68 W69 W23 0 C49 W112 4 0 W22 W23 WBC W68 0 C3B W113 4 0 W22 W64 W65 W23 0 C49 W114 4 0 W22 W13 W64 W23 0 C20 W115 4 0 W22 W16 W66 W23 0 C20 W116 4 0 W22 WF W67 W23 0 C20 W117 4 0 W22 W6A W6B W23 0 C49 W118 4 0 W22 W23 WBD W6A 0 C3B W119 4 0 W22 W6E W6D W23 0 C1C W11A 4 0 W22 W23 WBE W6D 0 C38 W11B 4 0 W22 W15 W6C W23 0 C20 W11C 4 0 W22 W80 W21 W23 0 C20 W11D 4 0 W22 W23 WBF W80 0 C61 W11E 4 0 W22 W23 WC0 W73 0 C61 W11F 4 0 W22 W23 WC1 W72 0 C2B W120 4 0 W22 W6 W71 W23 0 C20 W121 4 0 W22 W23 WC2 W7B 0 C61 W122 4 0 W22 W74 W75 W23 0 C49 W123 4 0 W22 W12 W74 W23 0 C20 W124 4 0 W22 W23 WC3 W77 0 C2B W125 4 0 W22 W5 W76 W23 0 C20 W126 4 0 W22 W7A W79 W23 0 C1C W127 4 0 W22 W23 WC4 W79 0 C2B W128 4 0 W22 W14 W78 W23 0 C20 W129 4 0 W22 W23 WC5 W7F 0 C22 W12A 4 0 W22 W7 W7C W23 0 C20 W12B 4 0 W22 W23 WC6 W7E 0 C38 W12C 4 0 W22 W3 W7D W23 0 C20 W59 7 0 W1 W20 W31 W2D W37 W33 W21 0 C37 W5A 6 0 W1 WB W31 W10 W41 W21 0 C3A W5B 6 0 W1 WB W33 W7 W36 W21 0 C3A W5C 5 0 W1 W10 W2D W3F W21 0 C2A W5D 5 0 W1 W7 W37 W46 W21 0 C2A W5E 22 0 W47 WB W1B W18 WA WF W6 W1F W7 W5 W13 W3 W1 W21 W39 W3C W36 W2F W3B W46 W3A W3D 0 CAE W5F 5 0 W1 W12 W1E W17 W21 0 C24 W60 5 0 W1 W9 W1E W1F W21 0 C24 W61 6 0 W1 W19 W4 W1D W48 W21 0 C45 W62 6 0 W1 W16 W4 W1D W47 W21 0 C45 W175 5 0 W1 W12C W12F W155 W118 0 C32 W176 5 0 W1 W165 W15C W158 W118 0 C32 W177 5 0 W1 W140 W11A W15D W118 0 C32 W178 34 0 W113 W114 W115 W116 W117 W18 W154 W13D W142 W12 W7F W1 W118 W11B W12F W14F W162 W139 W151 W152 W157 W148 WB W128 W159 W134 WA5 W135 W12C W166 W15E W146 W147 W168 0 CB2 W0 34 0 W1 0 1 A0 r R33F "Command0" W2 0 1 A0 r R340 "Command1" W3 0 1 A0 r R341 "Command2" W4 0 1 A0 r R342 "Command3" W5 0 1 A0 r R343 "Command4" W6 0 1 A0 r R344 "DataAvailable" W7 0 1 A0 r R345 "DelayDone" W8 0 1 A0 r R346 "RefreshReq" W9 0 1 A0 r R347 "TwoReqPending" WA 0 1 A0 r R29E WB 0 1 A0 r R29F WC 0 1 A0 r R2A0 WD 0 1 A0 r R2A1 WE 0 1 A0 r R348 "CmdIdle" WF 0 1 A0 r R349 "EnbCAdd" W10 0 1 A0 r R34A "Post2Cycle" W11 0 1 A0 r R34B "PostCWS" W12 0 1 A0 r R34C "PostNeedO" W13 0 1 A0 r R34D "PostNeedS" W14 0 1 A0 r R34E "PostReq" W15 0 1 A0 r R34F "Precharge" W16 0 1 A0 r R350 "Read" W17 0 1 A0 r R351 "Refresh" W18 0 1 A0 r R352 "ReplyBufWrAdd" W19 0 1 A0 r R353 "ReplyBufWrEn" W1A 0 1 A0 r R354 "SelIORdData" W1B 0 1 A0 r R355 "StartA" W1C 0 1 A0 r R356 "SwWPort" W1D 0 1 A0 r R357 "Unload" W1E 0 1 A0 r R358 "WrCtlReg" W1F 0 1 A0 r R359 "Write" W20 0 1 A0 r R35A "WriteBufWrAdd0" W21 0 1 A0 r R35B "WriteBufWrAdd1" W22 0 1 A0 r R35C "WriteBufWrEn" 1 A0 r R35D "CommandDecodeFSMXlate" R54 1 W23 34 0 W22 W21 W20 W1F W1E W1D W1C W1B W1A W19 W18 W17 W16 W15 W14 W13 W12 W11 W10 WF WE WD WC WB WA W9 W8 W7 W6 W5 W4 W3 W2 W1 W24 34 0 WB WE W1 W2 W3 W4 W5 W6 W7 WF WD W10 W11 W12 W13 W14 W15 W16 W17 W8 W18 W19 WA W1A W1B W1C W9 W1D WC W1E W1F W20 W21 W22 0 CB3 W0 34 0 W1 0 1 A0 r R29F W2 0 1 A0 r R35E "CmdIdle" W3 0 1 A0 r R35F "Command0" W4 0 1 A0 r R360 "Command1" W5 0 1 A0 r R361 "Command2" W6 0 1 A0 r R362 "Command3" W7 0 1 A0 r R363 "Command4" W8 0 1 A0 r R364 "DataAvailable" W9 0 1 A0 r R365 "DelayDone" WA 0 1 A0 r R366 "EnbCAdd" WB 0 1 A0 r R2A1 WC 0 1 A0 r R367 "Post2Cycle" WD 0 1 A0 r R368 "PostCWS" WE 0 1 A0 r R369 "PostNeedO" WF 0 1 A0 r R36A "PostNeedS" W10 0 1 A0 r R36B "PostReq" W11 0 1 A0 r R36C "Precharge" W12 0 1 A0 r R36D "Read" W13 0 1 A0 r R36E "Refresh" W14 0 1 A0 r R36F "RefreshReq" W15 0 1 A0 r R370 "ReplyBufWrAdd" W16 0 1 A0 r R371 "ReplyBufWrEn" W17 0 1 A0 r R372 "Reset" W18 0 1 A0 r R373 "SelIORdData" W19 0 1 A0 r R374 "StartA" W1A 0 1 A0 r R375 "SwWPort" W1B 0 1 A0 r R376 "TwoReqPending" W1C 0 1 A0 r R377 "Unload" W1D 0 1 A0 r R2A0 W1E 0 1 A0 r R378 "WrCtlReg" W1F 0 1 A0 r R379 "Write" W20 0 1 A0 r R37A "WriteBufWrAdd0" W21 0 1 A0 r R37B "WriteBufWrAdd1" W22 0 1 A0 r R37C "WriteBufWrEn" 1 A0 r R37D "CommandDecodeFSM" R54 2 W23 63 0 W1 W2 W3 W4 W5 W6 W7 W8 W9 WA WB WC WD WE WF W10 W11 W12 W13 W14 W15 W16 W17 W18 W19 W1A W1B W1C W1D W1E W1F W20 W21 W22 W24 0 1 A0 r R37E "NxtCmdIdle" W25 0 1 A0 r R37F "NxtEnbCAdd" W26 0 1 A0 r R380 "NxtPost2Cycle" W27 0 1 A0 r R381 "NxtPostCWS" W28 0 1 A0 r R382 "NxtPostNeedO" W29 0 1 A0 r R383 "NxtPostNeedS" W2A 0 1 A0 r R384 "NxtPostReq" W2B 0 1 A0 r R385 "NxtPrecharge" W2C 0 1 A0 r R386 "NxtRead" W2D 0 1 A0 r R387 "NxtRefresh" W2E 0 1 A0 r R388 "NxtReplyBufWrAdd" W2F 0 1 A0 r R389 "NxtReplyBufWrEn" W30 0 1 A0 r R38A "NxtSelIORdData" W31 0 1 A0 r R38B "NxtStartA" W32 0 1 A0 r R38C "NxtSwWPort" W33 0 1 A0 r R38D "NxtUnload" W34 0 1 A0 r R38E "NxtWrCtlReg" W35 0 1 A0 r R38F "NxtWrite" W36 0 1 A0 r R390 "NxtWriteBufWrAdd0" W37 0 1 A0 r R391 "NxtWriteBufWrAdd1" W38 0 1 A0 r R392 "NxtWriteBufWrEn" W39 0 1 A0 r R393 "NxtXtra0" W3A 0 1 A0 r R394 "NxtXtra1" W3B 0 1 A0 r R395 "Xtra0" W3C 0 1 A0 r R396 "Xtra1" W3D 23 0 W3A W34 W24 W2C W31 W39 W35 W30 W2A W29 W2F W36 W2B W26 W38 W2D W37 W2E W32 W25 W33 W27 W28 W3E 23 0 W3C W1E W2 W12 W19 W3B W1F W18 W10 WF W16 W20 W11 WC W22 W13 W21 W15 W1A WA W1C WD WE W3F 32 0 W3B W3C W10 W15 W17 W12 W2 W3 W4 W5 W6 W7 W11 W19 W9 W1F W1C WE WF WA W1B W1E WD W14 W16 W1A W20 W21 W8 W13 W22 WC W40 23 0 W3A W34 W24 W2C W31 W39 W35 W30 W2A W29 W2F W36 W2B W26 W38 W2D W37 W2E W32 W25 W33 W27 W28 W41 5 0 W3D W3E W1 W1D WB 0 CB4 W0 5 0 W1 23 1 A0 r R2CB W2 0 1 A0 r R397 "NxtXtra1" W3 0 1 A0 r R398 "NxtWrCtlReg" W4 0 1 A0 r R399 "NxtCmdIdle" W5 0 1 A0 r R39A "NxtRead" W6 0 1 A0 r R39B "NxtStartA" W7 0 1 A0 r R39C "NxtXtra0" W8 0 1 A0 r R39D "NxtWrite" W9 0 1 A0 r R39E "NxtSelIORdData" WA 0 1 A0 r R39F "NxtPostReq" WB 0 1 A0 r R3A0 "NxtPostNeedS" WC 0 1 A0 r R3A1 "NxtReplyBufWrEn" WD 0 1 A0 r R3A2 "NxtWriteBufWrAdd0" WE 0 1 A0 r R3A3 "NxtPrecharge" WF 0 1 A0 r R3A4 "NxtPost2Cycle" W10 0 1 A0 r R3A5 "NxtWriteBufWrEn" W11 0 1 A0 r R3A6 "NxtRefresh" W12 0 1 A0 r R3A7 "NxtWriteBufWrAdd1" W13 0 1 A0 r R3A8 "NxtReplyBufWrAdd" W14 0 1 A0 r R3A9 "NxtSwWPort" W15 0 1 A0 r R3AA "NxtEnbCAdd" W16 0 1 A0 r R3AB "NxtUnload" W17 0 1 A0 r R3AC "NxtPostCWS" W18 0 1 A0 r R3AD "NxtPostNeedO" W19 23 1 A0 r R2D6 W1A 0 1 A0 r R3AE "Xtra1" W1B 0 1 A0 r R3AF "WrCtlReg" W1C 0 1 A0 r R3B0 "CmdIdle" W1D 0 1 A0 r R3B1 "Read" W1E 0 1 A0 r R3B2 "StartA" W1F 0 1 A0 r R3B3 "Xtra0" W20 0 1 A0 r R3B4 "Write" W21 0 1 A0 r R373 W22 0 1 A0 r R3B5 "PostReq" W23 0 1 A0 r R3B6 "PostNeedS" W24 0 1 A0 r R3B7 "ReplyBufWrEn" W25 0 1 A0 r R3B8 "WriteBufWrAdd0" W26 0 1 A0 r R3B9 "Precharge" W27 0 1 A0 r R3BA "Post2Cycle" W28 0 1 A0 r R3BB "WriteBufWrEn" W29 0 1 A0 r R3BC "Refresh" W2A 0 1 A0 r R3BD "WriteBufWrAdd1" W2B 0 1 A0 r R3BE "ReplyBufWrAdd" W2C 0 1 A0 r R3BF "SwWPort" W2D 0 1 A0 r R3C0 "EnbCAdd" W2E 0 1 A0 r R3C1 "Unload" W2F 0 1 A0 r R3C2 "PostCWS" W30 0 1 A0 r R3C3 "PostNeedO" W31 0 1 A0 r R29F W32 0 1 A0 r R2A0 W33 0 1 A0 r R2A1 1 A0 r R3C4 "CommandDecodeFSMReg" R54 23 W34 28 0 W1 W19 W31 W32 W33 W35 0 1 A3 a A4 W36 0 1 A3 a A4 W37 0 1 A3 a A4 W38 0 1 A3 a A4 W39 0 1 A3 a A4 W3A 0 1 A3 a A4 W3B 0 1 A3 a A4 W3C 0 1 A3 a A4 W3D 0 1 A3 a A4 W3E 0 1 A3 a A4 W3F 0 1 A3 a A4 W40 0 1 A3 a A4 W41 0 1 A3 a A4 W42 0 1 A3 a A4 W43 0 1 A3 a A4 W44 0 1 A3 a A4 W45 0 1 A3 a A4 W46 0 1 A3 a A4 W47 0 1 A3 a A4 W48 0 1 A3 a A4 W49 0 1 A3 a A4 W4A 0 1 A3 a A4 W4B 0 1 A3 a A4 W4C 6 0 W32 W2 W31 W1A W35 W33 0 C5 W4D 6 0 W32 W3 W31 W1B W36 W33 0 C5 W4E 6 0 W32 W4 W31 W1C W37 W33 0 C5 W4F 6 0 W32 W5 W31 W1D W38 W33 0 C5 W50 6 0 W32 W6 W31 W1E W39 W33 0 C5 W51 6 0 W32 W7 W31 W1F W3A W33 0 C5 W52 6 0 W32 W8 W31 W20 W3B W33 0 C5 W53 6 0 W32 W9 W31 W21 W3C W33 0 C5 W54 6 0 W32 WA W31 W22 W3D W33 0 C5 W55 6 0 W32 WB W31 W23 W3E W33 0 C5 W56 6 0 W32 WC W31 W24 W3F W33 0 C5 W57 6 0 W32 WD W31 W25 W40 W33 0 C5 W58 6 0 W32 WE W31 W26 W41 W33 0 C5 W59 6 0 W32 WF W31 W27 W42 W33 0 C5 W5A 6 0 W32 W10 W31 W28 W43 W33 0 C5 W5B 6 0 W32 W11 W31 W29 W44 W33 0 C5 W5C 6 0 W32 W12 W31 W2A W45 W33 0 C5 W5D 6 0 W32 W13 W31 W2B W46 W33 0 C5 W5E 6 0 W32 W14 W31 W2C W47 W33 0 C5 W5F 6 0 W32 W15 W31 W2D W48 W33 0 C5 W60 6 0 W32 W16 W31 W2E W49 W33 0 C5 W61 6 0 W32 W17 W31 W2F W4A W33 0 C5 W62 6 0 W32 W18 W31 W30 W4B W33 0 C5 W42 4 0 W3F W40 W1D WB 0 CB5 W0 4 0 W1 32 1 A0 r R2CB W2 0 1 A0 r R395 W3 0 1 A0 r R396 W4 0 1 A0 r R36B W5 0 1 A0 r R370 W6 0 1 A0 r R372 W7 0 1 A0 r R36D W8 0 1 A0 r R35E W9 0 1 A0 r R35F WA 0 1 A0 r R360 WB 0 1 A0 r R361 WC 0 1 A0 r R362 WD 0 1 A0 r R363 WE 0 1 A0 r R36C WF 0 1 A0 r R374 W10 0 1 A0 r R365 W11 0 1 A0 r R379 W12 0 1 A0 r R377 W13 0 1 A0 r R369 W14 0 1 A0 r R36A W15 0 1 A0 r R366 W16 0 1 A0 r R376 W17 0 1 A0 r R378 W18 0 1 A0 r R368 W19 0 1 A0 r R36F W1A 0 1 A0 r R371 W1B 0 1 A0 r R375 W1C 0 1 A0 r R37A W1D 0 1 A0 r R37B W1E 0 1 A0 r R364 W1F 0 1 A0 r R36E W20 0 1 A0 r R37C W21 0 1 A0 r R367 W22 23 1 A0 r R2D6 W23 0 1 A0 r R394 W24 0 1 A0 r R38E W25 0 1 A0 r R37E W26 0 1 A0 r R386 W27 0 1 A0 r R38B W28 0 1 A0 r R393 W29 0 1 A0 r R38F W2A 0 1 A0 r R38A W2B 0 1 A0 r R384 W2C 0 1 A0 r R383 W2D 0 1 A0 r R389 W2E 0 1 A0 r R390 W2F 0 1 A0 r R385 W30 0 1 A0 r R380 W31 0 1 A0 r R392 W32 0 1 A0 r R387 W33 0 1 A0 r R391 W34 0 1 A0 r R388 W35 0 1 A0 r R38C W36 0 1 A0 r R37F W37 0 1 A0 r R38D W38 0 1 A0 r R381 W39 0 1 A0 r R382 W3A 0 1 A0 r R2A0 W3B 0 1 A0 r R2A1 1 A0 r R3C5 "CommandDecodeFSMLogic" R54 177 W3C 334 0 W1 W22 W3D 0 1 A0 r R3C6 "Factor1x022" W3E 0 1 A0 r R3C7 "Sum0x018" W3F 0 1 A0 r R3C8 "Factor0x027" W40 0 1 A0 r R3C9 "Factor1x002" W41 0 1 A0 r R3CA "Sum0x007" W23 W25 W42 0 1 A0 r R3CB "Sum0x008" W27 W43 0 1 A0 r R3CC "Factor1x034" W44 0 1 A0 r R3CD "Factor0x035" W45 0 1 A0 r R3CE "Factor1x031" W46 0 1 A0 r R3CF "Sum0x017" W47 0 1 A0 r R3D0 "Factor0x039" W48 0 1 A0 r R3D1 "Factor1x000" W49 0 1 A0 r R3D2 "Factor0x023" W4A 0 1 A0 r R3D3 "Factor1x008" W4B 0 1 A0 r R3D4 "Factor0x022" W4C 0 1 A0 r R3D5 "Factor1x027" W4D 0 1 A0 r R3D6 "Factor0x010" W4E 0 1 A0 r R3D7 "Factor1x042" W4F 0 1 A0 r R3D8 "Sum0x014" W28 W50 0 1 A0 r R3D9 "Factor0x021" W51 0 1 A0 r R3DA "Factor1x018" W52 0 1 A0 r R3DB "Factor1x017" W53 0 1 A0 r R3DC "Sum0x015" W29 W54 0 1 A0 r R3DD "NOTTerm16" W2B W55 0 1 A0 r R3DE "Sum0x010" W56 0 1 A0 r R3DF "NOTTerm33" W2C W26 W57 0 1 A0 r R3E0 "Sum0x005" W2D W2E W58 0 1 A0 r R3E1 "Factor0x041" W59 0 1 A0 r R3E2 "Factor1x021" W5A 0 1 A0 r R3E3 "Factor1x032" W5B 0 1 A0 r R3E4 "Factor0x019" W5C 0 1 A0 r R3E5 "Factor1x009" W5D 0 1 A0 r R3E6 "Sum0x012" W2F W5E 0 1 A0 r R3E7 "Sum0x009" W5F 0 1 A0 r R3E8 "Factor1x007" W60 0 1 A0 r R3E9 "Sum0x002" W30 W31 W61 0 1 A0 r R3EA "Factor1x012" W62 0 1 A0 r R3EB "Factor0x009" W63 0 1 A0 r R3EC "Factor1x039" W64 0 1 A0 r R3ED "Factor0x015" W65 0 1 A0 r R3EE "Factor1x040" W66 0 1 A0 r R3EF "Sum0x016" W67 0 1 A0 r R3F0 "Factor1x001" W68 0 1 A0 r R3F1 "Factor0x036" W69 0 1 A0 r R3F2 "Factor1x030" W6A 0 1 A0 r R3F3 "Factor1x006" W6B 0 1 A0 r R3F4 "Sum0x004" W32 W6C 0 1 A0 r R3F5 "NOTTerm13" W6D 0 1 A0 r R3F6 "NOTTerm09" W33 W34 W6E 0 1 A0 r R3F7 "Factor0x034" W6F 0 1 A0 r R3F8 "Factor0x016" W70 0 1 A0 r R3F9 "Factor1x014" W71 0 1 A0 r R3FA "Factor0x037" W72 0 1 A0 r R3FB "Factor1x020" W73 0 1 A0 r R3FC "Sum0x011" W74 0 1 A0 r R3FD "NOTEnbCAdd" W75 0 1 A0 r R3FE "Factor0x024" W2A W76 0 1 A0 r R3FF "NOTPostNeedS" W77 0 1 A0 r R400 "Factor0x040" W78 0 1 A0 r R401 "Factor1x005" W79 0 1 A0 r R402 "NOTPostCWS" W7A 0 1 A0 r R403 "Factor0x032" W7B 0 1 A0 r R404 "Factor0x000" W7C 0 1 A0 r R405 "Factor0x000BufX12" W7D 0 1 A0 r R406 "Factor1x011" W7E 0 1 A0 r R407 "Sum0x000" W7F 0 1 A0 r R408 "Factor1x036" W80 0 1 A0 r R409 "NOTTerm29" W35 W81 0 1 A0 r R40A "Factor0x031" W82 0 1 A0 r R40B "Factor1x035" W83 0 1 A0 r R40C "NOTReplyBufWrEn" W84 0 1 A0 r R40D "Factor0x008" W85 0 1 A0 r R40E "Factor1x026" W86 0 1 A0 r R40F "Sum0x013" W87 0 1 A0 r R410 "Factor0x028" W88 0 1 A0 r R411 "NOTWrCtlReg" W89 0 1 A0 r R412 "NOTWrCtlRegBufX5" W8A 0 1 A0 r R413 "Factor0x011" W8B 0 1 A0 r R414 "Factor1x038" W8C 0 1 A0 r R415 "Factor0x012" W8D 0 1 A0 r R416 "Factor1x033" W8E 0 1 A0 r R417 "NOTRefreshReq" W8F 0 1 A0 r R418 "NOTPostReq" W90 0 1 A0 r R419 "NOTDataAvailable" W91 0 1 A0 r R41A "EnbCAddBufX5" W92 0 1 A0 r R41B "Factor0x026" W93 0 1 A0 r R41C "NOTWriteBufWrEn" W94 0 1 A0 r R41D "NOTWriteBufWrEnBufX5" W95 0 1 A0 r R41E "Factor0x025" W96 0 1 A0 r R41F "NOTRefresh" W97 0 1 A0 r R420 "Factor0x007" W98 0 1 A0 r R421 "Factor0x007BufX7" W99 0 1 A0 r R422 "NOTWrite" W9A 0 1 A0 r R423 "NOTWriteBufX6" W9B 0 1 A0 r R424 "NOTSwWPort" W9C 0 1 A0 r R425 "NOTStartA" W9D 0 1 A0 r R426 "NOTStartABufX8" W9E 0 1 A0 r R427 "Factor0x003" W9F 0 1 A0 r R428 "Factor0x003BufX9" WA0 0 1 A0 r R429 "Factor1x028" WA1 0 1 A0 r R42A "Sum0x006" WA2 0 1 A0 r R42B "Factor1x023" WA3 0 1 A0 r R42C "Factor1x004" WA4 0 1 A0 r R42D "Sum0x003" WA5 0 1 A0 r R42E "Factor0x014" WA6 0 1 A0 r R42F "Factor1x037" WA7 0 1 A0 r R430 "NOTTerm10" W36 WA8 0 1 A0 r R431 "Factor0x030" WA9 0 1 A0 r R432 "Factor0x013" WAA 0 1 A0 r R433 "Factor1x019" WAB 0 1 A0 r R434 "Factor1x019BufX5" WAC 0 1 A0 r R435 "Factor0x038" WAD 0 1 A0 r R436 "Factor1x015" WAE 0 1 A0 r R437 "NOTWriteBufWrAdd1" WAF 0 1 A0 r R438 "NOTWriteBufWrAdd0" WB0 0 1 A0 r R439 "Factor0x033" WB1 0 1 A0 r R43A "Factor0x005" WB2 0 1 A0 r R43B "Factor0x005BufX5" WB3 0 1 A0 r R43C "Factor1x029" WB4 0 1 A0 r R43D "Factor1x010" WB5 0 1 A0 r R43E "Sum0x001" WB6 0 1 A0 r R43F "ReplyBufWrEnBufX5" WB7 0 1 A0 r R440 "Factor0x020" WB8 0 1 A0 r R441 "Factor0x004" WB9 0 1 A0 r R442 "NOTXtra0" WBA 0 1 A0 r R443 "NOTXtra0BufX5" WBB 0 1 A0 r R444 "Factor0x002" WBC 0 1 A0 r R445 "Factor0x002BufX11" WBD 0 1 A0 r R446 "Factor1x003" WBE 0 1 A0 r R447 "NOTTerm25" WBF 0 1 A0 r R448 "NOTCommand2" WC0 0 1 A0 r R449 "Factor0x018" W24 WC1 0 1 A0 r R44A "NOTTerm06" W37 WC2 0 1 A0 r R44B "Command3BufX6" WC3 0 1 A0 r R44C "NOTCommand3" WC4 0 1 A0 r R44D "NOTCommand0" WC5 0 1 A0 r R44E "Factor0x017" WC6 0 1 A0 r R44F "NOTTwoReqPending" WC7 0 1 A0 r R450 "NOTCommand4" WC8 0 1 A0 r R451 "NOTCommand1" WC9 0 1 A0 r R452 "Factor0x006" WCA 0 1 A0 r R453 "Factor0x006BufX7" WCB 0 1 A0 r R454 "Factor0x001" WCC 0 1 A0 r R455 "Factor0x001BufX10" W38 WCD 0 1 A0 r R456 "DelayDoneBufX6" WCE 0 1 A0 r R457 "NOTDelayDone" WCF 0 1 A0 r R458 "NOTDelayDoneBufX6" WD0 0 1 A0 r R459 "Xtra0BufX5" WD1 0 1 A0 r R45A "NOTXtra1" WD2 0 1 A0 r R45B "NOTXtra1BufX12" WD3 0 1 A0 r R45C "NOTReset" WD4 0 1 A0 r R45D "NOTResetBufX6" WD5 0 1 A0 r R45E "NOTPrecharge" WD6 0 1 A0 r R45F "Factor0x029" W39 W2 W3 W4 W5 W6 W7 W8 W9 WA WB WC WD WE WF W10 W11 W12 W13 W14 W15 W16 W17 W18 W19 W1A W1B W1C W1D W1E W1F W20 W21 W3A W3B WD7 3 0 W6B W41 W3E WD8 3 0 W4A W3D W48 WD9 4 0 WCD W98 WD2 W6 WDA 4 0 W5C W4E W4C W40 WDB 4 0 W7C W9F W98 W3F WDC 4 0 W83 W13 W14 W4 WDD 2 0 WA1 W86 WDE 2 0 W6C W42 WDF 3 0 W69 W65 W26 WE0 2 0 W4F W46 WE1 3 0 W5A W45 W43 WE2 2 0 W4D WE WE3 4 0 W7C W8A W44 W9D WE4 2 0 W9B W7 WE5 4 0 W4E W4C W4A W48 WE6 4 0 W7C W9F W98 W47 WE7 2 0 W74 W8F WE8 4 0 W7C W9F W98 W49 WE9 4 0 W8 W1E W8F W8E WEA 2 0 W4B WD2 WEB 4 0 W8E WD4 W16 WD0 WEC 2 0 W4D WD2 WED 3 0 WCF WD4 WD0 WEE 2 0 W6C W53 WEF 2 0 W52 W51 WF0 4 0 WBC WB8 W50 W9D WF1 2 0 W11 W1C WF2 3 0 WCD W7C W9A WF3 4 0 W54 W56 W60 WA4 WF4 2 0 W56 W55 WF5 2 0 W38 WA2 WF6 4 0 W7E W60 WA4 W57 WF7 4 0 WAB W72 W26 W70 WF8 3 0 WCC WCA WA9 WF9 2 0 W6C WBE WFA 4 0 W5C W5A W59 W7F WFB 4 0 WBC W62 W58 WCF WFC 3 0 W83 W9D W94 WFD 3 0 W7C WCF W9A WFE 4 0 WBC W5B WCF WD2 WFF 2 0 W9D W1F W100 2 0 W60 W5E W101 3 0 WAB WA3 WA2 W102 4 0 W5F WB4 W24 WA6 W103 4 0 WC2 WCC WCA WC4 W104 2 0 WBE WB5 W105 2 0 W6B W66 W106 3 0 W65 W63 W61 W107 4 0 WCD WBC W84 W62 W108 4 0 WBC W84 W62 W9D W109 2 0 W9B W1F W10A 4 0 W7C W9F W98 W64 W10B 4 0 W8 W91 W8F W19 W10C 3 0 W6A W69 W67 W10D 4 0 WCD WBC W96 WD2 W10E 2 0 WCC W68 W10F 2 0 W19 W16 W110 4 0 WBC W96 W9D WD2 W111 2 0 W6D W6C W112 2 0 W7E W73 W113 3 0 W80 W7E W73 W114 2 0 W72 W70 W115 4 0 W7C W9F W6F W6E W116 2 0 W4 WB6 W117 4 0 W91 W89 W18 W14 W118 3 0 W7C WB2 W71 W119 3 0 W9A W12 W17 W11A 4 0 W7D W78 W2A WB3 W11B 4 0 W7C W9F WB2 W75 W11C 3 0 W74 W76 W89 W11D 4 0 W7C W9F WB2 W77 W11E 2 0 W76 W89 W11F 4 0 W7C W9F WB2 W7A W120 3 0 W91 W79 W89 W121 4 0 WD4 W94 WBA WD2 W122 4 0 WBC W98 WCF WD2 W123 4 0 WA7 WA4 WA1 W86 W124 2 0 W85 W82 W125 3 0 W84 W8C W81 W126 2 0 W96 W9D W127 3 0 W84 W8C W9B W128 3 0 W83 W9A W94 W129 4 0 W6 WA0 W8D W8B W12A 3 0 W8A W87 W3 W12B 4 0 W94 WBA W5 W1B W12C 3 0 W89 W9A WB6 W12D 2 0 W8C WBA W12E 2 0 WD2 WE W12F 4 0 W9F W98 W95 W92 W130 4 0 W91 W90 W8F W8E W131 4 0 W8 W94 WBA WD2 W132 2 0 WD5 W96 W133 3 0 W9D W9B W9A W134 3 0 W38 WA3 WA2 W135 4 0 WC2 WCC WCA WC5 W136 4 0 WC2 WCC WCA WBF W137 3 0 WCC WA5 WA8 W138 4 0 W9 WA WB WC2 W139 3 0 WC1 WBE WB5 W13A 4 0 WB4 WB3 WAD WAB W13B 4 0 WCC WA9 WA8 WC8 W13C 2 0 WC7 WC6 W13D 3 0 WC4 WBF WC3 W13E 3 0 WBC WB8 WAC W13F 2 0 WAE W1C W140 4 0 WBC WB8 WB2 WB0 W141 2 0 WAF WAE W142 3 0 W21 W4 WB6 W143 4 0 W9 WCC WCA WC0 W144 4 0 WBC WB8 WB7 W1C W145 4 0 W5 WB6 W1B W1D W146 3 0 WD2 W12 W20 W147 2 0 WD4 WBA W148 4 0 WCC WCA WC0 WC4 W149 2 0 WC2 WBF W14A 4 0 WCC WCA WC5 WC3 W14B 2 0 WB WC4 W14C 3 0 WC8 WC7 WC6 W14D 4 0 WCD WD4 WD0 W3 W14E 2 0 WD6 WCF W14F 4 0 WD5 WD4 WD2 WD0 W150 4 0 W3A W3B WD7 W23 0 C3B W151 4 0 W3A W3B WD8 W3E 0 C61 W152 4 0 W3A W3B WD9 W3D 0 C73 W153 4 0 W3A W3B WDA W41 0 C73 W154 4 0 W3A W3B WDB W40 0 C73 W155 4 0 W3A W3B WDC W3F 0 C38 W156 4 0 W3A W3B WDD W25 0 C2B W157 4 0 W3A W3B WDE W27 0 C2B W158 4 0 W3A W3B WDF W42 0 C61 W159 4 0 W3A W3B WE0 W28 0 C2B W15A 4 0 W3A W3B WE1 W46 0 C61 W15B 4 0 W3A W3B WE2 W43 0 C22 W15C 4 0 W3A W3B WE3 W45 0 C73 W15D 4 0 W3A W3B WE4 W44 0 C2B W15E 4 0 W3A W3B WE5 W4F 0 C73 W15F 4 0 W3A W3B WE6 W48 0 C73 W160 4 0 W3A W3B WE7 W47 0 C2B W161 4 0 W3A W3B WE8 W4A 0 C73 W162 4 0 W3A W3B WE9 W49 0 C38 W163 4 0 W3A W3B WEA W4C 0 C22 W164 4 0 W3A W3B WEB W4B 0 C38 W165 4 0 W3A W3B WEC W4E 0 C22 W166 4 0 W3A W3B WED W4D 0 C3B W167 4 0 W3A W3B WEE W29 0 C2B W168 4 0 W3A W3B WEF W53 0 C22 W169 4 0 W3A W3B WF0 W51 0 C73 W16A 4 0 W3A W3B WF1 W50 0 C2B W16B 4 0 W3A W3B WF2 W52 0 C61 W16C 4 0 W3A W3B WF3 W2B 0 C38 W16D 4 0 W3A WAB W54 W3B 0 C20 W16E 4 0 W3A W3B WF4 W2C 0 C2B W16F 4 0 W3A W3B WF5 W55 0 C22 W170 4 0 W3A W39 W56 W3B 0 C20 W171 4 0 W3A W3B WF6 W2D 0 C38 W172 4 0 W3A W3B WF7 W57 0 C73 W173 4 0 W3A W3B WF8 W26 0 C61 W174 4 0 W3A W3B WF9 W2E 0 C2B W175 4 0 W3A W5D W2F W3B 0 C20 W176 4 0 W3A W3B WFA W5D 0 C73 W177 4 0 W3A W3B WFB W59 0 C73 W178 4 0 W3A W3B WFC W58 0 C3B W179 4 0 W3A W3B WFD W5A 0 C61 W17A 4 0 W3A W3B WFE W5C 0 C73 W17B 4 0 W3A W3B WFF W5B 0 C2B W17C 4 0 W3A W3B W100 W30 0 C2B W17D 4 0 W3A W3B W101 W5E 0 C61 W17E 4 0 W3A W3B W102 W60 0 C73 W17F 4 0 W3A W3B W103 W5F 0 C73 W180 4 0 W3A W3B W104 W31 0 C2B W181 4 0 W3A W3B W105 W32 0 C2B W182 4 0 W3A W3B W106 W66 0 C61 W183 4 0 W3A W3B W107 W61 0 C73 W184 4 0 W3A W3B W108 W63 0 C73 W185 4 0 W3A W3B W109 W62 0 C2B W186 4 0 W3A W3B W10A W65 0 C73 W187 4 0 W3A W3B W10B W64 0 C38 W188 4 0 W3A W3B W10C W6B 0 C61 W189 4 0 W3A W3B W10D W67 0 C73 W18A 4 0 W3A W3B W10E W69 0 C22 W18B 4 0 W3A W3B W10F W68 0 C2B W18C 4 0 W3A W3B W110 W6A 0 C73 W18D 4 0 W3A W3B W111 W33 0 C2B W18E 4 0 W3A WAD W6C W3B 0 C20 W18F 4 0 W3A WB3 W6D W3B 0 C20 W190 4 0 W3A W3B W112 W34 0 C2B W191 4 0 W3A W3B W113 W35 0 C3B W192 4 0 W3A W3B W114 W73 0 C22 W193 4 0 W3A W3B W115 W70 0 C73 W194 4 0 W3A W3B W116 W6E 0 C2B W195 4 0 W3A W3B W117 W6F 0 C38 W196 4 0 W3A W3B W118 W72 0 C61 W197 4 0 W3A W3B W119 W71 0 C3B W198 4 0 W3A W3B W11A W7E 0 C73 W199 4 0 W3A W3B W11B W2A 0 C73 W19A 4 0 W3A W3B W11C W75 0 C3B W19B 4 0 W3A W91 W74 W3B 0 C20 W19C 4 0 W3A W3B W11D W78 0 C73 W19D 4 0 W3A W3B W11E W77 0 C2B W19E 4 0 W3A W14 W76 W3B 0 C20 W19F 4 0 W3A W3B W11F W7D 0 C73 W1A0 4 0 W3A W3B W120 W7A 0 C3B W1A1 4 0 W3A W18 W79 W3B 0 C20 W1A2 4 0 W3A W7C W7B W3B 0 C1C W1A3 4 0 W3A W3B W121 W7B 0 C38 W1A4 4 0 W3A W7F W80 W3B 0 C20 W1A5 4 0 W3A W3B W122 W7F 0 C73 W1A6 4 0 W3A W3B W123 W36 0 C38 W1A7 4 0 W3A W3B W124 W86 0 C22 W1A8 4 0 W3A W3B W125 W82 0 C61 W1A9 4 0 W3A W3B W126 W81 0 C2B W1AA 4 0 W3A W3B W127 W85 0 C61 W1AB 4 0 W3A W3B W128 W84 0 C3B W1AC 4 0 W3A WB6 W83 W3B 0 C20 W1AD 4 0 W3A W3B W129 WA1 0 C73 W1AE 4 0 W3A W3B W12A W8B 0 C61 W1AF 4 0 W3A W3B W12B W87 0 C38 W1B0 4 0 W3A W3B W12C W8A 0 C3B W1B1 4 0 W3A W88 W89 W3B 0 C49 W1B2 4 0 W3A W17 W88 W3B 0 C20 W1B3 4 0 W3A W3B W12D W8D 0 C22 W1B4 4 0 W3A W3B W12E W8C 0 C2B W1B5 4 0 W3A W3B W12F WA0 0 C73 W1B6 4 0 W3A W3B W130 W92 0 C38 W1B7 4 0 W3A W19 W8E W3B 0 C20 W1B8 4 0 W3A W4 W8F W3B 0 C20 W1B9 4 0 W3A W1E W90 W3B 0 C20 W1BA 4 0 W3A W15 W91 W3B 0 C49 W1BB 4 0 W3A W3B W131 W95 0 C38 W1BC 4 0 W3A W93 W94 W3B 0 C49 W1BD 4 0 W3A W20 W93 W3B 0 C20 W1BE 4 0 W3A W97 W98 W3B 0 C49 W1BF 4 0 W3A W3B W132 W97 0 C2B W1C0 4 0 W3A W1F W96 W3B 0 C20 W1C1 4 0 W3A W9F W9E W3B 0 C1C W1C2 4 0 W3A W3B W133 W9E 0 C3B W1C3 4 0 W3A W99 W9A W3B 0 C49 W1C4 4 0 W3A W11 W99 W3B 0 C20 W1C5 4 0 W3A W1B W9B W3B 0 C20 W1C6 4 0 W3A W9C W9D W3B 0 C49 W1C7 4 0 W3A WF W9C W3B 0 C20 W1C8 4 0 W3A W3B W134 WA4 0 C61 W1C9 4 0 W3A W3B W135 WA2 0 C73 W1CA 4 0 W3A W3B W136 WA3 0 C73 W1CB 4 0 W3A WA6 WA7 W3B 0 C20 W1CC 4 0 W3A W3B W137 WA6 0 C61 W1CD 4 0 W3A W3B W138 WA5 0 C38 W1CE 4 0 W3A W3B W139 W37 0 C3B W1CF 4 0 W3A W3B W13A WB5 0 C73 W1D0 4 0 W3A WAA WAB W3B 0 C49 W1D1 4 0 W3A W3B W13B WAA 0 C73 W1D2 4 0 W3A W3B W13C WA8 0 C2B W1D3 4 0 W3A W3B W13D WA9 0 C3B W1D4 4 0 W3A W3B W13E WAD 0 C61 W1D5 4 0 W3A W3B W13F WAC 0 C2B W1D6 4 0 W3A W3B W140 WB3 0 C73 W1D7 4 0 W3A W3B W141 WB0 0 C2B W1D8 4 0 W3A W1D WAE W3B 0 C20 W1D9 4 0 W3A W1C WAF W3B 0 C20 W1DA 4 0 W3A WB1 WB2 W3B 0 C49 W1DB 4 0 W3A W3B W142 WB1 0 C3B W1DC 4 0 W3A W3B W143 WB4 0 C73 W1DD 4 0 W3A WBD WBE W3B 0 C20 W1DE 4 0 W3A W3B W144 WBD 0 C73 W1DF 4 0 W3A W3B W145 WB7 0 C38 W1E0 4 0 W3A W1A WB6 W3B 0 C49 W1E1 4 0 W3A W3B W146 WB8 0 C3B W1E2 4 0 W3A WBC WBB W3B 0 C1C W1E3 4 0 W3A W3B W147 WBB 0 C2B W1E4 4 0 W3A WB9 WBA W3B 0 C49 W1E5 4 0 W3A WD0 WB9 W3B 0 C20 W1E6 4 0 W3A W24 WC1 W3B 0 C20 W1E7 4 0 W3A W3B W148 W24 0 C73 W1E8 4 0 W3A W3B W149 WC0 0 C2B W1E9 4 0 W3A WB WBF W3B 0 C20 W1EA 4 0 W3A W3B W14A W38 0 C73 W1EB 4 0 W3A WC2 WC3 W3B 0 C20 W1EC 4 0 W3A WC WC2 W3B 0 C49 W1ED 4 0 W3A W3B W14B WC5 0 C2B W1EE 4 0 W3A W9 WC4 W3B 0 C20 W1EF 4 0 W3A WC9 WCA W3B 0 C49 W1F0 4 0 W3A W3B W14C WC9 0 C3B W1F1 4 0 W3A W16 WC6 W3B 0 C20 W1F2 4 0 W3A WD WC7 W3B 0 C20 W1F3 4 0 W3A WA WC8 W3B 0 C20 W1F4 4 0 W3A WCC WCB W3B 0 C1C W1F5 4 0 W3A W3B W14D WCB 0 C38 W1F6 4 0 W3A W3B W14E W39 0 C22 W1F7 4 0 W3A WCE WCF W3B 0 C49 W1F8 4 0 W3A WCD WCE W3B 0 C20 W1F9 4 0 W3A W10 WCD W3B 0 C49 W1FA 4 0 W3A W3B W14F WD6 0 C38 W1FB 4 0 W3A W2 WD0 W3B 0 C49 W1FC 4 0 W3A WD2 WD1 W3B 0 C1C W1FD 4 0 W3A W3 WD1 W3B 0 C20 W1FE 4 0 W3A WD3 WD4 W3B 0 C49 W1FF 4 0 W3A W6 WD3 W3B 0 C20 W200 4 0 W3A WE WD5 W3B 0 C20 W179 11 0 W14A W137 W12B W12 W7F W1 W118 W13B W141 W15B W130 0 CB6 W0 11 0 W1 0 1 A0 r R460 "AReq" W2 0 1 A0 r R461 "BReq" W3 0 1 A0 r R462 "PopReq" W4 0 1 A0 r R29E W5 0 1 A0 r R29F W6 0 1 A0 r R2A0 W7 0 1 A0 r R2A1 W8 0 1 A0 r R463 "PriorityA" W9 0 1 A0 r R464 "PriorityB" WA 0 1 A0 r R465 "State0" WB 0 1 A0 r R466 "State1" 1 A0 r R467 "RequestArbiterFSMXlate" R54 1 WC 11 0 WB WA W9 W8 W7 W6 W5 W4 W3 W2 W1 WD 11 0 W1 W2 W5 W7 W3 W8 W9 W4 WA WB W6 0 CB7 W0 11 0 W1 0 1 A0 r R468 "AReq" W2 0 1 A0 r R469 "BReq" W3 0 1 A0 r R29F W4 0 1 A0 r R2A1 W5 0 1 A0 r R46A "PopReq" W6 0 1 A0 r R46B "PriorityA" W7 0 1 A0 r R46C "PriorityB" W8 0 1 A0 r R46D "Reset" W9 0 1 A0 r R46E "State0" WA 0 1 A0 r R46F "State1" WB 0 1 A0 r R2A0 1 A0 r R470 "RequestArbiterFSM" R54 2 WC 19 0 W1 W2 W3 W4 W5 W6 W7 W8 W9 WA WB WD 0 1 A0 r R471 "NxtPriorityA" WE 0 1 A0 r R472 "NxtPriorityB" WF 0 1 A0 r R473 "NxtState0" W10 0 1 A0 r R474 "NxtState1" W11 4 0 WD WE WF W10 W12 4 0 W6 W7 W9 WA W13 8 0 W8 W6 W9 WA W7 W5 W1 W2 W14 4 0 WD WE WF W10 W15 5 0 W11 W12 W3 WB W4 0 CB8 W0 5 0 W1 4 1 A0 r R2CB W2 0 1 A0 r R475 "NxtPriorityA" W3 0 1 A0 r R476 "NxtPriorityB" W4 0 1 A0 r R477 "NxtState0" W5 0 1 A0 r R478 "NxtState1" W6 4 1 A0 r R2D6 W7 0 1 A0 r R479 "PriorityA" W8 0 1 A0 r R47A "PriorityB" W9 0 1 A0 r R47B "State0" WA 0 1 A0 r R47C "State1" WB 0 1 A0 r R29F WC 0 1 A0 r R2A0 WD 0 1 A0 r R2A1 1 A0 r R47D "RequestArbiterFSMReg" R54 4 WE 9 0 W1 W6 WB WC WD WF 0 1 A3 a A4 W10 0 1 A3 a A4 W11 0 1 A3 a A4 W12 0 1 A3 a A4 W13 6 0 WC W2 WB W7 WF WD 0 C5 W14 6 0 WC W3 WB W8 W10 WD 0 C5 W15 6 0 WC W4 WB W9 W11 WD 0 C5 W16 6 0 WC W5 WB WA W12 WD 0 C5 W16 4 0 W13 W14 WB W4 0 CB9 W0 4 0 W1 8 1 A0 r R2CB W2 0 1 A0 r R46D W3 0 1 A0 r R46B W4 0 1 A0 r R46E W5 0 1 A0 r R46F W6 0 1 A0 r R46C W7 0 1 A0 r R46A W8 0 1 A0 r R468 W9 0 1 A0 r R469 WA 4 1 A0 r R2D6 WB 0 1 A0 r R471 WC 0 1 A0 r R472 WD 0 1 A0 r R473 WE 0 1 A0 r R474 WF 0 1 A0 r R2A0 W10 0 1 A0 r R2A1 1 A0 r R47E "RequestArbiterFSMLogic" R54 40 W11 81 0 W1 WA W12 0 1 A0 r R47F "Sum0x003" WB W13 0 1 A0 r R480 "Sum0x004" WC W14 0 1 A0 r R481 "Factor1x003" W15 0 1 A0 r R482 "Factor1x009" W16 0 1 A0 r R483 "Factor0x006" W17 0 1 A0 r R484 "Factor1x007" W18 0 1 A0 r R485 "Factor0x001" W19 0 1 A0 r R486 "Factor1x006" W1A 0 1 A0 r R487 "Sum0x001" W1B 0 1 A0 r R488 "Factor0x004" W1C 0 1 A0 r R489 "Factor1x011" W1D 0 1 A0 r R48A "Factor1x002" W1E 0 1 A0 r R48B "NOTState0" W1F 0 1 A0 r R48C "Factor0x002" W20 0 1 A0 r R48D "Factor1x004" W21 0 1 A0 r R48E "NOTState1" W22 0 1 A0 r R48F "NOTState1BufX5" W23 0 1 A0 r R490 "NOTBReq" W24 0 1 A0 r R491 "Factor0x007" W25 0 1 A0 r R492 "Factor1x001" W26 0 1 A0 r R493 "Sum0x000" WD W27 0 1 A0 r R494 "Factor1x008" W28 0 1 A0 r R495 "NOTAReq" W29 0 1 A0 r R496 "Factor1x000" W2A 0 1 A0 r R497 "Factor0x005" W2B 0 1 A0 r R498 "Factor0x000" W2C 0 1 A0 r R499 "Factor1x010" W2D 0 1 A0 r R49A "NOTPriorityB" W2E 0 1 A0 r R49B "NOTPriorityBBufX6" W2F 0 1 A0 r R49C "Factor0x008" W30 0 1 A0 r R49D "NOTReset" W31 0 1 A0 r R49E "NOTResetBufX5" W32 0 1 A0 r R49F "NOTPopReq" W33 0 1 A0 r R4A0 "Factor0x003" W34 0 1 A0 r R4A1 "Factor1x005" W35 0 1 A0 r R4A2 "Sum0x002" WE W2 W3 W4 W5 W6 W7 W8 W9 WF W10 W36 2 0 W26 W12 W37 2 0 W34 W2C W38 2 0 W1A W13 W39 2 0 W29 W27 W3A 2 0 W26 W1A W3B 4 0 W19 W17 W15 W14 W3C 2 0 W1B W23 W3D 2 0 W18 W23 W3E 2 0 W2B W16 W3F 3 0 W28 W22 W6 W40 2 0 W18 W22 W41 4 0 W2E W31 W7 W3 W42 4 0 W25 W20 W1D W1C W43 2 0 W1B W28 W44 3 0 W31 W1E W22 W45 2 0 W1F W22 W46 3 0 W1F W28 W1E W47 3 0 W31 W7 W6 W48 2 0 W2B W24 W49 4 0 W23 W2E W22 W3 W4A 4 0 W34 W2C W29 W27 W4B 2 0 W33 W2E W4C 3 0 W2B W28 W2E W4D 2 0 W2B W2A W4E 3 0 W9 W2E W3 W4F 3 0 W32 W31 W4 W50 2 0 W33 W2F W51 2 0 W2E W3 W52 3 0 W32 W31 W5 W53 4 0 WF W10 W36 WB 0 C2B W54 4 0 WF W10 W37 W12 0 C22 W55 4 0 WF W10 W38 WC 0 C2B W56 4 0 WF W10 W39 W13 0 C22 W57 4 0 WF W10 W3A WD 0 C2B W58 4 0 WF W10 W3B W1A 0 C73 W59 4 0 WF W10 W3C W14 0 C22 W5A 4 0 WF W10 W3D W15 0 C22 W5B 4 0 WF W10 W3E W17 0 C22 W5C 4 0 WF W10 W3F W16 0 C3B W5D 4 0 WF W10 W40 W19 0 C22 W5E 4 0 WF W10 W41 W18 0 C38 W5F 4 0 WF W10 W42 W26 0 C73 W60 4 0 WF W10 W43 W1C 0 C22 W61 4 0 WF W10 W44 W1B 0 C3B W62 4 0 WF W10 W45 W1D 0 C22 W63 4 0 WF W10 W46 W20 0 C61 W64 4 0 WF W4 W1E W10 0 C20 W65 4 0 WF W10 W47 W1F 0 C3B W66 4 0 WF W10 W48 W25 0 C22 W67 4 0 WF W10 W49 W24 0 C38 W68 4 0 WF W21 W22 W10 0 C49 W69 4 0 WF W5 W21 W10 0 C20 W6A 4 0 WF W9 W23 W10 0 C20 W6B 4 0 WF W35 WE W10 0 C20 W6C 4 0 WF W10 W4A W35 0 C73 W6D 4 0 WF W10 W4B W27 0 C22 W6E 4 0 WF W10 W4C W29 0 C61 W6F 4 0 WF W8 W28 W10 0 C20 W70 4 0 WF W10 W4D W2C 0 C22 W71 4 0 WF W10 W4E W2A 0 C3B W72 4 0 WF W10 W4F W2B 0 C3B W73 4 0 WF W10 W50 W34 0 C22 W74 4 0 WF W10 W51 W2F 0 C2B W75 4 0 WF W2D W2E W10 0 C49 W76 4 0 WF W6 W2D W10 0 C20 W77 4 0 WF W10 W52 W33 0 C3B W78 4 0 WF W30 W31 W10 0 C49 W79 4 0 WF W2 W30 W10 0 C20 W7A 4 0 WF W7 W32 W10 0 C20 W17A 19 0 W156 W13C W11C W13E W132 W12 W7F W1 W118 W140 W11A W15C W14D W14E W165 W12D W13F W14B W136 0 CBA W0 19 0 W1 0 1 A0 r R4A3 "CWSReq" W2 0 1 A0 r R4A4 "FiveCycleReq" W3 0 1 A0 r R4A5 "OwnerAbort" W4 0 1 A0 r R4A6 "RoomInPipe" W5 0 1 A0 r R4A7 "TwoCycleReq" W6 0 1 A0 r R29E W7 0 1 A0 r R29F W8 0 1 A0 r R2A0 W9 0 1 A0 r R2A1 WA 0 1 A0 r R4A8 "AddressInPipe0" WB 0 1 A0 r R4A9 "AddressInPipe1" WC 0 1 A0 r R4AA "NoDataForPipe" WD 0 1 A0 r R4AB "OutBufRdAdd0" WE 0 1 A0 r R4AC "OutBufRdAdd1" WF 0 1 A0 r R4AD "ReplyIdle" W10 0 1 A0 r R4AE "SelRamBuf" W11 0 1 A0 r R4AF "State0" W12 0 1 A0 r R4B0 "State1" W13 0 1 A0 r R4B1 "SwRdPort" 1 A0 r R4B2 "ReplyControlFSMXlate" R54 1 W14 19 0 W13 W12 W11 W10 WF WE WD WC WB WA W9 W8 W7 W6 W5 W4 W3 W2 W1 W15 19 0 WA WB W1 W7 W2 W9 WC WD WE W3 WF W6 W4 W10 W11 W12 W13 W5 W8 0 CBB W0 19 0 W1 0 1 A0 r R4B3 "AddressInPipe0" W2 0 1 A0 r R4B4 "AddressInPipe1" W3 0 1 A0 r R4B5 "CWSReq" W4 0 1 A0 r R29F W5 0 1 A0 r R4B6 "FiveCycleReq" W6 0 1 A0 r R2A1 W7 0 1 A0 r R4B7 "NoDataForPipe" W8 0 1 A0 r R4B8 "OutBufRdAdd0" W9 0 1 A0 r R4B9 "OutBufRdAdd1" WA 0 1 A0 r R4BA "OwnerAbort" WB 0 1 A0 r R4BB "ReplyIdle" WC 0 1 A0 r R4BC "Reset" WD 0 1 A0 r R4BD "RoomInPipe" WE 0 1 A0 r R4BE "SelRamBuf" WF 0 1 A0 r R4BF "State0" W10 0 1 A0 r R4C0 "State1" W11 0 1 A0 r R4C1 "SwRdPort" W12 0 1 A0 r R4C2 "TwoCycleReq" W13 0 1 A0 r R2A0 1 A0 r R4C3 "ReplyControlFSM" R54 2 W14 33 0 W1 W2 W3 W4 W5 W6 W7 W8 W9 WA WB WC WD WE WF W10 W11 W12 W13 W15 0 1 A0 r R4C4 "NxtAddressInPipe0" W16 0 1 A0 r R4C5 "NxtAddressInPipe1" W17 0 1 A0 r R4C6 "NxtNoDataForPipe" W18 0 1 A0 r R4C7 "NxtOutBufRdAdd0" W19 0 1 A0 r R4C8 "NxtOutBufRdAdd1" W1A 0 1 A0 r R4C9 "NxtReplyIdle" W1B 0 1 A0 r R4CA "NxtSelRamBuf" W1C 0 1 A0 r R4CB "NxtState0" W1D 0 1 A0 r R4CC "NxtState1" W1E 0 1 A0 r R4CD "NxtSwRdPort" W1F 10 0 W15 W16 W17 W1B W18 W1A W19 W1C W1E W1D W20 10 0 W1 W2 W7 WE W8 WB W9 WF W11 W10 W21 16 0 W8 W9 WC WE W7 WF W10 W12 WB WD WA W3 W11 W1 W2 W5 W22 10 0 W15 W16 W17 W1B W18 W1A W19 W1C W1E W1D W23 5 0 W1F W20 W4 W13 W6 0 CBC W0 5 0 W1 10 1 A0 r R2CB W2 0 1 A0 r R4CE "NxtAddressInPipe0" W3 0 1 A0 r R4CF "NxtAddressInPipe1" W4 0 1 A0 r R4D0 "NxtNoDataForPipe" W5 0 1 A0 r R4D1 "NxtSelRamBuf" W6 0 1 A0 r R4D2 "NxtOutBufRdAdd0" W7 0 1 A0 r R4D3 "NxtReplyIdle" W8 0 1 A0 r R4D4 "NxtOutBufRdAdd1" W9 0 1 A0 r R4D5 "NxtState0" WA 0 1 A0 r R4D6 "NxtSwRdPort" WB 0 1 A0 r R4D7 "NxtState1" WC 10 1 A0 r R2D6 WD 0 1 A0 r R4D8 "AddressInPipe0" WE 0 1 A0 r R4D9 "AddressInPipe1" WF 0 1 A0 r R4DA "NoDataForPipe" W10 0 1 A0 r R4DB "SelRamBuf" W11 0 1 A0 r R4DC "OutBufRdAdd0" W12 0 1 A0 r R4DD "ReplyIdle" W13 0 1 A0 r R4DE "OutBufRdAdd1" W14 0 1 A0 r R4DF "State0" W15 0 1 A0 r R4E0 "SwRdPort" W16 0 1 A0 r R4E1 "State1" W17 0 1 A0 r R29F W18 0 1 A0 r R2A0 W19 0 1 A0 r R2A1 1 A0 r R4E2 "ReplyControlFSMReg" R54 10 W1A 15 0 W1 WC W17 W18 W19 W1B 0 1 A3 a A4 W1C 0 1 A3 a A4 W1D 0 1 A3 a A4 W1E 0 1 A3 a A4 W1F 0 1 A3 a A4 W20 0 1 A3 a A4 W21 0 1 A3 a A4 W22 0 1 A3 a A4 W23 0 1 A3 a A4 W24 0 1 A3 a A4 W25 6 0 W18 W2 W17 WD W1B W19 0 C5 W26 6 0 W18 W3 W17 WE W1C W19 0 C5 W27 6 0 W18 W4 W17 WF W1D W19 0 C5 W28 6 0 W18 W5 W17 W10 W1E W19 0 C5 W29 6 0 W18 W6 W17 W11 W1F W19 0 C5 W2A 6 0 W18 W7 W17 W12 W20 W19 0 C5 W2B 6 0 W18 W8 W17 W13 W21 W19 0 C5 W2C 6 0 W18 W9 W17 W14 W22 W19 0 C5 W2D 6 0 W18 WA W17 W15 W23 W19 0 C5 W2E 6 0 W18 WB W17 W16 W24 W19 0 C5 W24 4 0 W21 W22 W13 W6 0 CBD W0 4 0 W1 16 1 A0 r R2CB W2 0 1 A0 r R4B8 W3 0 1 A0 r R4B9 W4 0 1 A0 r R4BC W5 0 1 A0 r R4BE W6 0 1 A0 r R4B7 W7 0 1 A0 r R4BF W8 0 1 A0 r R4C0 W9 0 1 A0 r R4C2 WA 0 1 A0 r R4BB WB 0 1 A0 r R4BD WC 0 1 A0 r R4BA WD 0 1 A0 r R4B5 WE 0 1 A0 r R4C1 WF 0 1 A0 r R4B3 W10 0 1 A0 r R4B4 W11 0 1 A0 r R4B6 W12 10 1 A0 r R2D6 W13 0 1 A0 r R4C4 W14 0 1 A0 r R4C5 W15 0 1 A0 r R4C6 W16 0 1 A0 r R4CA W17 0 1 A0 r R4C7 W18 0 1 A0 r R4C9 W19 0 1 A0 r R4C8 W1A 0 1 A0 r R4CB W1B 0 1 A0 r R4CD W1C 0 1 A0 r R4CC W1D 0 1 A0 r R2A0 W1E 0 1 A0 r R2A1 1 A0 r R4E3 "ReplyControlFSMLogic" R54 133 W1F 255 0 W1 W12 W20 0 1 A0 r R4E4 "Sum0x009" W13 W21 0 1 A0 r R4E5 "Factor1x000" W22 0 1 A0 r R4E6 "Factor1x001" W23 0 1 A0 r R4E7 "Sum0x015" W24 0 1 A0 r R4E8 "Factor1x034" W25 0 1 A0 r R4E9 "Factor1x010" W26 0 1 A0 r R4EA "Factor1x009" W27 0 1 A0 r R4EB "Factor0x016" W28 0 1 A0 r R4EC "Factor1x002" W29 0 1 A0 r R4ED "Sum0x011" W14 W2A 0 1 A0 r R4EE "Factor1x031" W2B 0 1 A0 r R4EF "Factor0x018" W2C 0 1 A0 r R4F0 "Factor1x013" W2D 0 1 A0 r R4F1 "Sum0x016" W15 W2E 0 1 A0 r R4F2 "Factor1x038" W2F 0 1 A0 r R4F3 "Factor1x016" W30 0 1 A0 r R4F4 "Sum0x010" W16 W31 0 1 A0 r R4F5 "Factor1x044" W32 0 1 A0 r R4F6 "Factor1x019" W33 0 1 A0 r R4F7 "Sum0x004" W17 W34 0 1 A0 r R4F8 "Factor0x022" W35 0 1 A0 r R4F9 "Factor1x028" W36 0 1 A0 r R4FA "Factor0x020" W37 0 1 A0 r R4FB "Factor1x043" W38 0 1 A0 r R4FC "Factor1x035" W39 0 1 A0 r R4FD "Sum0x018" W3A 0 1 A0 r R4FE "Factor1x046" W3B 0 1 A0 r R4FF "Factor1x025" W3C 0 1 A0 r R500 "NOTTwoCycleReq" W3D 0 1 A0 r R501 "NOTTwoCycleReqBufX6" W3E 0 1 A0 r R502 "NOTFiveCycleReq" W3F 0 1 A0 r R503 "Factor0x010" W40 0 1 A0 r R504 "Factor1x032" W41 0 1 A0 r R505 "Sum0x014" W18 W42 0 1 A0 r R506 "Sum0x013" W43 0 1 A0 r R507 "Factor0x023" W44 0 1 A0 r R508 "Factor1x018" W45 0 1 A0 r R509 "Factor1x049" W46 0 1 A0 r R50A "Factor1x037" W47 0 1 A0 r R50B "Factor1x042" W48 0 1 A0 r R50C "Sum0x005" W19 W49 0 1 A0 r R50D "Factor0x015" W4A 0 1 A0 r R50E "Factor1x015" W4B 0 1 A0 r R50F "Factor1x014" W4C 0 1 A0 r R510 "Sum0x017" W4D 0 1 A0 r R511 "Factor0x011" W4E 0 1 A0 r R512 "Factor1x011" W4F 0 1 A0 r R513 "Factor1x017" W50 0 1 A0 r R514 "Factor1x020" W51 0 1 A0 r R515 "NOTCWSReq" W52 0 1 A0 r R516 "Factor0x008" W53 0 1 A0 r R517 "Factor1x007" W54 0 1 A0 r R518 "Sum0x007" W55 0 1 A0 r R519 "Factor0x021" W56 0 1 A0 r R51A "Factor1x030" W57 0 1 A0 r R51B "Factor1x026" W58 0 1 A0 r R51C "Sum0x002" W1A W59 0 1 A0 r R51D "Factor1x048" W5A 0 1 A0 r R51E "NOTNoDataForPipe" W5B 0 1 A0 r R51F "Factor0x012" W5C 0 1 A0 r R520 "Factor1x006" W5D 0 1 A0 r R521 "Sum0x012" W5E 0 1 A0 r R522 "Factor0x007" W5F 0 1 A0 r R523 "Factor1x045" W60 0 1 A0 r R524 "Factor0x014" W61 0 1 A0 r R525 "Factor1x004" W62 0 1 A0 r R526 "Sum0x003" W63 0 1 A0 r R527 "Factor1x047" W64 0 1 A0 r R528 "Factor1x005" W65 0 1 A0 r R529 "Factor1x022" W66 0 1 A0 r R52A "NOTOwnerAbort" W67 0 1 A0 r R52B "NOTOwnerAbortBufX7" W68 0 1 A0 r R52C "Factor1x003" W69 0 1 A0 r R52D "Sum0x001" W6A 0 1 A0 r R52E "Factor0x019" W6B 0 1 A0 r R52F "Factor1x029" W6C 0 1 A0 r R530 "NOTOutBufRdAdd0" W6D 0 1 A0 r R531 "Factor0x004" W6E 0 1 A0 r R532 "Factor0x004BufX6" W6F 0 1 A0 r R533 "Factor1x008" W70 0 1 A0 r R534 "Factor0x017" W71 0 1 A0 r R535 "Factor1x024" W72 0 1 A0 r R536 "Factor1x040" W73 0 1 A0 r R537 "Sum0x000" W1B W74 0 1 A0 r R538 "Factor1x033" W75 0 1 A0 r R539 "Factor0x013" W76 0 1 A0 r R53A "Factor1x021" W77 0 1 A0 r R53B "Factor1x023" W78 0 1 A0 r R53C "Factor0x006" W79 0 1 A0 r R53D "Factor0x006BufX6" W7A 0 1 A0 r R53E "NOTRoomInPipe" W7B 0 1 A0 r R53F "Factor0x003" W7C 0 1 A0 r R540 "Factor0x003BufX12" W7D 0 1 A0 r R541 "Factor1x027" W7E 0 1 A0 r R542 "Sum0x008" W7F 0 1 A0 r R543 "NoDataForPipeBufX7" W80 0 1 A0 r R544 "Factor0x009" W81 0 1 A0 r R545 "Factor1x041" W82 0 1 A0 r R546 "NOTReplyIdle" W83 0 1 A0 r R547 "NOTReplyIdleBufX10" W84 0 1 A0 r R548 "NOTSwRdPort" W85 0 1 A0 r R549 "NOTState1" W86 0 1 A0 r R54A "NOTState1BufX6" W87 0 1 A0 r R54B "NOTSelRamBuf" W88 0 1 A0 r R54C "NOTSelRamBufBufX9" W89 0 1 A0 r R54D "Factor0x002" W8A 0 1 A0 r R54E "Factor0x002BufX15" W8B 0 1 A0 r R54F "Factor1x036" W8C 0 1 A0 r R550 "NOTState0" W8D 0 1 A0 r R551 "NOTState0BufX14" W8E 0 1 A0 r R552 "Factor1x039" W8F 0 1 A0 r R553 "OutBufRdAdd0BufX8" W90 0 1 A0 r R554 "FiveCycleReqBufX5" W91 0 1 A0 r R555 "Factor0x005" W92 0 1 A0 r R556 "OutBufRdAdd1BufX22" W93 0 1 A0 r R557 "Factor0x001" W94 0 1 A0 r R558 "Factor0x001BufX18" W95 0 1 A0 r R559 "ResetBufX9" W96 0 1 A0 r R55A "NOTReset" W97 0 1 A0 r R55B "Factor0x000" W98 0 1 A0 r R55C "Factor0x000BufX26" W99 0 1 A0 r R55D "Factor1x012" W9A 0 1 A0 r R55E "Sum0x006" W1C W2 W3 W4 W5 W6 W7 W8 W9 WA WB WC WD WE WF W10 W11 W1D W1E W9B 3 0 W9A W54 W20 W9C 4 0 W77 W76 W4B W4A W9D 4 0 W69 W62 W29 W23 W9E 2 0 W22 W21 W9F 4 0 W98 W94 W3D W8F WA0 4 0 W98 W94 W88 W3D WA1 4 0 W28 W26 W25 W24 WA2 4 0 W8A W7C W5B W92 WA3 4 0 W98 W94 W8D W3D WA4 4 0 W98 W8A W83 W3D WA5 4 0 W98 W8A W27 W92 WA6 2 0 W7F W9 WA7 3 0 W69 W62 W2D WA8 2 0 W2C W2A WA9 3 0 W5E W92 W95 WAA 4 0 W8A W7C W2B W92 WAB 2 0 W7F W83 WAC 2 0 W33 W30 WAD 4 0 W46 W45 W2F W2E WAE 3 0 W6E W92 W95 WAF 4 0 W98 W49 W8D W92 WB0 4 0 W71 W6F W32 W31 WB1 3 0 W98 W6E W79 WB2 4 0 W6E W6C W92 W95 WB3 2 0 W41 W39 WB4 3 0 W38 W37 W35 WB5 3 0 W8A W34 W83 WB6 2 0 W67 W7A WB7 3 0 W8A W36 W83 WB8 3 0 W3E W67 W3D WB9 3 0 W94 W3F W8D WBA 4 0 W40 W3B W3A W95 WBB 3 0 W94 W3F W88 WBC 4 0 W8A W3F W5A W92 WBD 3 0 W94 W3F W8F WBE 4 0 W3E W67 W3D WB WBF 4 0 W73 W58 W48 W42 WC0 2 0 W7D W74 WC1 4 0 W47 W46 W45 W44 WC2 3 0 W7C W79 W43 WC3 3 0 W83 W88 W8D WC4 3 0 W98 W6E W92 WC5 3 0 W7C W6E W79 WC6 3 0 W79 W86 W95 WC7 3 0 W58 W54 W4C WC8 2 0 W4B W4A WC9 4 0 W7C W49 W8D W92 WCA 3 0 WF W86 W84 WCB 4 0 W98 W94 W52 W8D WCC 4 0 W53 W50 W4F W4E WCD 4 0 W98 W8A W4D W92 WCE 3 0 W90 W7F W51 WCF 4 0 W98 W8A W52 W83 WD0 4 0 W98 W94 W52 W88 WD1 4 0 W98 W94 W52 W8F WD2 2 0 W90 W51 WD3 4 0 W57 W56 W5C W59 WD4 3 0 W7C W55 W8D WD5 2 0 W86 W92 WD6 3 0 W98 W75 W92 WD7 4 0 W73 W69 W62 W5D WD8 2 0 W5C W59 WD9 3 0 W94 W7C W8D WDA 4 0 W98 W8A W5B W92 WDB 3 0 W10 W5A W83 WDC 2 0 W61 W5F WDD 3 0 W7C W5E W92 WDE 4 0 W10 W7F W88 WE WDF 4 0 W98 W8A W60 W92 WE0 2 0 W7F WC WE1 4 0 W68 W65 W64 W63 WE2 4 0 W8A W67 W83 W95 WE3 4 0 W98 W94 W67 W88 WE4 4 0 W94 W67 W8D W95 WE5 4 0 W98 W94 W67 W8F WE6 4 0 W72 W71 W6F W6B WE7 3 0 W98 W8A W6A WE8 2 0 W83 W92 WE9 4 0 W98 W6E W6C W92 WEA 3 0 W8D W86 W5 WEB 4 0 W94 W7C W70 W88 WEC 2 0 W8D W8F WED 3 0 W94 W7C W8F WEE 2 0 W9A W7E WEF 4 0 W7D W77 W76 W74 WF0 4 0 W98 W79 W8D W8 WF1 3 0 W7C W75 W92 WF2 3 0 WF W84 W8 WF3 4 0 W98 W94 W91 W88 WF4 3 0 W7C W79 W86 WF5 2 0 W84 W92 WF6 2 0 W96 W7A WF7 4 0 W99 W8E W8B W81 WF8 4 0 W98 W8A W80 W92 WF9 3 0 WD W90 W7F WFA 4 0 W98 W8A W91 W83 WFB 4 0 W88 W8D W86 W84 WFC 4 0 W98 W94 W91 W8D WFD 4 0 W98 W94 W91 W8F WFE 2 0 WD W90 WFF 2 0 W92 WE W100 2 0 W96 WB W101 4 0 W1D W1E W9B W13 0 C3B W102 4 0 W1D W1E W9C W20 0 C73 W103 4 0 W1D W1E W9D W14 0 C38 W104 4 0 W1D W1E W9E W23 0 C22 W105 4 0 W1D W1E W9F W21 0 C73 W106 4 0 W1D W1E WA0 W22 0 C73 W107 4 0 W1D W1E WA1 W29 0 C73 W108 4 0 W1D W1E WA2 W24 0 C73 W109 4 0 W1D W1E WA3 W25 0 C73 W10A 4 0 W1D W1E WA4 W26 0 C73 W10B 4 0 W1D W1E WA5 W28 0 C73 W10C 4 0 W1D W1E WA6 W27 0 C2B W10D 4 0 W1D W1E WA7 W15 0 C3B W10E 4 0 W1D W1E WA8 W2D 0 C22 W10F 4 0 W1D W1E WA9 W2A 0 C61 W110 4 0 W1D W1E WAA W2C 0 C73 W111 4 0 W1D W1E WAB W2B 0 C2B W112 4 0 W1D W1E WAC W16 0 C2B W113 4 0 W1D W1E WAD W30 0 C73 W114 4 0 W1D W1E WAE W2E 0 C61 W115 4 0 W1D W1E WAF W2F 0 C73 W116 4 0 W1D W33 W17 W1E 0 C20 W117 4 0 W1D W1E WB0 W33 0 C73 W118 4 0 W1D W1E WB1 W31 0 C61 W119 4 0 W1D W1E WB2 W32 0 C73 W11A 4 0 W1D W1E WB3 W18 0 C2B W11B 4 0 W1D W1E WB4 W39 0 C61 W11C 4 0 W1D W1E WB5 W35 0 C61 W11D 4 0 W1D W1E WB6 W34 0 C2B W11E 4 0 W1D W1E WB7 W37 0 C61 W11F 4 0 W1D W1E WB8 W36 0 C3B W120 4 0 W1D W1E WB9 W38 0 C61 W121 4 0 W1D W1E WBA W41 0 C73 W122 4 0 W1D W1E WBB W3A 0 C61 W123 4 0 W1D W1E WBC W3B 0 C73 W124 4 0 W1D W1E WBD W40 0 C61 W125 4 0 W1D W1E WBE W3F 0 C38 W126 4 0 W1D W3C W3D W1E 0 C49 W127 4 0 W1D W9 W3C W1E 0 C20 W128 4 0 W1D W90 W3E W1E 0 C20 W129 4 0 W1D W1E WBF W19 0 C38 W12A 4 0 W1D W1E WC0 W42 0 C22 W12B 4 0 W1D W1E WC1 W48 0 C73 W12C 4 0 W1D W1E WC2 W44 0 C61 W12D 4 0 W1D W1E WC3 W43 0 C3B W12E 4 0 W1D W1E WC4 W45 0 C61 W12F 4 0 W1D W1E WC5 W46 0 C61 W130 4 0 W1D W1E WC6 W47 0 C61 W131 4 0 W1D W1E WC7 W1A 0 C3B W132 4 0 W1D W1E WC8 W4C 0 C22 W133 4 0 W1D W1E WC9 W4A 0 C73 W134 4 0 W1D W1E WCA W49 0 C3B W135 4 0 W1D W1E WCB W4B 0 C73 W136 4 0 W1D W1E WCC W54 0 C73 W137 4 0 W1D W1E WCD W4E 0 C73 W138 4 0 W1D W1E WCE W4D 0 C3B W139 4 0 W1D W1E WCF W4F 0 C73 W13A 4 0 W1D W1E WD0 W50 0 C73 W13B 4 0 W1D W1E WD1 W53 0 C73 W13C 4 0 W1D W1E WD2 W52 0 C2B W13D 4 0 W1D WD W51 W1E 0 C20 W13E 4 0 W1D W1E WD3 W58 0 C73 W13F 4 0 W1D W1E WD4 W56 0 C61 W140 4 0 W1D W1E WD5 W55 0 C2B W141 4 0 W1D W1E WD6 W57 0 C61 W142 4 0 W1D W1E WD7 W1B 0 C38 W143 4 0 W1D W1E WD8 W5D 0 C22 W144 4 0 W1D W1E WD9 W59 0 C61 W145 4 0 W1D W1E WDA W5C 0 C73 W146 4 0 W1D W1E WDB W5B 0 C3B W147 4 0 W1D W7F W5A W1E 0 C20 W148 4 0 W1D W1E WDC W62 0 C22 W149 4 0 W1D W1E WDD W5F 0 C61 W14A 4 0 W1D W1E WDE W5E 0 C38 W14B 4 0 W1D W1E WDF W61 0 C73 W14C 4 0 W1D W1E WE0 W60 0 C2B W14D 4 0 W1D W1E WE1 W69 0 C73 W14E 4 0 W1D W1E WE2 W63 0 C73 W14F 4 0 W1D W1E WE3 W64 0 C73 W150 4 0 W1D W1E WE4 W65 0 C73 W151 4 0 W1D W1E WE5 W68 0 C73 W152 4 0 W1D W66 W67 W1E 0 C49 W153 4 0 W1D WC W66 W1E 0 C20 W154 4 0 W1D W1E WE6 W73 0 C73 W155 4 0 W1D W1E WE7 W6B 0 C61 W156 4 0 W1D W1E WE8 W6A 0 C2B W157 4 0 W1D W1E WE9 W6F 0 C73 W158 4 0 W1D W8F W6C W1E 0 C20 W159 4 0 W1D W6D W6E W1E 0 C49 W15A 4 0 W1D W1E WEA W6D 0 C3B W15B 4 0 W1D W1E WEB W71 0 C73 W15C 4 0 W1D W1E WEC W70 0 C2B W15D 4 0 W1D W1E WED W72 0 C61 W15E 4 0 W1D W1E WEE W1C 0 C2B W15F 4 0 W1D W1E WEF W7E 0 C73 W160 4 0 W1D W1E WF0 W74 0 C73 W161 4 0 W1D W1E WF1 W76 0 C61 W162 4 0 W1D W1E WF2 W75 0 C3B W163 4 0 W1D W1E WF3 W77 0 C73 W164 4 0 W1D W1E WF4 W7D 0 C61 W165 4 0 W1D W78 W79 W1E 0 C49 W166 4 0 W1D W1E WF5 W78 0 C2B W167 4 0 W1D W7C W7B W1E 0 C1C W168 4 0 W1D W1E WF6 W7B 0 C2B W169 4 0 W1D WB W7A W1E 0 C20 W16A 4 0 W1D W1E WF7 W9A 0 C73 W16B 4 0 W1D W1E WF8 W81 0 C73 W16C 4 0 W1D W1E WF9 W80 0 C3B W16D 4 0 W1D W6 W7F W1E 0 C49 W16E 4 0 W1D W1E WFA W8B 0 C73 W16F 4 0 W1D W83 W82 W1E 0 C1C W170 4 0 W1D WA W82 W1E 0 C20 W171 4 0 W1D W89 W8A W1E 0 C68 W172 4 0 W1D W1E WFB W89 0 C38 W173 4 0 W1D WE W84 W1E 0 C20 W174 4 0 W1D W85 W86 W1E 0 C49 W175 4 0 W1D W8 W85 W1E 0 C20 W176 4 0 W1D W88 W87 W1E 0 C1C W177 4 0 W1D W5 W87 W1E 0 C20 W178 4 0 W1D W1E WFC W8E 0 C73 W179 4 0 W1D W8C W8D W1E 0 C68 W17A 4 0 W1D W7 W8C W1E 0 C20 W17B 4 0 W1D W1E WFD W99 0 C73 W17C 4 0 W1D W2 W8F W1E 0 C49 W17D 4 0 W1D W1E WFE W91 0 C2B W17E 4 0 W1D W11 W90 W1E 0 C49 W17F 4 0 W1D W94 W93 W1E 0 CA2 W180 4 0 W1D W1E WFF W93 0 C2B W181 4 0 W1D W3 W92 W1E 0 CBE W0 4 0 W1 0 2 A0 r R0 AA l agg n 0 W2 0 2 A0 r RCF AA l agg n 0 W3 0 2 A0 r RCE AA l agg d 0 W4 0 2 A0 r R52 AA l agg n 0 4 A0 r R55F "driver" AD r R560 "Driver d=24" AC lor 2 R9D R9D AB r RDD R54 2 W5 5 0 W1 W2 W3 W6 0 0 W4 W7 4 0 W1 W6 W3 W4 0 CBF W0 4 0 W1 0 2 A0 r RA5 AA l agg n 0 W2 0 2 A0 r RD4 AA l agg n 0 W3 0 2 A0 r RC5 AA l agg d 0 W4 0 2 A0 r RAA AA l agg n 0 4 A0 r RD5 AB r RD6 AC lor 1 RAF AD r R561 "Buffer d=6" RA3 C19 3 -1 -1 W8 4 0 W1 W2 W6 W4 0 C1D W182 4 0 W1D W98 W97 W1E 0 CC0 W0 4 0 W1 0 2 A0 r R0 AA l agg n 0 W2 0 2 A0 r RCE AA l agg d 0 W3 0 2 A0 r RCF AA l agg n 0 W4 0 2 A0 r R52 AA l agg n 0 4 A0 r R562 "driver" AB r RDD AC lor 1 R9D AD r R563 "Driver d=26" R54 2 W5 5 0 W1 W2 W6 0 0 W3 W4 W7 4 0 W1 W6 W2 W4 0 CC1 W0 4 0 W1 0 2 A0 r RA5 AA l agg n 0 W2 0 2 A0 r RD4 AA l agg n 0 W3 0 2 A0 r RC5 AA l agg d 0 W4 0 2 A0 r RAA AA l agg n 0 4 A0 r RD5 AB r RD6 AC lor 1 RAF AD r R564 "Buffer d=7" RA3 C19 4 -1 -1 W8 4 0 W1 W3 W6 W4 0 C18 W183 4 0 W1D W1E W100 W97 0 C2B W184 4 0 W1D W95 W96 W1E 0 C20 W185 4 0 W1D W95 W4 W1E 0 C1C