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A1 r R48 W4 0 1 A1 r R49 W5 0 1 A1 r R47 W6 0 2 A0 a A0 A1 r R22 1 A1 r R72 "nand3" R24 1 W7 4 0 W1 W3 W8 3 2 A1 r R4B A0 a A0 W5 W4 W2 W6 W9 4 0 W1 W6 W8 W3 0 CF W0 4 0 W1 0 1 A1 r R73 "Vdd" W2 0 1 A1 r R74 "Gnd" W3 3 1 A1 r R4B W4 0 0 W5 0 0 W6 0 0 W7 0 1 A1 r R75 "X" 2 A1 r R76 "Nand3" AB r R77 "Nand n=3" R24 1 W0 W8 6 0 W1 W5 W4 W7 W6 W2 0 C10 W0 6 0 W1 0 3 A1 r R51 AC H AD l agg n 0 W2 0 3 A1 r R55 AE b agg f 0 AD l agg n 0 W3 0 3 A1 r R54 AE b agg f 0 AD l agg n 0 W4 0 4 A1 r R52 AE b agg e 0 AD l agg d 0 AF r R78 "~(I-A * I-B * I-C)" W5 0 3 A1 r R6B AE b agg f 0 AD l agg n 0 W6 0 3 A1 r R56 AC L AD l agg n 0 8 A10 r R57 A1 r R79 "nand3" A5 a A11 A12 lor 2 R59 R5A A13 i 212992 A14 r R5B A15 rb 1 A16 r R5C R24 6 W7 8 0 W1 W2 W8 0 0 W3 W4 W9 0 0 W5 W6 WA 4 0 W3 W4 W1 W1 0 C5 WB 4 0 W2 W4 W1 W1 0 C5 WC 4 0 W5 W4 W1 W1 0 C5 WD 3 0 W8 W5 W4 0 C7 WE 3 0 W9 W2 W8 0 C7 WF 3 0 W6 W3 W9 0 C7 W157 5 0 W1 W128 W129 W150 WF5 0 C11 W0 5 0 W1 0 2 A0 a A0 A1 r R0 W2 0 1 A1 r R47 W3 0 1 A1 r R49 W4 0 1 A1 r R48 W5 0 2 A0 a A0 A1 r R22 1 A1 r R7A "or2" R24 1 W6 4 0 W1 W7 2 2 A1 r R4B A0 a A0 W2 W3 W4 W5 W8 4 0 W1 W5 W7 W4 0 C12 W0 4 0 W1 0 1 A1 r R7B "Vdd" W2 0 1 A1 r R7C "Gnd" W3 2 1 A1 r R4B W4 0 0 W5 0 0 W6 0 1 A1 r R7D "X" 2 A1 r R7E "Or2" AB r R7F "Or n=2" R24 1 W0 W7 5 0 W1 W4 W6 W5 W2 0 C13 W0 5 0 W1 0 3 A1 r R51 AC H AD l agg n 0 W2 0 3 A1 r R54 AE b agg f 0 AD l agg n 0 W3 0 4 A1 r R52 AE b agg e 0 AD l agg d 0 AF r R80 "I-A + I-B" W4 0 3 A1 r R55 AE b agg f 0 AD l agg n 0 W5 0 3 A1 r R56 AC L AD l agg n 0 8 A10 r R57 A1 r R81 "or2" A5 a A11 A12 lor 2 R59 R5A A13 i 212992 A14 r R5B A15 rb 1 A16 r R5C R24 5 W6 7 0 W1 W7 0 0 W4 W2 W8 0 0 W3 W5 W9 4 0 W1 W8 W3 W5 0 CC WA 4 0 W2 W7 W1 W1 0 C5 WB 3 0 W5 W4 W8 0 C7 WC 4 0 W4 W8 W7 W1 0 C5 WD 3 0 W5 W2 W8 0 C7 W158 5 0 W1 W14E W34 W13F WF5 0 C14 W0 5 0 W1 0 1 A1 r R0 W2 8 1 A1 r R45 W3 0 0 W4 0 0 W5 0 0 W6 0 0 W7 0 0 W8 0 0 W9 0 0 WA 0 0 WB 3 1 A1 r R82 "Select" WC 0 0 WD 0 0 WE 0 0 WF 0 1 A1 r R83 "Output" W10 0 1 A1 r R22 2 A1 r R84 "muxN1" AB r R85 "MuxN1 n=8" R24 2 W11 6 0 W1 W12 8 1 A1 r R86 "decoded" W13 0 0 W14 0 0 W15 0 0 W16 0 0 W17 0 0 W18 0 0 W19 0 0 W1A 0 0 W2 WB WF W10 W1B 5 0 W1 WF W12 W2 W10 0 C15 W0 5 0 W1 0 1 A1 r R0 W2 0 1 A1 r R83 W3 8 1 A1 r R82 W4 0 0 W5 0 0 W6 0 0 W7 0 0 W8 0 0 W9 0 0 WA 0 0 WB 0 0 WC 8 1 A1 r R45 WD 0 0 WE 0 0 WF 0 0 W10 0 0 W11 0 0 W12 0 0 W13 0 0 W14 0 0 W15 0 1 A1 r R22 2 A1 r R87 "muxDN1" AB r R88 "MuxDN1 n=8" R24 2 W16 6 0 W1 WC W3 W2 W17 0 0 W15 W18 4 0 W1 W17 W2 W15 0 CD W19 5 0 W1 W17 W3 WC W15 0 C16 W0 5 0 W1 0 2 A1 r R0 A0 a A0 W2 0 2 A1 r R48 A0 a A0 W3 8 3 A1 r R89 "EN" A19 Sequence a A19 A0 a A0 W4 0 0 W5 0 0 W6 0 0 W7 0 0 W8 0 0 W9 0 0 WA 0 0 WB 0 0 WC 8 3 A1 r R8A "I" A19 a A19 A0 a A0 WD 0 0 WE 0 0 WF 0 0 W10 0 0 W11 0 0 W12 0 0 W13 0 0 W14 0 0 W15 0 2 A1 r R22 A0 a A0 1 A1 r R8B "3BufferISeq" R8C "Sequence" C17 W0 5 0 W1 0 1 A1 r R0 W2 0 1 A1 r R48 W3 0 1 A1 r R89 W4 0 1 A1 r R8A W5 0 1 A1 r R22 1 A1 r R8D "3BufferI" R24 2 W6 6 0 W1 W2 W4 W7 0 0 W3 W5 W8 4 0 W1 W3 W7 W5 0 CD W9 6 0 W1 W4 W7 W3 W2 W5 0 C18 W0 6 0 W1 0 2 A1 r R51 AD l agg n 0 W2 0 2 A1 r R6D AD l agg n 0 W3 0 2 A1 r R8E "NEN" AD l agg n 0 W4 0 2 A1 r R8F "EN" AD l agg n 0 W5 0 2 A1 r R52 AD l agg n 0 W6 0 2 A1 r R56 AD l agg n 0 8 A10 r R57 A5 a A11 A1 r R90 "tstDriver" A13 i 212992 A16 r R5C A14 r R91 "LogicTstDriver" A12 lor 1 R92 "Logic" AB r R93 "TstDriver" R24 4 W7 8 0 W1 W2 W3 W4 W8 0 3 A0 a A0 A1A RoseWireData L cw 0 A1 r R5E W9 0 3 A0 a A0 A1A L cw 0 A1 r R5F W5 W6 WA 4 0 W3 W8 W5 W1 0 C5 WB 3 0 W5 W4 W9 0 C7 WC 4 0 W2 W1 W8 W1 0 C19 W0 4 0 W1 0 1 A1 r R5D W2 0 1 A1 r R5F W3 0 1 A1 r R5E W4 0 1 A1 r R51 2 A17 i 100 A18 i 2 R61 pE WD 3 0 W2 W9 W6 0 C1A W0 3 0 W1 0 1 A1 r R5D W2 0 1 A1 r R5F W3 0 1 A1 r R5E 2 A17 i 48 A18 i 2 R61 nE 8 2 2 3 0 W1C 4 0 W1 W10 WB W12 0 C1B W0 4 0 W1 0 2 A1 r R94 "Vdd" AD l agg n 0 W2 0 2 A1 r R95 "Gnd" AD l agg n 0 W3 3 2 A1 r R96 "Address" AD ls agg n 0 W4 0 0 W5 0 0 W6 0 0 W7 8 2 A1 r R97 "Select" AD ls agg d 0 W8 0 0 W9 0 0 WA 0 0 WB 0 0 WC 0 0 WD 0 0 WE 0 0 WF 0 0 4 A1 r R98 "DecoderS" A14 r R99 "LogicDecoderS" A12 lor 1 R9A "LogicMacro" AB r R9B "DecoderS a=3 s=8" R24 2 W10 6 0 W1 W2 W3 W7 W11 3 1 A1 r R9C "nAd" W12 0 0 W13 0 0 W14 0 0 W15 3 1 A1 r R9D "nnAd" W16 0 0 W17 0 0 W18 0 0 W19 5 0 W1 W2 W11 W15 W7 0 C1C W0 5 0 W1 0 1 A1 r R9E "Vdd" W2 0 1 A1 r R9F "Gnd" W3 3 1 A1 r R9C W4 0 0 W5 0 0 W6 0 0 W7 3 1 A1 r R9D W8 0 0 W9 0 0 WA 0 0 WB 8 1 A1 r R97 WC 0 0 WD 0 0 WE 0 0 WF 0 0 W10 0 0 W11 0 0 W12 0 0 W13 0 0 1 A1 r RA0 "DecoderSBody" R24 8 W14 13 0 W1 W2 W3 W7 WB W15 3 0 W4 W5 W6 W16 3 0 W4 W5 WA W17 3 0 W4 W9 W6 W18 3 0 W4 W9 WA W19 3 0 W8 W5 W6 W1A 3 0 W8 W5 WA W1B 3 0 W8 W9 W6 W1C 3 0 W8 W9 WA W1D 4 0 W1 W2 W15 W13 0 C1D W0 4 0 W1 0 1 A1 r RA1 "Vdd" W2 0 1 A1 r RA2 "Gnd" W3 3 1 A1 r R4B W4 0 0 W5 0 0 W6 0 0 W7 0 1 A1 r RA3 "X" 2 A1 r RA4 "Nor3" AB r RA5 "Nor n=3" R24 1 W0 W8 6 0 W1 W5 W7 W4 W6 W2 0 C1E W0 6 0 W1 0 3 A1 r R51 AC H AD l agg n 0 W2 0 3 A1 r R55 AE b agg f 0 AD l agg n 0 W3 0 4 A1 r R52 AE b agg e 0 AD l agg d 0 AF r RA6 "~(I-A + I-B + I-C)" W4 0 3 A1 r R54 AE b agg f 0 AD l agg n 0 W5 0 3 A1 r R6B AE b agg f 0 AD l agg n 0 W6 0 3 A1 r R56 AC L AD l agg n 0 8 A10 r R57 A1 r RA7 "nor3" A5 a A11 A12 lor 2 R59 R5A A13 i 212992 A14 r R5B A15 rb 1 A16 r R5C R24 6 W7 8 0 W1 W2 W3 W4 W5 W8 0 0 W9 0 0 W6 WA 4 0 W4 W8 W1 W1 0 C5 WB 4 0 W2 W9 W8 W1 0 C5 WC 4 0 W5 W3 W9 W1 0 C5 WD 3 0 W6 W5 W3 0 C7 WE 3 0 W6 W2 W3 0 C7 WF 3 0 W6 W4 W3 0 C7 W1E 4 0 W1 W2 W16 W12 0 C1D W1F 4 0 W1 W2 W17 W11 0 C1D W20 4 0 W1 W2 W18 W10 0 C1D W21 4 0 W1 W2 W19 WF 0 C1D W22 4 0 W1 W2 W1A WE 0 C1D W23 4 0 W1 W2 W1B WD 0 C1D W24 4 0 W1 W2 W1C WC 0 C1D W1A 5 0 W1 W11 W3 W15 W2 0 C1F W0 5 0 W1 0 1 A1 r R0 W2 3 1 A1 r RA8 "nX" W3 0 0 W4 0 0 W5 0 0 W6 3 1 A1 r RA9 "I" W7 0 0 W8 0 0 W9 0 0 WA 3 1 A1 r R48 WB 0 0 WC 0 0 WD 0 0 WE 0 1 A1 r R22 0 R8C C20 W0 5 0 W1 0 2 A1 r R0 AD l agg n 0 W2 0 2 A1 r RA8 AD l agg d 0 W3 0 2 A1 r RA9 AD l agg n 0 W4 0 2 A1 r R48 AD l agg d 0 W5 0 2 A1 r R22 AD l agg n 0 4 A1 r RAA "symDriver6" A14 r RAB "LogicSymDriver" A12 lor 1 R9A AB r RAC "SymDriver d=4" R24 2 W6 5 0 W1 W2 W3 W4 W5 W7 4 0 W1 W2 W4 W5 0 C21 W0 4 0 W1 0 3 A1 r R51 AC H AD l agg n 0 W2 0 3 A1 r R6D AE b agg f 0 AD l agg n 0 W3 0 4 A1 r R52 AE b agg e 0 AD l agg d 0 AF r R6F W4 0 3 A1 r R56 AC L AD l agg n 0 9 A10 r R57 A1 r RAD "invBuffer" A5 a A11 A12 lor 2 R59 R5A A13 i 159744 A14 r R5B A15 rb 1 A16 r R5C AB r RAE "InvB" R24 2 W5 4 0 W1 W3 W2 W4 W6 4 0 W2 W1 W3 W1 0 C19 W7 3 0 W2 W3 W4 0 C1A W8 4 0 W1 W3 W2 W5 0 C21 3 3 2 1 3 -1 W159 9 0 W1 W151 W1 W12F W110 WF3 WBF WFB WF5 0 C22 W0 9 0 W1 0 1 A1 r R0 W2 16 1 A1 r R46 W3 0 0 W4 0 0 W5 0 0 W6 0 0 W7 0 0 W8 0 0 W9 0 0 WA 0 0 WB 0 0 WC 0 0 WD 0 0 WE 0 0 WF 0 0 W10 0 0 W11 0 0 W12 0 0 W13 0 1 A1 r RAF "Shift" W14 16 1 A1 r R3D W15 0 1 A1 r RB0 "outMSB" W16 0 0 W17 0 0 W18 0 0 W19 0 0 W1A 0 0 W1B 0 0 W1C 0 0 W1D 0 0 W1E 0 0 W1F 0 0 W20 0 0 W21 0 0 W22 0 0 W23 0 0 W24 0 0 W25 0 1 A1 r RB1 "inLSB" W26 0 1 A1 r RB2 "Load" W27 0 1 A1 r RB3 "CK" W28 16 1 A1 r R30 W29 0 0 W2A 0 0 W2B 0 0 W2C 0 0 W2D 0 0 W2E 0 0 W2F 0 0 W30 0 0 W31 0 0 W32 0 0 W33 0 0 W34 0 0 W35 0 0 W36 0 0 W37 0 0 W38 0 0 W39 0 1 A1 r R22 1 A1 r RB4 "shReg" R24 3 W3A 12 0 W1 W28 W3B 0 0 W2 W3C 16 2 A1 r RB5 "In0" A0 a A0 W16 W17 W18 W19 W1A W1B W1C W1D W1E W1F W20 W21 W22 W23 W24 W25 W27 W3D 15 0 W16 W17 W18 W19 W1A W1B W1C W1D W1E W1F W20 W21 W22 W23 W24 W3E 16 0 W3F 0 0 W40 0 0 W41 0 0 W42 0 0 W43 0 0 W44 0 0 W45 0 0 W46 0 0 W47 0 0 W48 0 0 W49 0 0 W4A 0 0 W4B 0 0 W4C 0 0 W4D 0 0 W4E 0 0 W13 W26 W14 W39 W4F 5 0 W1 W13 W26 W3B W39 0 C11 W50 6 0 W1 W3E W2 W3C W26 W39 0 C23 W0 6 0 W1 0 2 A1 r R0 AD l agg n 0 W2 16 2 A1 r RB6 "nOut" AD ls agg d 0 W3 0 0 W4 0 0 W5 0 0 W6 0 0 W7 0 0 W8 0 0 W9 0 0 WA 0 0 WB 0 0 WC 0 0 WD 0 0 WE 0 0 WF 0 0 W10 0 0 W11 0 0 W12 0 0 W13 16 2 A1 r RB7 "In1" AD ls agg n 0 W14 0 0 W15 0 0 W16 0 0 W17 0 0 W18 0 0 W19 0 0 W1A 0 0 W1B 0 0 W1C 0 0 W1D 0 0 W1E 0 0 W1F 0 0 W20 0 0 W21 0 0 W22 0 0 W23 0 0 W24 16 2 A1 r RB5 AD ls agg n 0 W25 0 0 W26 0 0 W27 0 0 W28 0 0 W29 0 0 W2A 0 0 W2B 0 0 W2C 0 0 W2D 0 0 W2E 0 0 W2F 0 0 W30 0 0 W31 0 0 W32 0 0 W33 0 0 W34 0 0 W35 0 2 A1 r R82 AD l agg n 0 W36 0 2 A1 r R22 AD l agg n 0 4 A1 r RB8 "invMux2b" A14 r RB9 "LogicInvMux" A12 lor 1 R9A AB r RBA "InvMux b=16" R24 2 W37 8 0 W1 W38 0 1 A1 r RBB "NEN" W35 W39 0 1 A1 r RBC "EN" W13 W24 W2 W36 W3A 7 0 W1 W38 W2 W13 W24 W39 W36 0 C24 W0 7 0 W1 0 2 A1 r R0 A0 a A0 W2 0 2 A1 r RBD "A" A0 a A0 W3 16 3 A1 r R52 A19 a A19 A0 a A0 W4 0 0 W5 0 0 W6 0 0 W7 0 0 W8 0 0 W9 0 0 WA 0 0 WB 0 0 WC 0 0 WD 0 0 WE 0 0 WF 0 0 W10 0 0 W11 0 0 W12 0 0 W13 0 0 W14 16 3 A1 r RBE "C" A19 a A19 A0 a A0 W15 0 0 W16 0 0 W17 0 0 W18 0 0 W19 0 0 W1A 0 0 W1B 0 0 W1C 0 0 W1D 0 0 W1E 0 0 W1F 0 0 W20 0 0 W21 0 0 W22 0 0 W23 0 0 W24 0 0 W25 16 3 A1 r RBF "B" A19 a A19 A0 a A0 W26 0 0 W27 0 0 W28 0 0 W29 0 0 W2A 0 0 W2B 0 0 W2C 0 0 W2D 0 0 W2E 0 0 W2F 0 0 W30 0 0 W31 0 0 W32 0 0 W33 0 0 W34 0 0 W35 0 0 W36 0 2 A1 r RC0 "D" A0 a A0 W37 0 2 A1 r R22 A0 a A0 1 A1 r RC1 "a22o2iSeq" R8C C25 W0 7 0 W1 0 3 A1 r R51 AC H AD l agg n 0 W2 0 3 A1 r RBD AE b agg f 0 AD l agg n 0 W3 0 4 A1 r R52 AE b agg e 0 AD l agg d 0 AF r RC2 "~(A*B+C*D)" W4 0 3 A1 r RBE AE b agg f 0 AD l agg n 0 W5 0 3 A1 r RBF AE b agg f 0 AD l agg n 0 W6 0 3 A1 r RC0 AE b agg f 0 AD l agg n 0 W7 0 3 A1 r R56 AC L AD l agg n 0 9 A10 r R57 A5 a A11 A1 r RC3 "a22o2i" A12 lor 2 R59 R5A A13 i 266240 A14 r R5B A15 rb 1 A16 r R5C AB r RC4 "A22o2i" R24 8 W8 10 0 W1 W2 W9 0 0 WA 0 0 WB 0 0 W3 W5 W6 W4 W7 WC 4 0 W5 WB W1 W1 0 C5 WD 4 0 W6 W3 WB W1 0 C5 WE 3 0 WA W6 W3 0 C7 WF 4 0 W2 WB W1 W1 0 C5 W10 3 0 W7 W4 WA 0 C7 W11 4 0 W4 W3 WB W1 0 C5 W12 3 0 W9 W2 W3 0 C7 W13 3 0 W7 W5 W9 0 C7 16 3 2 3 4 0 W3B 5 0 W1 W39 W38 W35 W36 0 C26 W0 5 0 W1 0 2 A1 r R0 AD l agg n 0 W2 0 2 A1 r R48 AD l agg d 0 W3 0 2 A1 r RA8 AD l agg d 0 W4 0 2 A1 r RA9 AD l agg n 0 W5 0 2 A1 r R22 AD l agg n 0 4 A1 r RC5 "symDriver" A14 r RAB A12 lor 1 R9A AB r RC6 "SymDriver d=16" R24 2 W6 5 0 W1 W2 W3 W4 W5 W7 4 0 W1 W2 W3 W5 0 C27 W0 4 0 W1 0 2 A1 r R51 AD l agg n 0 W2 0 2 A1 r R6D AD l agg n 0 W3 0 2 A1 r R52 AD l agg d 0 W4 0 2 A1 r R56 AD l agg n 0 4 A1 r RC7 "Buffer" A14 r RC8 "LogicInv" A12 lor 1 R92 AB r RC9 "Buffer d=4" R8C C21 2 -1 -1 W8 4 0 W1 W2 W4 W5 0 C28 W0 4 0 W1 0 2 A1 r R0 AD l agg n 0 W2 0 2 A1 r R48 AD l agg d 0 W3 0 2 A1 r RA9 AD l agg n 0 W4 0 2 A1 r R22 AD l agg n 0 4 A1 r RCA "driver" AB r RCB "Driver d=20" A12 lor 2 R9A R9A A14 r RCC "LogicDriver" R24 2 W5 5 0 W1 W3 W6 0 0 W2 W4 W7 4 0 W1 W6 W2 W4 0 C29 W0 4 0 W1 0 2 A1 r R51 AD l agg n 0 W2 0 2 A1 r R6D AD l agg n 0 W3 0 2 A1 r R52 AD l agg d 0 W4 0 2 A1 r R56 AD l agg n 0 4 A1 r RC7 A14 r RC8 A12 lor 1 R92 AB r RCD "Buffer d=5" R8C C21 3 -1 -1 W8 4 0 W1 W3 W6 W4 0 C2A W0 4 0 W1 0 2 A1 r R51 AD l agg n 0 W2 0 2 A1 r R6D AD l agg n 0 W3 0 2 A1 r R52 AD l agg d 0 W4 0 2 A1 r R56 AD l agg n 0 4 A1 r RC7 A14 r RC8 A12 lor 1 R92 AB r RCE "Buffer d=2" R8C C21 1 -1 -1 W51 7 0 W1 W3B W28 W3E W27 W14 W39 0 C2B W0 7 0 W1 0 2 A1 r R0 AD l agg n 0 W2 0 2 A1 r RCF "en" AD l agg n 0 W3 16 2 A1 r R83 AD ls agg d 0 W4 0 0 W5 0 0 W6 0 0 W7 0 0 W8 0 0 W9 0 0 WA 0 0 WB 0 0 WC 0 0 WD 0 0 WE 0 0 WF 0 0 W10 0 0 W11 0 0 W12 0 0 W13 0 0 W14 16 2 A1 r RD0 "Input" AD ls agg n 0 W15 0 0 W16 0 0 W17 0 0 W18 0 0 W19 0 0 W1A 0 0 W1B 0 0 W1C 0 0 W1D 0 0 W1E 0 0 W1F 0 0 W20 0 0 W21 0 0 W22 0 0 W23 0 0 W24 0 0 W25 0 2 A1 r RB3 AD l agg n 0 W26 16 2 A1 r RD1 "nOutput" AD ls agg d 0 W27 0 0 W28 0 0 W29 0 0 W2A 0 0 W2B 0 0 W2C 0 0 W2D 0 0 W2E 0 0 W2F 0 0 W30 0 0 W31 0 0 W32 0 0 W33 0 0 W34 0 0 W35 0 0 W36 0 0 W37 0 2 A1 r R22 AD l agg n 0 4 A1 r RD2 "register" A14 r RD3 "LogicRegister" A12 lor 1 R9A AB r RD4 "Register b=16" R24 2 W38 9 0 W1 W26 W25 W3 W39 0 1 A1 r RBC W14 W2 W3A 0 1 A1 r RBB W37 W3B 8 0 W1 W3A W39 W14 W25 W26 W3 W37 0 C2C W0 8 0 W1 0 2 A1 r R0 A0 a A0 W2 0 2 A1 r RD5 "nEn" A0 a A0 W3 0 2 A1 r RD6 "en" A0 a A0 W4 16 3 A1 r RC0 A19 a A19 A0 a A0 W5 0 0 W6 0 0 W7 0 0 W8 0 0 W9 0 0 WA 0 0 WB 0 0 WC 0 0 WD 0 0 WE 0 0 WF 0 0 W10 0 0 W11 0 0 W12 0 0 W13 0 0 W14 0 0 W15 0 2 A1 r RD7 "CK" A0 a A0 W16 16 3 A1 r RD8 "NQ" A19 a A19 A0 a A0 W17 0 0 W18 0 0 W19 0 0 W1A 0 0 W1B 0 0 W1C 0 0 W1D 0 0 W1E 0 0 W1F 0 0 W20 0 0 W21 0 0 W22 0 0 W23 0 0 W24 0 0 W25 0 0 W26 0 0 W27 16 3 A1 r RD9 "Q" A19 a A19 A0 a A0 W28 0 0 W29 0 0 W2A 0 0 W2B 0 0 W2C 0 0 W2D 0 0 W2E 0 0 W2F 0 0 W30 0 0 W31 0 0 W32 0 0 W33 0 0 W34 0 0 W35 0 0 W36 0 0 W37 0 0 W38 0 2 A1 r R22 A0 a A0 1 A1 r RDA "SeqffEn" R8C C2D W0 8 0 W1 0 2 A1 r R51 AD l agg n 0 W2 0 2 A1 r RD5 AD l agg n 0 W3 0 2 A1 r RD6 AD l agg n 0 W4 0 2 A1 r RC0 AD l agg n 0 W5 0 2 A1 r RD7 AD l agg n 0 W6 0 2 A1 r RD8 AD l agg d 0 W7 0 2 A1 r RD9 AD l agg d 0 W8 0 2 A1 r R56 AD l agg n 0 8 A10 r R57 A5 a A11 A1 r RDB "ffEn" A13 i 798720 A16 r R5C A14 r RDC "LogicFlipFlopEnable" A12 lor 1 R92 AB r RDD "FlipFlopEnable" R24 30 W9 21 0 W1 WA 0 0 W2 WB 0 0 W6 WC 0 1 A1 r RBE W7 WD 0 0 WE 0 0 WF 0 0 W4 W10 0 0 W11 0 0 W12 0 0 W13 0 1 A1 r RDE "slave" W3 W14 0 0 W15 0 1 A1 r RDF "master" W16 0 1 A1 r RE0 "nC" W5 W8 W17 4 0 W6 W7 W1 W1 0 C5 W18 3 0 W8 W6 W7 0 C7 W19 4 0 W13 W6 W1 W1 0 C5 W1A 3 0 W8 W13 W6 0 C7 W1B 4 0 W11 W1 W13 W1 0 C2E W0 4 0 W1 0 1 A1 r R5D W2 0 1 A1 r R5F W3 0 1 A1 r R5E W4 0 1 A1 r R51 3 A1B RoseTransistorSize dw A17 i 3 A18 i 4 R61 pE W1C 4 0 W16 WD W13 W1 0 C5 W1D 4 0 W16 W1 WC W1 0 C2F W0 4 0 W1 0 1 A1 r R5D W2 0 1 A1 r R5F W3 0 1 A1 r R5E W4 0 1 A1 r R51 2 A17 i 16 A18 i 2 R61 pE W1E 3 0 W11 W13 W8 0 C30 W0 3 0 W1 0 1 A1 r R5D W2 0 1 A1 r R5F W3 0 1 A1 r R5E 3 A1B dw A17 i 3 A18 i 4 R61 nE W1F 4 0 W13 W1 W11 W1 0 C31 W0 4 0 W1 0 1 A1 r R5D W2 0 1 A1 r R5F W3 0 1 A1 r R5E W4 0 1 A1 r R51 3 A1B dw A17 i 3 A18 i 2 R61 pE W20 3 0 W13 WC W10 0 C7 W21 4 0 W15 WD W1 W1 0 C5 W22 3 0 W16 WC W8 0 C32 W0 3 0 W1 0 1 A1 r R5D W2 0 1 A1 r R5F W3 0 1 A1 r R5E 2 A17 i 8 A18 i 2 R61 nE W23 3 0 W13 W11 W8 0 C33 W0 3 0 W1 0 1 A1 r R5D W2 0 1 A1 r R5F W3 0 1 A1 r R5E 3 A1B dw A17 i 3 A18 i 2 R61 nE W24 3 0 W8 W15 W10 0 C7 W25 4 0 W5 W1 W16 W1 0 C2F W26 3 0 W5 W16 W8 0 C32 W27 4 0 WA W1 W15 W1 0 C34 W0 4 0 W1 0 1 A1 r R5D W2 0 1 A1 r R5F W3 0 1 A1 r R5E W4 0 1 A1 r R51 3 A1B dw A17 i 3 A18 i 4 R61 pE W28 4 0 W4 WB W1 W1 0 C5 W29 4 0 WC WF W15 W1 0 C5 W2A 3 0 WA W15 W8 0 C35 W0 3 0 W1 0 1 A1 r R5D W2 0 1 A1 r R5F W3 0 1 A1 r R5E 3 A1B dw A17 i 3 A18 i 4 R61 nE W2B 4 0 W15 W1 WA W1 0 C36 W0 4 0 W1 0 1 A1 r R5D W2 0 1 A1 r R5F W3 0 1 A1 r R5E W4 0 1 A1 r R51 3 A1B dw A17 i 3 A18 i 2 R61 pE W2C 3 0 W15 W16 W12 0 C7 W2D 4 0 W13 WF WB W1 0 C5 W2E 4 0 W3 WB W1 W1 0 C5 W2F 3 0 W15 WA W8 0 C37 W0 3 0 W1 0 1 A1 r R5D W2 0 1 A1 r R5F W3 0 1 A1 r R5E 3 A1B dw A17 i 3 A18 i 2 R61 nE W30 4 0 W2 WF WB W1 0 C5 W31 3 0 WE W13 W12 0 C7 W32 3 0 W8 W2 WE 0 C7 W33 3 0 W14 W4 W12 0 C7 W34 3 0 W8 W3 W14 0 C7 16 3 3 5 6 0 W3C 5 0 W1 W39 W3A W2 W37 0 C26 W15A 7 0 W1 W10F W116 WF9 WBF W33 WF5 0 C38 W0 7 0 W1 0 1 A1 r R0 W2 0 1 A1 r RE1 "D" W3 0 1 A1 r RE2 "NQ" W4 0 1 A1 r RE3 "p" W5 0 1 A1 r RB3 W6 0 1 A1 r RE4 "Q" W7 0 1 A1 r R22 1 A1 r RE5 "ffP" R24 2 W8 8 0 W1 W2 W9 0 0 W3 W5 W4 W6 W7 WA 6 0 W1 W9 W5 W3 W6 W7 0 C39 W0 6 0 W1 0 2 A1 r R51 AD l agg n 0 W2 0 2 A1 r RC0 AD l agg n 0 W3 0 2 A1 r RD7 AD l agg n 0 W4 0 2 A1 r RD9 AD l agg d 0 W5 0 2 A1 r RD8 AD l agg d 0 W6 0 2 A1 r R56 AD l agg n 0 8 A10 r R57 A5 a A11 A1 r RE6 "ff" A13 i 532480 A16 r R5C A14 r RE7 "LogicFlipFlop" A12 lor 1 R92 AB r RE8 "FlipFlop" R24 24 W7 16 0 W1 W8 0 0 W9 0 0 W4 WA 0 0 WB 0 1 A1 r RDE WC 0 0 WD 0 0 WE 0 1 A1 r RBE WF 0 1 A1 r RE0 W5 W2 W10 0 0 W11 0 1 A1 r RDF W3 W6 W12 4 0 W5 W4 W1 W1 0 C5 W13 3 0 W6 W5 W4 0 C7 W14 4 0 WB W5 W1 W1 0 C5 W15 3 0 W6 WB W5 0 C7 W16 4 0 WC W1 WB W1 0 C3A W0 4 0 W1 0 1 A1 r R5D W2 0 1 A1 r R5F W3 0 1 A1 r R5E W4 0 1 A1 r R51 3 A1B dw A17 i 3 A18 i 4 R61 pE W17 4 0 WF WA WB W1 0 C5 W18 4 0 WF W1 WE W1 0 C2F W19 3 0 WC WB W6 0 C3B W0 3 0 W1 0 1 A1 r R5D W2 0 1 A1 r R5F W3 0 1 A1 r R5E 3 A1B dw A17 i 3 A18 i 4 R61 nE W1A 4 0 WB W1 WC W1 0 C3C W0 4 0 W1 0 1 A1 r R5D W2 0 1 A1 r R5F W3 0 1 A1 r R5E W4 0 1 A1 r R51 3 A1B dw A17 i 3 A18 i 2 R61 pE W1B 3 0 WB WE W10 0 C7 W1C 4 0 W11 WA W1 W1 0 C5 W1D 3 0 WF WE W6 0 C32 W1E 3 0 WB WC W6 0 C3D W0 3 0 W1 0 1 A1 r R5D W2 0 1 A1 r R5F W3 0 1 A1 r R5E 3 A1B dw A17 i 3 A18 i 2 R61 nE W1F 3 0 W6 W11 W10 0 C7 W20 4 0 W3 W1 WF W1 0 C2F W21 3 0 W3 WF W6 0 C32 W22 4 0 W9 W1 W11 W1 0 C3E W0 4 0 W1 0 1 A1 r R5D W2 0 1 A1 r R5F W3 0 1 A1 r R5E W4 0 1 A1 r R51 3 A1B dw A17 i 3 A18 i 4 R61 pE W23 3 0 W9 W11 W6 0 C3F W0 3 0 W1 0 1 A1 r R5D W2 0 1 A1 r R5F W3 0 1 A1 r R5E 3 A1B dw A17 i 3 A18 i 4 R61 nE W24 4 0 WE WD W11 W1 0 C5 W25 4 0 W11 W1 W9 W1 0 C40 W0 4 0 W1 0 1 A1 r R5D W2 0 1 A1 r R5F W3 0 1 A1 r R5E W4 0 1 A1 r R51 3 A1B dw A17 i 3 A18 i 2 R61 pE W26 3 0 W11 WF W8 0 C7 W27 4 0 W2 WD W1 W1 0 C5 W28 3 0 W11 W9 W6 0 C41 W0 3 0 W1 0 1 A1 r R5D W2 0 1 A1 r R5F W3 0 1 A1 r R5E 3 A1B dw A17 i 3 A18 i 2 R61 nE W29 3 0 W6 W2 W8 0 C7 WB 5 0 W1 W9 W2 W4 W7 0 C42 W0 5 0 W1 0 2 A0 a A0 A1 r R0 W2 0 1 A1 r R48 W3 0 1 A1 r R49 W4 0 1 A1 r R47 W5 0 2 A0 a A0 A1 r R22 1 A1 r RE9 "nor2" R24 1 W6 4 0 W1 W7 2 2 A1 r R4B A0 a A0 W4 W3 W2 W5 W8 4 0 W1 W5 W7 W2 0 C43 W0 4 0 W1 0 1 A1 r REA "Vdd" W2 0 1 A1 r REB "Gnd" W3 2 1 A1 r R4B W4 0 0 W5 0 0 W6 0 1 A1 r REC "X" 2 A1 r RED "Nor2" AB r REE "Nor n=2" R24 1 W0 W7 5 0 W1 W5 W6 W4 W2 0 C44 W0 5 0 W1 0 3 A1 r R51 AC H AD l agg n 0 W2 0 3 A1 r R55 AE b agg f 0 AD l agg n 0 W3 0 4 A1 r R52 AE b agg e 0 AD l agg d 0 AF r REF "~(I-A + I-B)" W4 0 3 A1 r R54 AE b agg f 0 AD l agg n 0 W5 0 3 A1 r R56 AC L AD l agg n 0 8 A10 r R57 A1 r RF0 "nor2" A5 a A11 A12 lor 2 R59 R5A A13 i 159744 A14 r R5B A15 rb 1 A16 r R5C R24 4 W6 6 0 W1 W3 W4 W2 W7 0 0 W5 W8 4 0 W4 W7 W1 W1 0 C5 W9 3 0 W5 W2 W3 0 C7 WA 4 0 W2 W3 W7 W1 0 C5 WB 3 0 W5 W4 W3 0 C7 W15B 7 0 W1 W139 W10D W14D WBF W10F WF5 0 C38 W15C 9 0 W1 W13B WF4 WF3 WF0 W112 WBF W13F WF5 0 C45 W0 9 0 W1 0 1 A1 r R0 W2 2 1 A1 r R3F W3 0 0 W4 0 0 W5 0 1 A1 r RF1 "Unload" W6 0 1 A1 r RF2 "Reset" W7 0 1 A1 r RF3 "DataAvailable" W8 2 1 A1 r R31 W9 0 0 WA 0 0 WB 0 1 A1 r R18 WC 0 1 A1 r RF4 "Load" WD 0 1 A1 r R22 1 A1 r RF5 "Fifo2x16" R24 17 WE 35 0 W1 WF 16 1 A9 a AA W10 0 0 W11 0 0 W12 0 0 W13 0 0 W14 0 0 W15 0 0 W16 0 0 W17 0 0 W18 0 0 W19 0 0 W1A 0 0 W1B 0 0 W1C 0 0 W1D 0 0 W1E 0 0 W1F 0 0 W20 16 0 W21 0 0 W22 0 0 W23 0 0 W24 0 0 W25 0 0 W26 0 0 W27 0 0 W28 0 0 W29 0 0 W2A 0 0 W2B 0 0 W2C 0 0 W2D 0 0 W2E 0 0 W2F 0 0 W30 0 0 W31 0 0 WC W32 4 0 WD WD WD WD W33 0 0 W5 WB W34 16 0 W35 0 0 W36 0 0 W37 0 0 W38 0 0 W39 0 0 W3A 0 0 W3B 0 0 W3C 0 0 W3D 0 0 W3E 0 0 W3F 0 0 W40 0 0 W41 0 0 W42 0 0 W43 0 0 W44 0 0 W45 0 1 A9 a AA W46 0 0 W47 0 1 A1 r RF6 "nLoad" W48 4 1 A9 a AA W49 0 0 W4A 0 0 W4B 0 0 W4C 0 0 W4D 4 1 A9 a AA W4E 0 0 W4F 0 0 W50 0 0 W51 0 0 W52 4 1 A1 r RF7 "TailPlus1" W53 0 0 W54 0 0 W55 0 0 W56 0 0 W57 4 0 WD WD WD WD W7 W58 0 0 W59 16 1 A9 a AA W5A 0 0 W5B 0 0 W5C 0 0 W5D 0 0 W5E 0 0 W5F 0 0 W60 0 0 W61 0 0 W62 0 0 W63 0 0 W64 0 0 W65 0 0 W66 0 0 W67 0 0 W68 0 0 W69 0 0 W6A 0 1 A1 r RF8 "nUnload" W6B 4 1 A1 r RF9 "Head" W6C 0 0 W6D 0 0 W6E 0 0 W6F 0 0 W2 W70 4 1 A1 r RFA "Tail" W71 0 0 W72 0 0 W73 0 0 W74 0 0 W75 0 1 A9 a AA W76 4 0 WD WD WD W1 W77 0 1 A1 r RFB "nDataAvailable" W78 0 0 W8 W6 W79 16 0 W7A 0 0 W7B 0 0 W7C 0 0 W7D 0 0 W7E 0 0 W7F 0 0 W80 0 0 W81 0 0 W82 0 0 W83 0 0 W84 0 0 W85 0 0 W86 0 0 W87 0 0 W88 0 0 W89 0 0 W8A 0 1 A9 a AA W8B 4 1 A9 a AA W8C 0 0 W8D 0 0 W8E 0 0 W8F 0 0 W90 0 0 WD W91 5 0 W1 W20 W9 W70 WD 0 C46 W0 5 0 W1 0 1 A1 r R0 W2 16 1 A1 r R45 W3 0 0 W4 0 0 W5 0 0 W6 0 0 W7 0 0 W8 0 0 W9 0 0 WA 0 0 WB 0 0 WC 0 0 WD 0 0 WE 0 0 WF 0 0 W10 0 0 W11 0 0 W12 0 0 W13 0 1 A1 r R83 W14 4 1 A1 r R82 W15 0 0 W16 0 0 W17 0 0 W18 0 0 W19 0 1 A1 r R22 2 A1 r RFC "muxN1" AB r RFD "MuxN1 n=16" R24 2 W1A 6 0 W1 W14 W1B 16 1 A1 r R86 W1C 0 0 W1D 0 0 W1E 0 0 W1F 0 0 W20 0 0 W21 0 0 W22 0 0 W23 0 0 W24 0 0 W25 0 0 W26 0 0 W27 0 0 W28 0 0 W29 0 0 W2A 0 0 W2B 0 0 W13 W2 W19 W2C 5 0 W1 W13 W1B W2 W19 0 C47 W0 5 0 W1 0 1 A1 r R0 W2 0 1 A1 r R83 W3 16 1 A1 r R82 W4 0 0 W5 0 0 W6 0 0 W7 0 0 W8 0 0 W9 0 0 WA 0 0 WB 0 0 WC 0 0 WD 0 0 WE 0 0 WF 0 0 W10 0 0 W11 0 0 W12 0 0 W13 0 0 W14 16 1 A1 r R45 W15 0 0 W16 0 0 W17 0 0 W18 0 0 W19 0 0 W1A 0 0 W1B 0 0 W1C 0 0 W1D 0 0 W1E 0 0 W1F 0 0 W20 0 0 W21 0 0 W22 0 0 W23 0 0 W24 0 0 W25 0 1 A1 r R22 2 A1 r RFE "muxDN1" AB r RFF "MuxDN1 n=16" R24 2 W26 6 0 W1 W27 0 0 W3 W2 W14 W25 W28 4 0 W1 W27 W2 W25 0 CD W29 5 0 W1 W27 W3 W14 W25 0 C48 W0 5 0 W1 0 2 A1 r R0 A0 a A0 W2 0 2 A1 r R48 A0 a A0 W3 16 3 A1 r R89 A19 a A19 A0 a A0 W4 0 0 W5 0 0 W6 0 0 W7 0 0 W8 0 0 W9 0 0 WA 0 0 WB 0 0 WC 0 0 WD 0 0 WE 0 0 WF 0 0 W10 0 0 W11 0 0 W12 0 0 W13 0 0 W14 16 3 A1 r R8A A19 a A19 A0 a A0 W15 0 0 W16 0 0 W17 0 0 W18 0 0 W19 0 0 W1A 0 0 W1B 0 0 W1C 0 0 W1D 0 0 W1E 0 0 W1F 0 0 W20 0 0 W21 0 0 W22 0 0 W23 0 0 W24 0 0 W25 0 2 A1 r R22 A0 a A0 1 A1 r R100 "3BufferISeq" R8C C17 16 2 2 3 0 W2D 4 0 W1 W19 W14 W1B 0 C49 W0 4 0 W1 0 2 A1 r R101 "Vdd" AD l agg n 0 W2 0 2 A1 r R102 "Gnd" AD l agg n 0 W3 4 2 A1 r R96 AD ls agg n 0 W4 0 0 W5 0 0 W6 0 0 W7 0 0 W8 16 2 A1 r R97 AD ls agg d 0 W9 0 0 WA 0 0 WB 0 0 WC 0 0 WD 0 0 WE 0 0 WF 0 0 W10 0 0 W11 0 0 W12 0 0 W13 0 0 W14 0 0 W15 0 0 W16 0 0 W17 0 0 W18 0 0 4 A1 r R98 A14 r R99 A12 lor 1 R9A AB r R103 "DecoderS a=4 s=16" R24 2 W19 6 0 W1 W2 W3 W8 W1A 4 1 A1 r R9C W1B 0 0 W1C 0 0 W1D 0 0 W1E 0 0 W1F 4 1 A1 r R9D W20 0 0 W21 0 0 W22 0 0 W23 0 0 W24 5 0 W1 W2 W1A W1F W8 0 C4A W0 5 0 W1 0 1 A1 r R104 "Vdd" W2 0 1 A1 r R105 "Gnd" W3 4 1 A1 r R9C W4 0 0 W5 0 0 W6 0 0 W7 0 0 W8 4 1 A1 r R9D W9 0 0 WA 0 0 WB 0 0 WC 0 0 WD 16 1 A1 r R97 WE 0 0 WF 0 0 W10 0 0 W11 0 0 W12 0 0 W13 0 0 W14 0 0 W15 0 0 W16 0 0 W17 0 0 W18 0 0 W19 0 0 W1A 0 0 W1B 0 0 W1C 0 0 W1D 0 0 1 A1 r RA0 R24 16 W1E 21 0 W1 W2 W3 W8 WD W1F 4 0 W4 W5 W6 W7 W20 4 0 W4 W5 W6 WC W21 4 0 W4 W5 WB W7 W22 4 0 W4 W5 WB WC W23 4 0 W4 WA W6 W7 W24 4 0 W4 WA W6 WC W25 4 0 W4 WA WB W7 W26 4 0 W4 WA WB WC W27 4 0 W9 W5 W6 W7 W28 4 0 W9 W5 W6 WC W29 4 0 W9 W5 WB W7 W2A 4 0 W9 W5 WB WC W2B 4 0 W9 WA W6 W7 W2C 4 0 W9 WA W6 WC W2D 4 0 W9 WA WB W7 W2E 4 0 W9 WA WB WC W2F 4 0 W1 W2 W1F W1D 0 C4B W0 4 0 W1 0 1 A1 r R106 "Vdd" W2 0 1 A1 r R107 "Gnd" W3 4 1 A1 r R4B W4 0 0 W5 0 0 W6 0 0 W7 0 0 W8 0 1 A1 r R108 "X" 2 A1 r R109 "Nor4" AB r R10A "Nor n=4" R24 1 W0 W9 7 0 W1 W7 W4 W6 W5 W8 W2 0 C4C W0 7 0 W1 0 3 A1 r R51 AC H AD l agg n 0 W2 0 3 A1 r R10B "I-D" AE b agg f 0 AD l agg n 0 W3 0 3 A1 r R54 AE b agg f 0 AD l agg n 0 W4 0 3 A1 r R6B AE b agg f 0 AD l agg n 0 W5 0 3 A1 r R55 AE b agg f 0 AD l agg n 0 W6 0 4 A1 r R52 AE b agg e 0 AD l agg d 0 AF r R10C "~(I-A + I-B + I-C + I-D)" W7 0 3 A1 r R56 AC L AD l agg n 0 8 A10 r R57 A1 r R10D "nor4" A5 a A11 A12 lor 2 R59 R5A A13 i 266240 A14 r R5B A15 rb 1 A16 r R5C R24 8 W8 10 0 W1 W2 W9 0 0 W3 WA 0 0 W4 W5 W6 WB 0 0 W7 WC 4 0 W3 WB W1 W1 0 C5 WD 4 0 W5 W9 WB W1 0 C5 WE 4 0 W4 WA W9 W1 0 C5 WF 4 0 W2 W6 WA W1 0 C5 W10 3 0 W7 W2 W6 0 C7 W11 3 0 W7 W4 W6 0 C7 W12 3 0 W7 W5 W6 0 C7 W13 3 0 W7 W3 W6 0 C7 W30 4 0 W1 W2 W20 W1C 0 C4B W31 4 0 W1 W2 W21 W1B 0 C4B W32 4 0 W1 W2 W22 W1A 0 C4B W33 4 0 W1 W2 W23 W19 0 C4B W34 4 0 W1 W2 W24 W18 0 C4B W35 4 0 W1 W2 W25 W17 0 C4B W36 4 0 W1 W2 W26 W16 0 C4B W37 4 0 W1 W2 W27 W15 0 C4B W38 4 0 W1 W2 W28 W14 0 C4B W39 4 0 W1 W2 W29 W13 0 C4B W3A 4 0 W1 W2 W2A W12 0 C4B W3B 4 0 W1 W2 W2B W11 0 C4B W3C 4 0 W1 W2 W2C W10 0 C4B W3D 4 0 W1 W2 W2D WF 0 C4B W3E 4 0 W1 W2 W2E WE 0 C4B W25 5 0 W1 W3 W1F W1A W2 0 C4D W0 5 0 W1 0 1 A1 r R0 W2 4 1 A1 r RA9 W3 0 0 W4 0 0 W5 0 0 W6 0 0 W7 4 1 A1 r R48 W8 0 0 W9 0 0 WA 0 0 WB 0 0 WC 4 1 A1 r RA8 WD 0 0 WE 0 0 WF 0 0 W10 0 0 W11 0 1 A1 r R22 0 R8C C4E W0 5 0 W1 0 2 A1 r R0 AD l agg n 0 W2 0 2 A1 r RA9 AD l agg n 0 W3 0 2 A1 r R48 AD l agg d 0 W4 0 2 A1 r RA8 AD l agg d 0 W5 0 2 A1 r R22 AD l agg n 0 4 A1 r R10E "symDriver" A14 r RAB A12 lor 1 R9A AB r R10F "SymDriver d=8" R24 2 W6 5 0 W1 W2 W3 W4 W5 W7 4 0 W1 W3 W4 W5 0 C2A W8 4 0 W1 W3 W2 W5 0 C4F W0 4 0 W1 0 2 A1 r R0 AD l agg n 0 W2 0 2 A1 r R48 AD l agg d 0 W3 0 2 A1 r RA9 AD l agg n 0 W4 0 2 A1 r R22 AD l agg n 0 4 A1 r R110 "driver" A14 r RCC A12 lor 1 R9A AB r R111 "Driver d=10" R24 2 W5 5 0 W1 W2 W6 0 0 W3 W4 W7 4 0 W1 W6 W2 W4 0 C50 W0 4 0 W1 0 2 A1 r R51 AD l agg n 0 W2 0 2 A1 r R6D AD l agg n 0 W3 0 2 A1 r R52 AD l agg d 0 W4 0 2 A1 r R56 AD l agg n 0 4 A1 r RC7 A14 r RC8 A12 lor 1 R92 AB r R112 "Buffer d=3" R8C C21 2 -1 -1 W8 4 0 W1 W3 W6 W4 0 C2A 4 3 1 3 2 -1 W92 5 0 W1 W34 WA W70 WD 0 C46 W93 7 0 W1 W20 WF WB W79 W3 WD 0 C51 W0 7 0 W1 0 2 A1 r R0 A0 a A0 W2 16 3 A1 r R83 A19 a A19 A0 a A0 W3 0 0 W4 0 0 W5 0 0 W6 0 0 W7 0 0 W8 0 0 W9 0 0 WA 0 0 WB 0 0 WC 0 0 WD 0 0 WE 0 0 WF 0 0 W10 0 0 W11 0 0 W12 0 0 W13 16 3 A1 r RD1 A19 a A19 A0 a A0 W14 0 0 W15 0 0 W16 0 0 W17 0 0 W18 0 0 W19 0 0 W1A 0 0 W1B 0 0 W1C 0 0 W1D 0 0 W1E 0 0 W1F 0 0 W20 0 0 W21 0 0 W22 0 0 W23 0 0 W24 0 2 A1 r RB3 A0 a A0 W25 16 3 A1 r RCF A19 a A19 A0 a A0 W26 0 0 W27 0 0 W28 0 0 W29 0 0 W2A 0 0 W2B 0 0 W2C 0 0 W2D 0 0 W2E 0 0 W2F 0 0 W30 0 0 W31 0 0 W32 0 0 W33 0 0 W34 0 0 W35 0 0 W36 0 2 A1 r RD0 A0 a A0 W37 0 2 A1 r R22 A0 a A0 1 A1 r R113 "" R8C C52 W0 7 0 W1 0 1 A1 r R0 W2 0 1 A1 r R83 W3 0 1 A1 r RD1 W4 0 1 A1 r RB3 W5 0 1 A1 r RCF W6 0 1 A1 r RD0 W7 0 1 A1 r R22 1 A1 r R114 "reg1" R24 2 W8 8 0 W1 W2 W3 W9 0 0 W4 W5 W6 W7 WA 8 0 W1 W9 W5 W6 W4 W3 W2 W7 0 C2D WB 4 0 W1 W5 W9 W7 0 CD 16 3 1 2 4 0 W94 7 0 W1 W34 W59 WB W79 W4 WD 0 C51 W95 5 0 W1 WD W6B W79 WC 0 C53 W0 5 0 W1 0 2 A1 r R115 "Vdd" AD l agg n 0 W2 0 2 A1 r R116 "Gnd" AD l agg n 0 W3 4 2 A1 r R96 AD ls agg n 0 W4 0 0 W5 0 0 W6 0 0 W7 0 0 W8 16 2 A1 r R97 AD ls agg d 0 W9 0 0 WA 0 0 WB 0 0 WC 0 0 WD 0 0 WE 0 0 WF 0 0 W10 0 0 W11 0 0 W12 0 0 W13 0 0 W14 0 0 W15 0 0 W16 0 0 W17 0 0 W18 0 0 W19 0 2 A1 r R117 "Enable" AD l agg n 0 4 A1 r R118 "Decoder" A14 r R119 "LogicDecoder" A12 lor 1 R9A AB r R11A "Decoder a=4 s=16" R24 3 W1A 8 0 W1 W2 W3 W8 W19 W1B 4 1 A1 r R9C W1C 0 0 W1D 0 0 W1E 0 0 W1F 0 0 W20 4 1 A1 r R9D W21 0 0 W22 0 0 W23 0 0 W24 0 0 W25 0 1 A1 r R11B "nEn" W26 6 0 W1 W2 W1B W20 W8 W25 0 C54 W0 6 0 W1 0 1 A1 r R11C "Vdd" W2 0 1 A1 r R11D "Gnd" W3 4 1 A1 r R9C W4 0 0 W5 0 0 W6 0 0 W7 0 0 W8 4 1 A1 r R9D W9 0 0 WA 0 0 WB 0 0 WC 0 0 WD 16 1 A1 r R97 WE 0 0 WF 0 0 W10 0 0 W11 0 0 W12 0 0 W13 0 0 W14 0 0 W15 0 0 W16 0 0 W17 0 0 W18 0 0 W19 0 0 W1A 0 0 W1B 0 0 W1C 0 0 W1D 0 0 W1E 0 1 A1 r R11E "nEn" 1 A1 r R11F "DecoderBody" R24 16 W1F 22 0 W1 W2 W3 W8 WD W1E W20 5 0 W4 W5 W6 W7 W1E W21 5 0 W4 W5 W6 WC W1E W22 5 0 W4 W5 WB W7 W1E W23 5 0 W4 W5 WB WC W1E W24 5 0 W4 WA W6 W7 W1E W25 5 0 W4 WA W6 WC W1E W26 5 0 W4 WA WB W7 W1E W27 5 0 W4 WA WB WC W1E W28 5 0 W9 W5 W6 W7 W1E W29 5 0 W9 W5 W6 WC W1E W2A 5 0 W9 W5 WB W7 W1E W2B 5 0 W9 W5 WB WC W1E W2C 5 0 W9 WA W6 W7 W1E W2D 5 0 W9 WA W6 WC W1E W2E 5 0 W9 WA WB W7 W1E W2F 5 0 W9 WA WB WC W1E W30 4 0 W1 W2 W20 W1D 0 C55 W0 4 0 W1 0 1 A1 r R120 "Vdd" W2 0 1 A1 r R121 "Gnd" W3 5 1 A1 r R4B W4 0 0 W5 0 0 W6 0 0 W7 0 0 W8 0 0 W9 0 1 A1 r R122 "X" 2 A1 r R123 "Nor5" AB r R124 "Nor n=5" R24 3 WA 9 0 W1 W2 W3 W9 WB 0 1 A1 r R125 "One" WC 0 1 A1 r R126 "Two" WD 2 0 WB WC WE 2 0 W4 W5 WF 3 0 W6 W7 W8 W10 4 0 W1 W2 WD W9 0 C43 W11 4 0 W1 W2 WE WB 0 C12 W12 4 0 W1 W2 WF WC 0 CA W31 4 0 W1 W2 W21 W1C 0 C55 W32 4 0 W1 W2 W22 W1B 0 C55 W33 4 0 W1 W2 W23 W1A 0 C55 W34 4 0 W1 W2 W24 W19 0 C55 W35 4 0 W1 W2 W25 W18 0 C55 W36 4 0 W1 W2 W26 W17 0 C55 W37 4 0 W1 W2 W27 W16 0 C55 W38 4 0 W1 W2 W28 W15 0 C55 W39 4 0 W1 W2 W29 W14 0 C55 W3A 4 0 W1 W2 W2A W13 0 C55 W3B 4 0 W1 W2 W2B W12 0 C55 W3C 4 0 W1 W2 W2C W11 0 C55 W3D 4 0 W1 W2 W2D W10 0 C55 W3E 4 0 W1 W2 W2E WF 0 C55 W3F 4 0 W1 W2 W2F WE 0 C55 W27 4 0 W1 W19 W25 W2 0 C56 W0 4 0 W1 0 2 A1 r R0 AD l agg n 0 W2 0 2 A1 r RA9 AD l agg n 0 W3 0 2 A1 r R48 AD l agg d 0 W4 0 2 A1 r R22 AD l agg n 0 4 A1 r R127 "invDriver" A14 r RC8 A12 lor 1 R9A AB r R128 "InvDriver d=16" R24 2 W5 5 0 W1 W2 W6 0 0 W3 W4 W7 4 0 W1 W6 W3 W4 0 C57 W0 4 0 W1 0 2 A1 r R0 AD l agg n 0 W2 0 2 A1 r RA9 AD l agg n 0 W3 0 2 A1 r R48 AD l agg d 0 W4 0 2 A1 r R22 AD l agg n 0 4 A1 r R129 "driver" AB r R12A "Driver d=13" A12 lor 3 R9A R9A R9A A14 r RCC R24 2 W5 5 0 W1 W3 W2 W6 0 0 W4 W7 4 0 W1 W6 W3 W4 0 C27 W8 4 0 W1 W2 W6 W4 0 C2A W8 4 0 W1 W2 W6 W4 0 CD W28 5 0 W1 W3 W20 W1B W2 0 C58 W0 5 0 W1 0 1 A1 r R0 W2 4 1 A1 r RA9 W3 0 0 W4 0 0 W5 0 0 W6 0 0 W7 4 1 A1 r R48 W8 0 0 W9 0 0 WA 0 0 WB 0 0 WC 4 1 A1 r RA8 WD 0 0 WE 0 0 WF 0 0 W10 0 0 W11 0 1 A1 r R22 0 R8C C4E 4 3 1 3 2 -1 W96 10 0 W1 W6B W75 WC W6 WB W57 W48 W1 WD 0 C59 W0 10 0 W1 0 2 A1 r R0 AD l agg n 0 W2 4 2 A1 r R83 AD ls agg d 0 W3 0 0 W4 0 0 W5 0 0 W6 0 0 W7 0 2 A1 r R12B "Cout" AD l agg d 0 W8 0 2 A1 r R12C "Count" AD l agg n 0 W9 0 2 A1 r R12D "Load" AD l agg n 0 WA 0 2 A1 r RB3 AD l agg n 0 WB 4 2 A1 r RD0 AD ls agg n 0 WC 0 0 WD 0 0 WE 0 0 WF 0 0 W10 4 2 A1 r RD1 AD ls agg d 0 W11 0 0 W12 0 0 W13 0 0 W14 0 0 W15 0 2 A1 r R12E "Cin" AD l agg n 0 W16 0 2 A1 r R22 AD l agg n 0 4 A1 r R12F "CounterUp" A14 r R130 "LogicCounterUp" A12 lor 1 R9A AB r R131 "CounterUp b=4" R24 6 W17 15 0 W1 W7 W18 0 0 W19 4 0 W1A 0 0 W1B 0 0 W1C 0 0 W1D 0 0 W1E 0 1 A1 r R132 "ncount" WB W15 WA W10 W2 W1F 4 0 W20 0 0 W21 0 0 W22 0 0 W23 0 0 W8 W24 4 0 W25 0 0 W26 0 0 W27 0 0 W28 0 0 W9 W16 W29 6 0 W1 W19 W2 WA W10 W16 0 C5A W0 6 0 W1 0 2 A1 r R0 AD l agg n 0 W2 4 2 A1 r RD0 AD ls agg n 0 W3 0 0 W4 0 0 W5 0 0 W6 0 0 W7 4 2 A1 r RD1 AD ls agg d 0 W8 0 0 W9 0 0 WA 0 0 WB 0 0 WC 0 2 A1 r RB3 AD l agg n 0 WD 4 2 A1 r R83 AD ls agg d 0 WE 0 0 WF 0 0 W10 0 0 W11 0 0 W12 0 2 A1 r R22 AD l agg n 0 4 A1 r R133 "RegisterSimple" A14 r R134 "LogicRegisterSimple" A12 lor 1 R9A AB r R135 "RegisterSimple b=4" R8C C5B W0 6 0 W1 0 2 A0 a A0 A1 r R0 W2 0 1 A1 r RD0 W3 0 1 A1 r RD1 W4 0 1 A1 r RB3 W5 0 1 A1 r R83 W6 0 2 A0 a A0 A1 r R22 1 A1 r R136 "reg1BSimple" R24 1 W7 6 0 W1 W2 W3 W4 W5 W6 W8 6 0 W1 W2 W4 W5 W3 W6 0 C39 4 3 1 4 2 -1 W2A 6 0 W1 W24 WB W9 W19 W16 0 C5C W0 6 0 W1 0 2 A1 r R0 AD l agg n 0 W2 4 2 A1 r RB5 AD ls agg n 0 W3 0 0 W4 0 0 W5 0 0 W6 0 0 W7 4 2 A1 r RB7 AD ls agg n 0 W8 0 0 W9 0 0 WA 0 0 WB 0 0 WC 0 2 A1 r R82 AD l agg n 0 WD 4 2 A1 r RB6 AD ls agg d 0 WE 0 0 WF 0 0 W10 0 0 W11 0 0 W12 0 2 A1 r R22 AD l agg n 0 4 A1 r R137 "invMux2b" A14 r RB9 A12 lor 1 R9A AB r R138 "InvMux b=4" R24 2 W13 8 0 W1 WC W14 0 1 A1 r RBC W15 0 1 A1 r RBB W7 WD W2 W12 W16 7 0 W1 W15 WD W7 W2 W14 W12 0 C5D W0 7 0 W1 0 2 A1 r R0 A0 a A0 W2 0 2 A1 r RBD A0 a A0 W3 4 3 A1 r R52 A19 a A19 A0 a A0 W4 0 0 W5 0 0 W6 0 0 W7 0 0 W8 4 3 A1 r RBE A19 a A19 A0 a A0 W9 0 0 WA 0 0 WB 0 0 WC 0 0 WD 4 3 A1 r RBF A19 a A19 A0 a A0 WE 0 0 WF 0 0 W10 0 0 W11 0 0 W12 0 2 A1 r RC0 A0 a A0 W13 0 2 A1 r R22 A0 a A0 1 A1 r R139 "a22o2iSeq" R8C C25 4 3 2 3 4 0 W17 5 0 W1 W15 WC W14 W12 0 C20 W2B 6 0 W1 W16 W2 W1F W7 W15 0 C5E W0 6 0 W1 0 1 A1 r R13A "Vdd" W2 0 1 A1 r R13B "Gnd" W3 4 1 A1 r R13C "PIn" W4 0 0 W5 0 0 W6 0 0 W7 0 0 W8 4 1 A1 r R13D "nCOut" W9 0 0 WA 0 0 WB 0 0 WC 0 0 WD 0 1 A1 r R13E "COut" WE 0 1 A1 r R13F "CIn" 2 A1 r R140 "CLP4" AB r R141 "CounterCLG n=4" R24 3 WF 8 0 W1 W2 W3 W8 WD WE W10 2 0 W11 0 0 W12 0 0 W13 2 0 W14 0 0 W15 0 0 W16 7 0 W1 W13 WE W10 W2 WD W2 0 C5F W0 7 0 W1 0 1 A1 r R0 W2 2 1 A1 r R142 "COut" W3 0 0 W4 0 0 W5 0 1 A1 r R143 "CIn" W6 2 1 A1 r R144 "PIn" W7 0 0 W8 0 0 W9 0 1 A1 r R145 "Force" WA 0 1 A1 r R146 "COutX" WB 0 1 A1 r R22 1 A1 r R147 "counterCLP2NL" R24 4 WC 8 0 W1 W5 WD 0 0 W2 WA W6 W9 WB WE 4 0 W1 W9 W4 WB 0 CD WF 4 0 W1 W8 W3 WB 0 CD W10 5 0 W1 WD W7 W8 WB 0 C42 W11 5 0 W1 WD W5 WA WB 0 C60 W0 5 0 W1 0 2 A0 a A0 A1 r R0 W2 0 1 A1 r R49 W3 0 1 A1 r R47 W4 0 1 A1 r R48 W5 0 2 A0 a A0 A1 r R22 1 A1 r R148 "and2" R24 1 W6 4 0 W1 W4 W7 2 2 A1 r R4B A0 a A0 W3 W2 W5 W8 4 0 W1 W5 W7 W4 0 C61 W0 4 0 W1 0 1 A1 r R149 "Vdd" W2 0 1 A1 r R14A "Gnd" W3 2 1 A1 r R4B W4 0 0 W5 0 0 W6 0 1 A1 r R14B "X" 2 A1 r R14C "And2" AB r R14D "And n=2" R24 1 W0 W7 5 0 W1 W6 W5 W4 W2 0 C62 W0 5 0 W1 0 3 A1 r R51 AC H AD l agg n 0 W2 0 4 A1 r R52 AE b agg e 0 AD l agg d 0 AF r R14E "I-A * I-B" W3 0 3 A1 r R55 AE b agg f 0 AD l agg n 0 W4 0 3 A1 r R54 AE b agg f 0 AD l agg n 0 W5 0 3 A1 r R56 AC L AD l agg n 0 8 A10 r R57 A1 r R14F "and2" A5 a A11 A12 lor 2 R59 R5A A13 i 212992 A14 r R5B A15 rb 1 A16 r R5C R24 5 W6 7 0 W1 W7 0 0 W3 W2 W4 W8 0 0 W5 W9 4 0 W1 W7 W2 W5 0 CC WA 4 0 W3 W7 W1 W1 0 C5 WB 4 0 W4 W7 W1 W1 0 C5 WC 3 0 W8 W3 W7 0 C7 WD 3 0 W5 W4 W8 0 C7 W17 8 0 W1 WB W15 WC W6 W7 W12 W2 1 A1 r R150 "1/2" C63 W0 8 0 W1 0 1 A1 r R0 W2 0 1 A1 r R151 "COut0" W3 0 1 A1 r R143 W4 0 1 A1 r R152 "COut1" W5 0 1 A1 r R153 "PIn0" W6 0 1 A1 r R154 "PIn1" W7 0 1 A1 r R155 "POut" W8 0 1 A1 r R22 1 A1 r R156 "counterCLP2P" R24 3 W9 8 0 W1 W4 W5 W7 W6 W2 W3 W8 WA 4 0 W1 W3 W4 W8 0 CD WB 5 0 W1 W6 W2 W3 W8 0 C2 WC 5 0 W1 W6 W7 W5 W8 0 C2 W18 8 0 W1 W9 W14 WA W4 W5 W11 W2 1 A1 r R157 "0/2" C63 W2C 6 0 W1 W24 W1E W1F W10 W16 0 C64 W0 6 0 W1 0 2 A1 r R0 A0 a A0 W2 4 3 A1 r R52 A19 a A19 A0 a A0 W3 0 0 W4 0 0 W5 0 0 W6 0 0 W7 0 0 W8 4 3 A1 r R47 A19 a A19 A0 a A0 W9 0 0 WA 0 0 WB 0 0 WC 0 0 WD 4 1 A19 a A19 WE 0 0 WF 0 0 W10 0 0 W11 0 0 W12 0 2 A1 r R22 A0 a A0 1 A1 r R113 R8C C65 W0 6 0 W1 0 1 A1 r R0 W2 0 2 A1 r R52 A0 a A0 W3 0 0 W4 0 2 A1 r R47 A0 a A0 W5 0 0 W6 0 1 A1 r R22 1 A1 r R113 R24 2 W7 7 0 W1 W2 W3 W4 W5 W8 0 0 W6 W9 5 0 W1 W5 W2 W8 W6 0 C66 W0 5 0 W1 0 3 A1 r R51 AC H AD l agg n 0 W2 0 3 A1 r R55 AE b agg f 0 AD l agg n 0 W3 0 4 A1 r R52 AE b agg e 0 AD l agg d 0 AF r R158 "(I-A*I-B)+(~I-A*~I-B)" W4 0 3 A1 r R54 AE b agg f 0 AD l agg n 0 W5 0 3 A1 r R56 AC L AD l agg n 0 9 A10 r R57 A5 a A11 A1 r R159 "xnor2" A12 lor 2 R59 R5A A13 i 319488 A14 r R5B A15 rb 1 A16 r R5C AB r R15A "Xnor2" R24 10 W6 9 0 W1 W4 W7 0 0 W8 0 0 W3 W9 0 0 W2 WA 0 0 W5 WB 4 0 W9 W3 W1 W1 0 C5 WC 3 0 W8 W4 W3 0 C7 WD 4 0 W2 WA W1 W1 0 C5 WE 4 0 W4 W3 WA W1 0 C5 WF 4 0 W2 W9 W1 W1 0 C5 W10 3 0 W8 W2 W3 0 C7 W11 3 0 W5 W9 W8 0 C7 W12 4 0 W4 W9 W1 W1 0 C5 W13 3 0 W7 W2 W9 0 C7 W14 3 0 W5 W4 W7 0 C7 WA 5 0 W1 W8 W3 W4 W6 0 C42 4 3 1 3 4 0 W2D 4 0 W1 W1E W18 W16 0 C67 W0 4 0 W1 0 2 A1 r R0 AD l agg n 0 W2 0 2 A1 r R48 AD l agg d 0 W3 0 2 A1 r RA9 AD l agg n 0 W4 0 2 A1 r R22 AD l agg n 0 4 A1 r R15B "driver4" AB r R15C "Driver d=4" A12 lor 2 R9A R9A A14 r RCC R24 2 W5 5 0 W1 W6 0 0 W3 W2 W4 W7 4 0 W1 W6 W2 W4 0 CD W8 4 0 W1 W3 W6 W4 0 CD W2E 5 0 W1 W15 W18 W8 W16 0 C2 W97 10 0 W1 W70 W45 W5 W6 WB W32 W8B W1 WD 0 C59 W98 7 0 W1 W58 W7 W6 WB W77 WD 0 C38 W99 10 0 W1 W52 W8A W5 W6 WB W76 W4D W1 WD 0 C59 W9A 6 0 W1 W58 W31 W78 W33 WD 0 C68 W0 6 0 W1 0 2 A0 a A0 A1 r R0 W2 0 1 A1 r R48 W3 0 1 A1 r R49 W4 0 1 A1 r R63 W5 0 1 A1 r R47 W6 0 2 A0 a A0 A1 r R22 1 A1 r R15D "nor3" R24 1 W7 4 0 W1 W8 3 2 A1 r R4B A0 a A0 W5 W3 W4 W2 W6 W9 4 0 W1 W6 W8 W2 0 C1D W9B 4 0 W1 W5 W6A WD 0 CD W9C 5 0 W1 W33 W77 W46 WD 0 C42 W9D 4 0 W1 WC W47 WD 0 CD W9E 6 0 W1 W31 W6A W90 WC WD 0 C68 W9F 5 0 W1 W46 W5 WC WD 0 C69 W0 5 0 W1 0 3 A1 r R51 AC H AD l agg n 0 W2 0 4 A1 r R52 AE b agg e 0 AD l agg d 0 AF r R15E "(I-A*~I-B)+(~I-A*I-B)" W3 0 3 A1 r R55 AE b agg f 0 AD l agg n 0 W4 0 3 A1 r R54 AE b agg f 0 AD l agg n 0 W5 0 3 A1 r R56 AC L AD l agg n 0 9 A10 r R57 A5 a A11 A1 r R15F "xor2" A12 lor 2 R59 R5A A13 i 319488 A14 r R5B A15 rb 1 A16 r R5C AB r R160 "Xor2" R24 10 W6 9 0 W1 W7 0 0 W2 W8 0 0 W3 W9 0 0 W4 WA 0 0 W5 WB 4 0 W3 W2 W7 W1 0 C5 WC 4 0 W8 W7 W1 W1 0 C5 WD 3 0 W9 W4 W2 0 C7 WE 4 0 W4 W2 W7 W1 0 C5 WF 3 0 W5 W3 W9 0 C7 W10 3 0 W5 W8 W2 0 C7 W11 4 0 W4 WA W1 W1 0 C5 W12 4 0 W3 W8 WA W1 0 C5 W13 3 0 W5 W3 W8 0 C7 W14 3 0 W5 W4 W8 0 C7 WA0 5 0 W1 W78 W5 W47 WD 0 C42 WA1 5 0 W1 W90 W52 W6B WD 0 C6A W0 5 0 W1 0 2 A1 r R0 AD l agg n 0 W2 0 2 A1 r R161 "AEqB" AD l agg d 0 W3 4 2 A1 r R162 "B" AD ls agg n 0 W4 0 0 W5 0 0 W6 0 0 W7 0 0 W8 4 2 A1 r R163 "A" AD ls agg n 0 W9 0 0 WA 0 0 WB 0 0 WC 0 0 WD 0 2 A1 r R22 AD l agg n 0 4 A1 r R164 "comparator" A14 r R165 "LogicComparator" A12 lor 1 R9A AB r R166 "Comparator b=4" R24 2 WE 6 0 W1 W8 WF 4 0 W10 0 0 W11 0 0 W12 0 0 W13 0 0 W2 W3 WD W14 4 0 W1 WD WF W2 0 C6B W0 4 0 W1 0 1 A1 r R167 "Vdd" W2 0 1 A1 r R168 "Gnd" W3 4 1 A1 r R4B W4 0 0 W5 0 0 W6 0 0 W7 0 0 W8 0 1 A1 r R169 "X" 2 A1 r R16A "And4" AB r R16B "And n=4" R24 1 W0 W9 7 0 W1 W5 W6 W8 W4 W7 W2 0 C6C W0 7 0 W1 0 3 A1 r R51 AC H AD l agg n 0 W2 0 3 A1 r R55 AE b agg f 0 AD l agg n 0 W3 0 3 A1 r R6B AE b agg f 0 AD l agg n 0 W4 0 4 A1 r R52 AE b agg e 0 AD l agg d 0 AF r R16C "I-A * I-B * I-C * I-D" W5 0 3 A1 r R54 AE b agg f 0 AD l agg n 0 W6 0 3 A1 r R10B AE b agg f 0 AD l agg n 0 W7 0 3 A1 r R56 AC L AD l agg n 0 8 A10 r R57 A1 r R16D "and4" A5 a A11 A12 lor 2 R59 R5A A13 i 319488 A14 r R5B A15 rb 1 A16 r R5C R24 9 W8 11 0 W1 W3 W4 W9 0 0 W5 W2 WA 0 0 WB 0 0 WC 0 0 W6 W7 WD 4 0 W1 WA W4 W7 0 CC WE 4 0 W5 WA W1 W1 0 C5 WF 3 0 WC W6 WA 0 C7 W10 4 0 W2 WA W1 W1 0 C5 W11 3 0 W9 W3 WC 0 C7 W12 4 0 W3 WA W1 W1 0 C5 W13 3 0 WB W2 W9 0 C7 W14 4 0 W6 WA W1 W1 0 C5 W15 3 0 W7 W5 WB 0 C7 W15 5 0 W1 W3 WF W8 WD 0 C6D W0 5 0 W1 0 2 A1 r R0 A0 a A0 W2 4 3 A1 r R55 A19 a A19 A0 a A0 W3 0 0 W4 0 0 W5 0 0 W6 0 0 W7 4 3 A1 r R52 A19 a A19 A0 a A0 W8 0 0 W9 0 0 WA 0 0 WB 0 0 WC 4 3 A1 r R54 A19 a A19 A0 a A0 WD 0 0 WE 0 0 WF 0 0 W10 0 0 W11 0 2 A1 r R22 A0 a A0 1 A1 r R113 R8C C66 4 3 1 2 3 0 W15D 4 0 W1 W3C WBF WF5 0 C6E W0 4 0 W1 0 2 A1 r R51 AD l agg n 0 W2 0 2 A1 r R6D AD l agg n 0 W3 0 2 A1 r R52 AD l agg d 0 W4 0 2 A1 r R56 AD l agg n 0 4 A1 r R16E "CKBuffer" A14 r RC8 A12 lor 1 R92 AB r R16F "CKBuffer d=28 numRows=7 " R24 14 W5 18 0 W1 W2 W3 W4 W6 4 0 W1 W2 W3 W4 W7 4 0 W1 W2 W3 W4 W8 4 0 W1 W2 W3 W4 W9 4 0 W1 W2 W3 W4 WA 4 0 W1 W2 W3 W4 WB 4 0 W1 W2 W3 W4 WC 4 0 W1 W2 W3 W4 WD 4 0 W1 W2 W3 W4 WE 4 0 W1 W2 W3 W4 WF 4 0 W1 W2 W3 W4 W10 4 0 W1 W2 W3 W4 W11 4 0 W1 W2 W3 W4 W12 4 0 W1 W2 W3 W4 W13 4 0 W1 W2 W3 W4 W6 2 A1 r R170 "invBuffer0" A1C Row i 1 C21 W7 2 A1 r R171 "invBuffer1" A1C i 2 C21 W8 2 A1 r R172 "invBuffer2" A1C i 3 C21 W9 2 A1 r R173 "invBuffer3" A1C i 4 C21 WA 2 A1 r R174 "invBuffer4" A1C i 5 C21 WB 2 A1 r R175 "invBuffer5" A1C i 6 C21 WC 2 A1 r R176 "invBuffer6" A1C i 7 C21 WD 2 A1 r R177 "invBuffer7" A1C i 1 C21 WE 2 A1 r R178 "invBuffer8" A1C i 2 C21 WF 2 A1 r R179 "invBuffer9" A1C i 3 C21 W10 2 A1 r R17A "invBuffer10" A1C i 4 C21 W11 2 A1 r R17B "invBuffer11" A1C i 5 C21 W12 2 A1 r R17C "invBuffer12" A1C i 6 C21 W13 2 A1 r R17D "invBuffer13" A1C i 7 C21 W15E 7 0 W1 W14F W111 W140 WBF W139 WF5 0 C38 W15F 4 0 W1 WC1 W3C WF5 0 C6F W0 4 0 W1 0 2 A1 r R51 AD l agg n 0 W2 0 2 A1 r R6D AD l agg n 0 W3 0 2 A1 r R52 AD l agg d 0 W4 0 2 A1 r R56 AD l agg n 0 4 A1 r R16E A14 r RC8 A12 lor 1 R92 AB r R17E "CKBuffer d=7 numRows=7 " R24 4 W5 8 0 W1 W2 W3 W4 W6 4 0 W1 W2 W3 W4 W7 4 0 W1 W2 W3 W4 W8 4 0 W1 W2 W3 W4 W9 4 0 W1 W2 W3 W4 W6 2 A1 r R17F "invBuffer0" A1C i 1 C21 W7 2 A1 r R180 "invBuffer1" A1C i 2 C21 W8 2 A1 r R181 "invBuffer2" A1C i 3 C21 W9 2 A1 r R182 "invBuffer3" A1C i 4 C21 W160 6 0 W1 W140 W13C W113 W10C WF5 0 C68 W161 6 0 W1 W14C WF9 W13D W152 WF5 0 CE W162 7 0 W1 WF7 W13E W140 WBF W14F WF5 0 C38 W163 5 0 W1 W10C W127 W126 WF5 0 C42 W164 6 0 W1 W113 W10E W13C W152 WF5 0 C9 W165 7 0 W1 WF5 WF8 W140 WBF WF7 WF5 0 C38 W166 6 0 W1 W10E W126 W127 W125 WF5 0 C68 W167 5 0 W1 W115 W13D WFA WF5 0 C2 W168 6 0 W1 W114 W14D W12E W14C WF5 0 CE W169 6 0 W1 WDE W14C W13A W122 WF5 0 CE W16A 5 0 W1 W12A W12B W115 WF5 0 C11 W16B 7 0 W1 W122 W128 W129 W12C W12D WF5 0 C70 W0 7 0 W1 0 2 A0 a A0 A1 r R0 W2 0 1 A1 r R48 W3 0 1 A1 r R47 W4 0 1 A1 r R49 W5 0 1 A1 r R183 "I-D" W6 0 1 A1 r R63 W7 0 2 A0 a A0 A1 r R22 1 A1 r R184 "or4" R24 1 W8 4 0 W1 W2 W9 4 2 A1 r R4B A0 a A0 W3 W4 W6 W5 W7 WA 4 0 W1 W7 W9 W2 0 C71 W0 4 0 W1 0 1 A1 r R185 "Vdd" W2 0 1 A1 r R186 "Gnd" W3 4 1 A1 r R4B W4 0 0 W5 0 0 W6 0 0 W7 0 0 W8 0 1 A1 r R187 "X" 2 A1 r R188 "Or4" AB r R189 "Or n=4" R24 1 W0 W9 7 0 W1 W7 W6 W8 W4 W5 W2 0 C72 W0 7 0 W1 0 3 A1 r R51 AC H AD l agg n 0 W2 0 3 A1 r R10B AE b agg f 0 AD l agg n 0 W3 0 3 A1 r R6B AE b agg f 0 AD l agg n 0 W4 0 4 A1 r R52 AE b agg e 0 AD l agg d 0 AF r R18A "I-A + I-B + I-C + I-D" W5 0 3 A1 r R54 AE b agg f 0 AD l agg n 0 W6 0 3 A1 r R55 AE b agg f 0 AD l agg n 0 W7 0 3 A1 r R56 AC L AD l agg n 0 8 A10 r R57 A1 r R18B "or4" A5 a A11 A12 lor 2 R59 R5A A13 i 319488 A14 r R5B A15 rb 1 A16 r R5C R24 9 W8 11 0 W1 W3 W9 0 0 WA 0 0 W2 W4 WB 0 0 W6 WC 0 0 W5 W7 WD 4 0 W5 W9 W1 W1 0 C5 WE 4 0 W6 WB W9 W1 0 C5 WF 4 0 W3 WA WB W1 0 C5 W10 4 0 W1 WC W4 W7 0 CC W11 4 0 W2 WC WA W1 0 C5 W12 3 0 W7 W2 WC 0 C7 W13 3 0 W7 W3 WC 0 C7 W14 3 0 W7 W6 WC 0 C7 W15 3 0 W7 W5 WC 0 C7 W16C 6 0 W1 W113 W117 W13C W12E WF5 0 C9 W16D 12 0 W1 WF3 WDF W2 W33 WC0 WC2 W22 W20 WCB WBF WF5 0 C73 W0 12 0 W1 0 1 A1 r R0 W2 0 1 A1 r RF2 W3 16 1 A1 r R18C "FifoEn" W4 0 0 W5 0 0 W6 0 0 W7 0 0 W8 0 0 W9 0 0 WA 0 0 WB 0 0 WC 0 0 WD 0 0 WE 0 0 WF 0 0 W10 0 0 W11 0 0 W12 0 0 W13 0 0 W14 0 1 A1 r R15 W15 0 1 A1 r RF4 W16 0 1 A1 r RF1 W17 0 1 A1 r RF3 W18 16 1 A1 r R18D "FifoClock" W19 0 0 W1A 0 0 W1B 0 0 W1C 0 0 W1D 0 0 W1E 0 0 W1F 0 0 W20 0 0 W21 0 0 W22 0 0 W23 0 0 W24 0 0 W25 0 0 W26 0 0 W27 0 0 W28 0 0 W29 0 1 A1 r R18E "NearlyFull" W2A 16 1 A1 r R18F "FifoDis" W2B 0 0 W2C 0 0 W2D 0 0 W2E 0 0 W2F 0 0 W30 0 0 W31 0 0 W32 0 0 W33 0 0 W34 0 0 W35 0 0 W36 0 0 W37 0 0 W38 0 0 W39 0 0 W3A 0 0 W3B 0 1 A1 r R18 W3C 0 1 A1 r R22 1 A1 r R190 "FifoControl" R24 31 W3D 54 0 W1 W3E 0 0 W3F 4 1 A1 r R191 "HeadPlus1" W40 0 0 W41 0 0 W42 0 0 W43 0 0 W44 0 1 A9 a AA W45 0 1 A9 a AA W46 4 0 W1 W3C W1 W3C W47 0 0 W48 0 1 A1 r RFB W49 0 1 A9 a AA W3B W4A 16 2 A1 r R192 "In1" A0 a A0 W4B 0 0 W4C 0 0 W4D 0 0 W4E 0 0 W4F 0 0 W50 0 0 W51 0 0 W52 0 0 W53 0 0 W54 0 0 W55 0 0 W56 0 0 W57 0 0 W58 0 0 W59 0 0 W5A 0 0 W5B 0 0 W5C 16 0 W5D 0 0 W5E 0 0 W5F 0 0 W60 0 0 W61 0 0 W62 0 0 W63 0 0 W64 0 0 W65 0 0 W66 0 0 W67 0 0 W68 0 0 W69 0 0 W6A 0 0 W6B 0 0 W6C 0 0 W3 W6D 0 1 A1 r RF6 W6E 0 0 W6F 4 0 W3C W3C W3C W1 W18 W70 0 0 W71 4 1 A9 a AA W72 0 0 W73 0 0 W74 0 0 W75 0 0 W29 W17 W76 0 0 W77 0 0 W78 4 1 A1 r R193 "Tail" W79 0 0 W7A 0 0 W7B 0 0 W7C 0 0 W7D 4 1 A9 a AA W7E 0 0 W7F 0 0 W80 0 0 W81 0 0 W82 16 0 W83 0 0 W84 0 0 W85 0 0 W86 0 0 W87 0 0 W88 0 0 W89 0 0 W8A 0 0 W8B 0 0 W8C 0 0 W8D 0 0 W8E 0 0 W8F 0 0 W90 0 0 W91 0 0 W92 0 0 W2A W93 4 1 A9 a AA W94 0 0 W95 0 0 W96 0 0 W97 0 0 W98 0 1 A9 a AA W99 4 1 A9 a AA W9A 0 0 W9B 0 0 W9C 0 0 W9D 0 0 W9E 4 1 A9 a AA W9F 0 0 WA0 0 0 WA1 0 0 WA2 0 0 W15 W2 W14 WA3 0 1 A1 r RF8 WA4 0 3 A1 r RE2 A9 a AA A0 a A0 WA5 15 0 W4B W4C W4D W4E W4F W50 W51 W52 W53 W54 W55 W56 W57 W58 W59 WA6 0 0 WA7 4 0 W3C W3C W3C W1 WA8 0 0 WA9 16 0 W5A W4B W4C W4D W4E W4F W50 W51 W52 W53 W54 W55 W56 W57 W58 W59 W16 WAA 4 1 A1 r R194 "HeadPlus10" WAB 0 0 WAC 0 0 WAD 0 0 WAE 0 0 WAF 0 0 WB0 4 1 A1 r RF7 WB1 0 0 WB2 0 0 WB3 0 0 WB4 0 0 WB5 0 0 WB6 0 1 A1 r R195 "Ld" WB7 4 1 A1 r RF9 WB8 0 0 WB9 0 0 WBA 0 0 WBB 0 0 WBC 16 0 WBD 0 0 WBE 0 0 WBF 0 0 WC0 0 0 WC1 0 0 WC2 0 0 WC3 0 0 WC4 0 0 WC5 0 0 WC6 0 0 WC7 0 0 WC8 0 0 WC9 0 0 WCA 0 0 WCB 0 0 WCC 0 0 WCD 0 1 A9 a AA WCE 4 0 W3C W3C W3C W3C WCF 4 0 W3C W3C W3C W3C W3C WD0 10 0 W1 WB7 W98 WB6 W2 W3B WCF W9E W1 W3C 0 C59 WD1 5 0 W1 W18 W82 W3B W3C 0 C74 W0 5 0 W1 0 2 A1 r R0 A0 a A0 W2 16 3 A1 r R48 A19 a A19 A0 a A0 W3 0 0 W4 0 0 W5 0 0 W6 0 0 W7 0 0 W8 0 0 W9 0 0 WA 0 0 WB 0 0 WC 0 0 WD 0 0 WE 0 0 WF 0 0 W10 0 0 W11 0 0 W12 0 0 W13 16 3 A1 r R49 A19 a A19 A0 a A0 W14 0 0 W15 0 0 W16 0 0 W17 0 0 W18 0 0 W19 0 0 W1A 0 0 W1B 0 0 W1C 0 0 W1D 0 0 W1E 0 0 W1F 0 0 W20 0 0 W21 0 0 W22 0 0 W23 0 0 W24 0 2 A1 r R47 A0 a A0 W25 0 2 A1 r R22 A0 a A0 1 A1 r R113 R8C C42 16 2 1 2 0 WD2 5 0 W1 W18 W82 W3B W3C 0 C74 WD3 5 0 W1 W18 W82 W3B W3C 0 C74 WD4 10 0 W1 W3F WCD WB6 W2 W3B W6F W93 W1 W3C 0 C59 WD5 4 0 W1 WBC W3 W3C 0 C75 W0 4 0 W1 0 2 A1 r R0 A0 a A0 W2 16 3 A1 r RA9 A19 a A19 A0 a A0 W3 0 0 W4 0 0 W5 0 0 W6 0 0 W7 0 0 W8 0 0 W9 0 0 WA 0 0 WB 0 0 WC 0 0 WD 0 0 WE 0 0 WF 0 0 W10 0 0 W11 0 0 W12 0 0 W13 16 3 A1 r R48 A19 a A19 A0 a A0 W14 0 0 W15 0 0 W16 0 0 W17 0 0 W18 0 0 W19 0 0 W1A 0 0 W1B 0 0 W1C 0 0 W1D 0 0 W1E 0 0 W1F 0 0 W20 0 0 W21 0 0 W22 0 0 W23 0 0 W24 0 2 A1 r R22 A0 a A0 1 A1 r R113 R8C C76 W0 4 0 W1 0 2 A1 r R0 AD l agg n 0 W2 0 2 A1 r RA9 AD l agg n 0 W3 0 2 A1 r R48 AD l agg d 0 W4 0 2 A1 r R22 AD l agg n 0 4 A1 r R196 "driver8" A14 r RCC A12 lor 1 R9A AB r R197 "Driver d=8" R24 2 W5 5 0 W1 W2 W6 0 0 W3 W4 W7 4 0 W1 W6 W3 W4 0 C21 W8 4 0 W1 W2 W6 W4 0 CD 16 2 1 2 0 WD6 5 0 W1 WB6 W82 W5C W3C 0 C77 W0 5 0 W1 0 2 A1 r R0 A0 a A0 W2 0 2 A1 r R47 A0 a A0 W3 16 3 A1 r R48 A19 a A19 A0 a A0 W4 0 0 W5 0 0 W6 0 0 W7 0 0 W8 0 0 W9 0 0 WA 0 0 WB 0 0 WC 0 0 WD 0 0 WE 0 0 WF 0 0 W10 0 0 W11 0 0 W12 0 0 W13 0 0 W14 16 3 A1 r R49 A19 a A19 A0 a A0 W15 0 0 W16 0 0 W17 0 0 W18 0 0 W19 0 0 W1A 0 0 W1B 0 0 W1C 0 0 W1D 0 0 W1E 0 0 W1F 0 0 W20 0 0 W21 0 0 W22 0 0 W23 0 0 W24 0 0 W25 0 2 A1 r R22 A0 a A0 1 A1 r R113 R8C C2 16 2 2 3 0 WD7 4 0 W1 WBC W2A W3C 0 C78 W0 4 0 W1 0 2 A1 r R0 A0 a A0 W2 16 3 A1 r RA9 A19 a A19 A0 a A0 W3 0 0 W4 0 0 W5 0 0 W6 0 0 W7 0 0 W8 0 0 W9 0 0 WA 0 0 WB 0 0 WC 0 0 WD 0 0 WE 0 0 WF 0 0 W10 0 0 W11 0 0 W12 0 0 W13 16 3 A1 r R48 A19 a A19 A0 a A0 W14 0 0 W15 0 0 W16 0 0 W17 0 0 W18 0 0 W19 0 0 W1A 0 0 W1B 0 0 W1C 0 0 W1D 0 0 W1E 0 0 W1F 0 0 W20 0 0 W21 0 0 W22 0 0 W23 0 0 W24 0 2 A1 r R22 A0 a A0 1 A1 r R113 R8C C56 16 2 1 2 0 WD8 6 0 W1 WA9 W16 WBC W4A W3C 0 C79 W0 6 0 W1 0 2 A0 a A0 A1 r R0 W2 16 1 A1 r R198 "In0" W3 0 0 W4 0 0 W5 0 0 W6 0 0 W7 0 0 W8 0 0 W9 0 0 WA 0 0 WB 0 0 WC 0 0 WD 0 0 WE 0 0 WF 0 0 W10 0 0 W11 0 0 W12 0 0 W13 0 1 A1 r R82 W14 16 2 A1 r R3D A0 a A0 W15 0 0 W16 0 0 W17 0 0 W18 0 0 W19 0 0 W1A 0 0 W1B 0 0 W1C 0 0 W1D 0 0 W1E 0 0 W1F 0 0 W20 0 0 W21 0 0 W22 0 0 W23 0 0 W24 0 0 W25 16 1 A1 r R192 W26 0 0 W27 0 0 W28 0 0 W29 0 0 W2A 0 0 W2B 0 0 W2C 0 0 W2D 0 0 W2E 0 0 W2F 0 0 W30 0 0 W31 0 0 W32 0 0 W33 0 0 W34 0 0 W35 0 0 W36 0 2 A0 a A0 A1 r R22 1 A1 r R199 "mux2" R24 1 W37 5 0 W1 W38 2 2 A1 r R45 A0 a A0 W2 W25 W39 1 0 W13 W14 W36 W3A 5 0 W1 W39 W38 W14 W36 0 C7A W0 5 0 W1 0 2 A1 r R0 AD l agg n 0 W2 1 2 A1 r R82 AD ls agg n 0 W3 0 0 W4 2 1 A1 r R45 W5 16 1 AD ls agg n 0 W6 0 0 W7 0 0 W8 0 0 W9 0 0 WA 0 0 WB 0 0 WC 0 0 WD 0 0 WE 0 0 WF 0 0 W10 0 0 W11 0 0 W12 0 0 W13 0 0 W14 0 0 W15 0 0 W16 16 1 AD ls agg n 0 W17 0 0 W18 0 0 W19 0 0 W1A 0 0 W1B 0 0 W1C 0 0 W1D 0 0 W1E 0 0 W1F 0 0 W20 0 0 W21 0 0 W22 0 0 W23 0 0 W24 0 0 W25 0 0 W26 0 0 W27 16 2 A1 r R3D AD ls agg d 0 W28 0 0 W29 0 0 W2A 0 0 W2B 0 0 W2C 0 0 W2D 0 0 W2E 0 0 W2F 0 0 W30 0 0 W31 0 0 W32 0 0 W33 0 0 W34 0 0 W35 0 0 W36 0 0 W37 0 0 W38 0 2 A1 r R22 AD l agg n 0 4 A1 r R19A "mux2b" A14 r R19B "LogicMux" A12 lor 1 R9A AB r R19C "Mux n=2 b=16" R24 2 W39 7 0 W1 W3A 0 1 A1 r RBC W4 W2 W3B 0 1 A1 r RBB W27 W38 W3C 7 0 W1 W3A W3B W27 W16 W5 W38 0 C7B W0 7 0 W1 0 2 A1 r R0 A0 a A0 W2 0 2 A1 r RC0 A0 a A0 W3 0 2 A1 r RBD A0 a A0 W4 16 3 A1 r R52 A19 a A19 A0 a A0 W5 0 0 W6 0 0 W7 0 0 W8 0 0 W9 0 0 WA 0 0 WB 0 0 WC 0 0 WD 0 0 WE 0 0 WF 0 0 W10 0 0 W11 0 0 W12 0 0 W13 0 0 W14 0 0 W15 16 3 A1 r RBE A19 a A19 A0 a A0 W16 0 0 W17 0 0 W18 0 0 W19 0 0 W1A 0 0 W1B 0 0 W1C 0 0 W1D 0 0 W1E 0 0 W1F 0 0 W20 0 0 W21 0 0 W22 0 0 W23 0 0 W24 0 0 W25 0 0 W26 16 3 A1 r RBF A19 a A19 A0 a A0 W27 0 0 W28 0 0 W29 0 0 W2A 0 0 W2B 0 0 W2C 0 0 W2D 0 0 W2E 0 0 W2F 0 0 W30 0 0 W31 0 0 W32 0 0 W33 0 0 W34 0 0 W35 0 0 W36 0 0 W37 0 2 A1 r R22 A0 a A0 1 A1 r R19D "mux21bit" R8C C7C W0 7 0 W1 0 1 A1 r R0 W2 0 2 A0 a A0 A1 r RC0 W3 0 2 A0 a A0 A1 r RBD W4 0 2 A0 a A0 A1 r R52 W5 0 2 A0 a A0 A1 r RBE W6 0 2 A0 a A0 A1 r RBF W7 0 1 A1 r R22 1 A1 r R113 R24 2 W8 8 0 W1 W2 W3 W9 0 0 W4 W5 W6 W7 WA 4 0 W1 W9 W4 W7 0 CD WB 7 0 W1 W3 W9 W5 W6 W2 W7 0 C25 16 3 3 4 5 0 W3D 5 0 W1 W3A W3B W3 W38 0 C26 WD9 10 0 W1 WAA W44 WB6 W2 W3B W46 W99 W1 W3C 0 C59 WDA 6 0 W1 W2 W3B WB6 W5C W3C 0 C7D W0 6 0 W1 0 1 A1 r R0 W2 0 1 A1 r RF2 W3 0 1 A1 r R19E "Clock" W4 0 1 A1 r R19F "Shift" W5 16 1 A1 r R1A0 "Out" W6 0 0 W7 0 0 W8 0 0 W9 0 0 WA 0 0 WB 0 0 WC 0 0 WD 0 0 WE 0 0 WF 0 0 W10 0 0 W11 0 0 W12 0 0 W13 0 0 W14 0 0 W15 0 0 W16 0 1 A1 r R22 1 A1 r R1A1 "FifoSR" R24 3 W17 13 0 W1 W4 W18 1 0 W19 0 2 A1 r R52 A0 a A0 W1A 15 0 W6 W7 W8 W9 WA WB WC WD WE WF W10 W11 W12 W13 W14 W1B 14 0 W7 W8 W9 WA WB WC WD WE WF W10 W11 W12 W13 W14 W1C 1 0 W15 W2 W1D 15 1 A9 a AA W1E 0 0 W1F 0 0 W20 0 0 W21 0 0 W22 0 0 W23 0 0 W24 0 0 W25 0 0 W26 0 0 W27 0 0 W28 0 0 W29 0 0 W2A 0 0 W2B 0 0 W2C 0 0 W5 W3 W2D 15 0 W7 W8 W9 WA WB WC WD WE WF W10 W11 W12 W13 W14 W15 W2E 1 1 A9 a AA W2F 0 0 W16 W30 8 0 W1 W4 W2D W1A W3 W1D W2 W16 0 C7E W0 8 0 W1 0 2 A1 r R0 AD l agg n 0 W2 0 2 A1 r RCF AD l agg n 0 W3 15 2 A1 r RD0 AD ls agg n 0 W4 0 0 W5 0 0 W6 0 0 W7 0 0 W8 0 0 W9 0 0 WA 0 0 WB 0 0 WC 0 0 WD 0 0 WE 0 0 WF 0 0 W10 0 0 W11 0 0 W12 0 0 W13 15 2 A1 r R83 AD ls agg d 0 W14 0 0 W15 0 0 W16 0 0 W17 0 0 W18 0 0 W19 0 0 W1A 0 0 W1B 0 0 W1C 0 0 W1D 0 0 W1E 0 0 W1F 0 0 W20 0 0 W21 0 0 W22 0 0 W23 0 2 A1 r RB3 AD l agg n 0 W24 15 2 A1 r RD1 AD ls agg d 0 W25 0 0 W26 0 0 W27 0 0 W28 0 0 W29 0 0 W2A 0 0 W2B 0 0 W2C 0 0 W2D 0 0 W2E 0 0 W2F 0 0 W30 0 0 W31 0 0 W32 0 0 W33 0 0 W34 0 2 A1 r R1A2 "r" AD l agg n 0 W35 0 2 A1 r R22 AD l agg n 0 4 A1 r R1A3 "registerWithReset" A14 r R1A4 "LogicRegisterR" A12 lor 1 R9A AB r R1A5 "RegisterR b=15" R24 3 W36 11 0 W1 W13 W37 0 1 A1 r R1A6 "R" W38 0 1 A1 r RBC W24 W34 W39 0 1 A1 r RBB W3 W23 W2 W35 W3A 9 0 W1 W38 W24 W23 W37 W3 W13 W39 W35 0 C7F W0 9 0 W1 0 2 A1 r R0 A0 a A0 W2 0 2 A1 r RBE A0 a A0 W3 15 3 A1 r RD8 A19 a A19 A0 a A0 W4 0 0 W5 0 0 W6 0 0 W7 0 0 W8 0 0 W9 0 0 WA 0 0 WB 0 0 WC 0 0 WD 0 0 WE 0 0 WF 0 0 W10 0 0 W11 0 0 W12 0 0 W13 0 2 A1 r RD7 A0 a A0 W14 0 2 A1 r R49 A0 a A0 W15 15 3 A1 r RC0 A19 a A19 A0 a A0 W16 0 0 W17 0 0 W18 0 0 W19 0 0 W1A 0 0 W1B 0 0 W1C 0 0 W1D 0 0 W1E 0 0 W1F 0 0 W20 0 0 W21 0 0 W22 0 0 W23 0 0 W24 0 0 W25 15 1 A19 a A19 W26 0 0 W27 0 0 W28 0 0 W29 0 0 W2A 0 0 W2B 0 0 W2C 0 0 W2D 0 0 W2E 0 0 W2F 0 0 W30 0 0 W31 0 0 W32 0 0 W33 0 0 W34 0 0 W35 0 2 A1 r RBD A0 a A0 W36 0 2 A1 r R22 A0 a A0 1 A1 r R1A7 "reg1BRSeq" R8C C80 W0 9 0 W1 0 1 A1 r R0 W2 0 2 A1 r RBE A0 a A0 W3 0 2 A1 r RD8 A0 a A0 W4 0 2 A1 r RD7 A0 a A0 W5 0 2 A1 r R49 A0 a A0 W6 0 2 A1 r RC0 A0 a A0 W7 0 0 W8 0 2 A1 r RBD A0 a A0 W9 0 1 A1 r R22 1 A1 r R1A8 "reg1BitReset" R24 3 WA 11 0 W1 W5 W2 WB 0 0 W8 W3 W4 W7 WC 0 0 W6 W9 WD 6 0 W1 WC W4 W7 W3 W9 0 C39 WE 5 0 W1 WC W5 WB W9 0 C42 WF 7 0 W1 W8 WB W2 W7 W6 W9 0 C25 15 3 2 5 6 0 W3B 5 0 W1 W38 W39 W2 W35 0 C81 W0 5 0 W1 0 2 A1 r R0 AD l agg n 0 W2 0 2 A1 r R48 AD l agg d 0 W3 0 2 A1 r RA8 AD l agg d 0 W4 0 2 A1 r RA9 AD l agg n 0 W5 0 2 A1 r R22 AD l agg n 0 4 A1 r R1A9 "symDriver" A14 r RAB A12 lor 1 R9A AB r R1AA "SymDriver d=15" R24 2 W6 5 0 W1 W2 W3 W4 W5 W7 4 0 W1 W2 W3 W5 0 C27 W8 4 0 W1 W2 W4 W5 0 C28 W3C 4 0 W1 W34 W37 W35 0 C57 W31 8 0 W1 W3 W2 W1C W4 W18 W2E W16 0 C82 W0 8 0 W1 0 2 A1 r R0 AD l agg n 0 W2 0 2 A1 r RB3 AD l agg n 0 W3 0 2 A1 r R1A2 AD l agg n 0 W4 1 2 A1 r RD1 AD ls agg d 0 W5 0 0 W6 0 2 A1 r RCF AD l agg n 0 W7 1 2 A1 r RD0 AD ls agg n 0 W8 0 0 W9 1 2 A1 r R83 AD ls agg d 0 WA 0 0 WB 0 2 A1 r R22 AD l agg n 0 4 A1 r R1AB "registerWithReset" A14 r R1A4 A12 lor 1 R9A AB r R1AC "RegisterR b=1" R24 3 WC 11 0 W1 W3 WD 0 1 A1 r RBC W7 WE 0 1 A1 r R1A6 W6 W9 WF 0 1 A1 r RBB W2 W4 WB W10 9 0 W1 WD W4 W2 WE W7 W9 WF WB 0 C83 W0 9 0 W1 0 2 A1 r R0 A0 a A0 W2 0 2 A1 r RBE A0 a A0 W3 1 3 A1 r RD8 A19 a A19 A0 a A0 W4 0 0 W5 0 2 A1 r RD7 A0 a A0 W6 0 2 A1 r R49 A0 a A0 W7 1 3 A1 r RC0 A19 a A19 A0 a A0 W8 0 0 W9 1 1 A19 a A19 WA 0 0 WB 0 2 A1 r RBD A0 a A0 WC 0 2 A1 r R22 A0 a A0 1 A1 r R1AD "reg1BRSeq" R8C C80 1 3 2 5 6 0 W11 5 0 W1 WD WF W6 WB 0 C84 W0 5 0 W1 0 2 A1 r R0 AD l agg n 0 W2 0 2 A1 r R48 AD l agg d 0 W3 0 2 A1 r RA8 AD l agg d 0 W4 0 2 A1 r RA9 AD l agg n 0 W5 0 2 A1 r R22 AD l agg n 0 4 A1 r R1AE "symDriver3" AB r R1AF "SymDriver d=3" A12 lor 2 R9A R9A A14 r RAB R24 2 W6 5 0 W1 W3 W4 W2 W5 W7 4 0 W1 W3 W2 W5 0 CD W8 4 0 W1 W4 W3 W5 0 CD W12 4 0 W1 WE W3 WB 0 C67 W32 4 0 W1 W6 W19 W16 0 CD WDB 4 0 W1 W16 WA3 W3C 0 CD WDC 6 0 W1 W2 W3B W16 WA9 W3C 0 C7D WDD 10 0 W1 W78 W45 W16 W2 W3B WCE W71 W1 W3C 0 C59 WDE 4 0 W1 W6D WB6 W3C 0 C85 W0 4 0 W1 0 2 A1 r R0 AD l agg n 0 W2 0 2 A1 r RA9 AD l agg n 0 W3 0 2 A1 r R48 AD l agg d 0 W4 0 2 A1 r R22 AD l agg n 0 4 A1 r R1B0 "invDriver" A14 r RC8 A12 lor 1 R9A AB r R1B1 "InvDriver d=24" R24 2 W5 5 0 W1 W2 W6 0 0 W3 W4 W7 4 0 W1 W6 W3 W4 0 C86 W0 4 0 W1 0 2 A1 r R0 AD l agg n 0 W2 0 2 A1 r RA9 AD l agg n 0 W3 0 2 A1 r R48 AD l agg d 0 W4 0 2 A1 r R22 AD l agg n 0 4 A1 r R1B2 "driver" A14 r RCC A12 lor 1 R9A AB r R1B3 "Driver d=24" R24 2 W5 5 0 W1 W2 W3 W6 0 0 W4 W7 4 0 W1 W6 W3 W4 0 C87 W0 4 0 W1 0 2 A1 r R51 AD l agg n 0 W2 0 2 A1 r R6D AD l agg n 0 W3 0 2 A1 r R52 AD l agg d 0 W4 0 2 A1 r R56 AD l agg n 0 4 A1 r RC7 A14 r RC8 A12 lor 1 R92 AB r R1B4 "Buffer d=6" R8C C21 3 -1 -1 W8 4 0 W1 W2 W6 W4 0 C2A W8 4 0 W1 W2 W6 W4 0 CD WDF 4 0 W1 W6D W15 W3C 0 C88 W0 4 0 W1 0 3 A0 a A0 A1 r R0 AD l agg n 0 W2 0 2 A1 r R48 AD l agg d 0 W3 0 2 A1 r RA9 AD l agg n 0 W4 0 3 A0 a A0 A1 r R22 AD l agg n 0 4 A1 r R1B5 "invDriver4" A14 r RC8 A12 lor 1 R9A AB r R1B6 "InvDriver d=4" R24 1 W5 4 0 W1 W2 W3 W4 W6 4 0 W1 W3 W2 W4 0 CD WE0 5 0 W1 W14 W78 W3F W3C 0 C6A WE1 7 0 W1 W5B W17 W2 W3B W48 W3C 0 C38 WE2 6 0 W1 W5B W76 W70 W6E W3C 0 C68 WE3 10 0 W1 WB0 W49 W16 W2 W3B WA7 W7D W1 W3C 0 C59 WE4 5 0 W1 W6E W48 WA8 W3C 0 C42 WE5 6 0 W1 W76 WA3 W47 WB6 W3C 0 C68 WE6 5 0 W1 WA8 W16 WB6 W3C 0 C69 WE7 8 0 W1 W3B WAF W29 WA4 W77 W29 W3C 0 C89 W0 8 0 W1 0 1 A1 r R0 W2 0 1 A1 r RB3 W3 0 1 A1 r RE3 W4 0 1 A1 r RE1 W5 0 1 A1 r RE2 W6 0 1 A1 r R1A2 W7 0 1 A1 r RE4 W8 0 1 A1 r R22 1 A1 r R1B7 "ffRP" R24 3 W9 10 0 W1 WA 0 0 W4 W5 W7 WB 0 0 W3 W2 W6 W8 WC 6 0 W1 WA W2 W5 W7 W8 0 C39 WD 7 0 W1 W4 WA W3 WB WB W8 0 C25 WE 4 0 W1 W6 WB W8 0 CD WE8 5 0 W1 W70 W16 W6D W3C 0 C42 WE9 6 0 W1 WA6 WB6 WA3 WAF W3C 0 C8A W0 6 0 W1 0 2 A0 a A0 A1 r R0 W2 0 1 A1 r R47 W3 0 1 A1 r R49 W4 0 1 A1 r R63 W5 0 1 A1 r R48 W6 0 2 A0 a A0 A1 r R22 1 A1 r R1B8 "and3" R24 1 W7 4 0 W1 W8 3 2 A1 r R4B A0 a A0 W2 W3 W4 W5 W6 W9 4 0 W1 W6 W8 W5 0 C8B W0 4 0 W1 0 1 A1 r R1B9 "Vdd" W2 0 1 A1 r R1BA "Gnd" W3 3 1 A1 r R4B W4 0 0 W5 0 0 W6 0 0 W7 0 1 A1 r R1BB "X" 2 A1 r R1BC "And3" AB r R1BD "And n=3" R24 1 W0 W8 6 0 W1 W5 W4 W7 W6 W2 0 C8C W0 6 0 W1 0 3 A1 r R51 AC H AD l agg n 0 W2 0 3 A1 r R55 AE b agg f 0 AD l agg n 0 W3 0 3 A1 r R54 AE b agg f 0 AD l agg n 0 W4 0 4 A1 r R52 AE b agg e 0 AD l agg d 0 AF r R1BE "I-A * I-B * I-C" W5 0 3 A1 r R6B AE b agg f 0 AD l agg n 0 W6 0 3 A1 r R56 AC L AD l agg n 0 8 A10 r R57 A1 r R1BF "and3" A5 a A11 A12 lor 2 R59 R5A A13 i 266240 A14 r R5B A15 rb 1 A16 r R5C R24 7 W7 9 0 W1 W5 W3 W4 W8 0 0 W2 W9 0 0 WA 0 0 W6 WB 4 0 W1 WA W4 W6 0 CC WC 4 0 W3 WA W1 W1 0 C5 WD 4 0 W2 WA W1 W1 0 C5 WE 4 0 W5 WA W1 W1 0 C5 WF 3 0 W9 W5 WA 0 C7 W10 3 0 W8 W2 W9 0 C7 W11 3 0 W6 W3 W8 0 C7 WEA 5 0 W1 W47 WB0 WB7 W3C 0 C6A WEB 5 0 W1 WB5 W77 W3E W3C 0 C2 WEC 6 0 W1 W6D WB5 W16 WA6 W3C 0 CE WED 4 0 W1 W2 W3E W3C 0 CD WEE 5 0 W1 WA6 W78 WAA W3C 0 C6A W16E 5 0 W1 W117 W127 W126 WF5 0 C42 W16F 5 0 W1 W12B W114 WFA WF5 0 C2 W170 5 0 W1 W21 W3D W124 WF5 0 C8D W0 5 0 W1 0 1 A1 r R0 W2 0 1 A1 r R1C0 "HdrCycle" W3 5 1 A1 r R28 W4 0 0 W5 0 0 W6 0 0 W7 0 0 W8 0 0 W9 9 1 A1 r R33 WA 0 1 A1 r R1C1 "RB" WB 0 1 A1 r R35 WC 0 1 A1 r R36 WD 0 1 A1 r R1C2 "WS" WE 0 1 A1 r R1C3 "CWS" WF 0 1 A1 r R1C4 "IOR" W10 0 1 A1 r R1C5 "IOW" W11 0 1 A1 r R1C6 "BIOW" W12 0 1 A1 r R3C W13 0 1 A1 r R22 1 A1 r R1C7 "CommandDecode-A" R24 26 W14 22 0 W1 W15 0 0 W16 0 0 W3 W9 W17 0 0 W18 0 0 W19 0 0 W1A 0 0 W1B 0 0 W1C 0 0 W1D 0 0 W1E 0 0 W1F 0 0 W20 0 0 W21 0 0 W22 0 0 W2 W23 0 0 W24 0 0 W25 0 0 W13 W26 7 0 W1 W23 W4 W6 W7 W5 W13 0 C8E W0 7 0 W1 0 2 A0 a A0 A1 r R0 W2 0 1 A1 r R48 W3 0 1 A1 r R47 W4 0 1 A1 r R63 W5 0 1 A1 r R183 W6 0 1 A1 r R49 W7 0 2 A0 a A0 A1 r R22 1 A1 r R1C8 "nand4" R24 1 W8 4 0 W1 W9 4 2 A1 r R4B A0 a A0 W3 W6 W4 W5 W2 W7 WA 4 0 W1 W7 W9 W2 0 C8F W0 4 0 W1 0 1 A1 r R1C9 "Vdd" W2 0 1 A1 r R1CA "Gnd" W3 4 1 A1 r R4B W4 0 0 W5 0 0 W6 0 0 W7 0 0 W8 0 1 A1 r R1CB "X" 2 A1 r R1CC "Nand4" AB r R1CD "Nand n=4" R24 1 W0 W9 7 0 W1 W7 W6 W8 W4 W5 W2 0 C90 W0 7 0 W1 0 3 A1 r R51 AC H AD l agg n 0 W2 0 3 A1 r R10B AE b agg f 0 AD l agg n 0 W3 0 3 A1 r R6B AE b agg f 0 AD l agg n 0 W4 0 4 A1 r R52 AE b agg e 0 AD l agg d 0 AF r R1CE "~(I-A * I-B * I-C * I-D)" W5 0 3 A1 r R54 AE b agg f 0 AD l agg n 0 W6 0 3 A1 r R55 AE b agg f 0 AD l agg n 0 W7 0 3 A1 r R56 AC L AD l agg n 0 8 A10 r R57 A1 r R1CF "nand4" A5 a A11 A12 lor 2 R59 R5A A13 i 266240 A14 r R5B A15 rb 1 A16 r R5C R24 8 W8 10 0 W1 W6 W9 0 0 WA 0 0 W4 W5 W2 WB 0 0 W3 W7 WC 4 0 W5 W4 W1 W1 0 C5 WD 3 0 WB W2 W4 0 C7 WE 4 0 W6 W4 W1 W1 0 C5 WF 3 0 WA W3 WB 0 C7 W10 4 0 W3 W4 W1 W1 0 C5 W11 3 0 W9 W6 WA 0 C7 W12 4 0 W2 W4 W1 W1 0 C5 W13 3 0 W7 W5 W9 0 C7 W27 5 0 W1 W6 W1E W4 W13 0 C2 W28 6 0 W1 W5 W8 W7 W1C W13 0 C9 W29 6 0 W1 W12 W8 W1B W23 W13 0 C68 W2A 5 0 W1 W7 W20 W4 W13 0 C2 W2B 6 0 W1 W11 W1C W1B W1E W13 0 C68 W2C 6 0 W1 W5 W8 W6 W16 W13 0 C9 W2D 4 0 W1 W4 W25 W13 0 CD W2E 7 0 W1 W21 W8 W7 W5 W6 W13 0 C70 W2F 6 0 W1 W10 W16 W1B W20 W13 0 C68 W30 5 0 W1 W7 W15 W6 W13 0 C2 W31 6 0 W1 W4 W8 W5 W1F W13 0 C9 W32 6 0 W1 WF W21 W1B W25 W13 0 C68 W33 4 0 W1 W6 W17 W13 0 CD W34 7 0 W1 W24 W8 W7 W4 W5 W13 0 C70 W35 6 0 W1 WE W1F W1B W15 W13 0 C68 W36 4 0 W1 W7 W18 W13 0 CD W37 7 0 W1 W1D W8 W6 W4 W5 W13 0 C70 W38 6 0 W1 WD W24 W1B W17 W13 0 C68 W39 4 0 W1 W5 W1A W13 0 CD W3A 7 0 W1 W19 W8 W7 W4 W6 W13 0 C70 W3B 6 0 W1 WC W1D W1B W18 W13 0 C68 W3C 7 0 W1 W22 W7 W6 W4 W5 W13 0 C70 W3D 6 0 W1 WB W19 W1B W1A W13 0 C68 W3E 6 0 W1 WA W22 W1B W8 W13 0 C68 W3F 4 0 W1 W2 W1B W13 0 CD W171 4 0 W1 W113 W13A WF5 0 CD W172 5 0 W1 W141 WFA W64 WF5 0 C91 W0 5 0 W1 0 1 A1 r R0 W2 10 1 A1 r R43 W3 0 0 W4 0 0 W5 0 0 W6 0 0 W7 0 0 W8 0 0 W9 0 0 WA 0 0 WB 0 0 WC 0 0 WD 0 1 A1 r R1D0 "Match" WE 47 1 A1 r R29 WF 0 0 W10 0 0 W11 0 0 W12 0 0 W13 0 0 W14 0 0 W15 0 0 W16 0 0 W17 0 0 W18 0 0 W19 0 0 W1A 0 0 W1B 0 0 W1C 0 0 W1D 0 0 W1E 0 0 W1F 0 0 W20 0 0 W21 0 0 W22 0 0 W23 0 0 W24 0 0 W25 0 0 W26 0 0 W27 0 0 W28 0 0 W29 0 0 W2A 0 0 W2B 0 0 W2C 0 0 W2D 0 0 W2E 0 0 W2F 0 0 W30 0 0 W31 0 0 W32 0 0 W33 0 0 W34 0 0 W35 0 0 W36 0 0 W37 0 0 W38 0 0 W39 0 0 W3A 0 0 W3B 0 0 W3C 0 0 W3D 0 0 W3E 0 1 A1 r R22 1 A1 r R1D1 "IOAddressMatch-A" R24 18 W3F 29 0 W1 W40 4 0 W1B W1C W1D W1E W41 0 0 W42 0 0 W43 4 0 W1F W20 W21 W22 W44 0 0 W45 0 0 W46 0 0 W47 0 0 W48 0 0 W49 0 0 WE W4A 0 0 W2 WD W4B 0 0 W4C 0 0 W4D 0 0 W4E 4 0 WF W10 W11 W12 W4F 0 0 W50 4 0 W23 W24 W25 W26 W51 0 0 W52 0 0 W53 4 0 W17 W18 W19 W1A W54 0 0 W55 0 0 W56 10 1 A9 a AA W34 W35 W36 W37 W38 W39 W3A W3B W3C W3D W57 4 0 W13 W14 W15 W16 W3E W58 5 0 W1 WC W54 W33 W3E 0 C66 W59 5 0 W1 WB W45 W32 W3E 0 C66 W5A 5 0 W1 W54 W41 W45 W3E 0 C2 W5B 6 0 W1 W52 W55 W4A W41 W3E 0 C68 W5C 6 0 W1 W52 W49 W42 WD W3E 0 C8A W5D 11 0 W1 W7 W31 W2E W55 W30 W9 W2F WA W8 W3E 0 C92 W0 11 0 W1 0 1 A1 r R0 W2 0 0 W3 0 0 W4 0 0 W5 0 2 A1 r R48 A0 a A0 W6 0 0 W7 0 0 W8 0 0 W9 0 0 WA 0 0 WB 0 1 A1 r R22 1 A1 r R1D2 "Match4" R24 5 WC 15 0 W1 WD 0 0 W4 W5 W6 W7 W2 WE 0 0 W3 WF 0 0 W10 0 0 W8 WA W9 WB W11 5 0 W1 W9 WD W3 WB 0 C66 W12 5 0 W1 W7 WF W6 WB 0 C66 W13 5 0 W1 WA W10 W8 WB 0 C66 W14 5 0 W1 W2 WE W4 WB 0 C66 W15 7 0 W1 W5 WD W10 WE WF WB 0 C8E W5E 4 0 W1 W29 W4B W3E 0 CD W5F 4 0 W1 W28 W46 W3E 0 CD W60 11 0 W1 W3 W2D W2A W4A W2C W5 W2B W6 W4 W3E 0 C92 W61 6 0 W1 W4D W46 W27 W4B W3E 0 C68 W62 4 0 W1 W3E W50 W51 0 C4B W63 4 0 W1 W3E W43 W4C 0 C4B W64 4 0 W1 W3E W40 W48 0 C4B W65 6 0 W1 W4D W51 W4C W49 W3E 0 C8A W66 4 0 W1 W3E W53 W44 0 C4B W67 4 0 W1 W3E W57 W47 0 C4B W68 4 0 W1 W3E W4E W4F 0 C4B W69 7 0 W1 W42 W48 W47 W4F W44 W3E 0 C93 W0 7 0 W1 0 2 A0 a A0 A1 r R0 W2 0 1 A1 r R48 W3 0 1 A1 r R47 W4 0 1 A1 r R63 W5 0 1 A1 r R183 W6 0 1 A1 r R49 W7 0 2 A0 a A0 A1 r R22 1 A1 r R1D3 "and4" R24 1 W8 4 0 W1 W2 W9 4 2 A1 r R4B A0 a A0 W3 W6 W4 W5 W7 WA 4 0 W1 W7 W9 W2 0 C6B W173 7 0 W1 W64 W3 W13C W113 WB6 WF5 0 C94 W0 7 0 W1 0 1 A1 r R0 W2 47 1 A1 r R29 W3 0 0 W4 0 0 W5 0 0 W6 0 0 W7 0 0 W8 0 0 W9 0 0 WA 0 0 WB 0 0 WC 0 0 WD 0 0 WE 0 0 WF 0 0 W10 0 0 W11 0 0 W12 0 0 W13 0 0 W14 0 0 W15 0 0 W16 0 0 W17 0 0 W18 0 0 W19 0 0 W1A 0 0 W1B 0 0 W1C 0 0 W1D 0 0 W1E 0 0 W1F 0 0 W20 0 0 W21 0 0 W22 0 0 W23 0 0 W24 0 0 W25 0 0 W26 0 0 W27 0 0 W28 0 0 W29 0 0 W2A 0 0 W2B 0 0 W2C 0 0 W2D 0 0 W2E 0 0 W2F 0 0 W30 0 0 W31 0 0 W32 28 1 A1 r R1D4 "PgConfig" W33 0 0 W34 0 0 W35 0 0 W36 0 0 W37 0 0 W38 0 0 W39 0 0 W3A 0 0 W3B 0 0 W3C 0 0 W3D 0 0 W3E 0 0 W3F 0 0 W40 0 0 W41 0 0 W42 0 0 W43 0 0 W44 0 0 W45 0 0 W46 0 0 W47 0 0 W48 0 0 W49 0 0 W4A 0 0 W4B 0 0 W4C 0 0 W4D 0 0 W4E 0 0 W4F 0 1 A1 r R1D5 "nPage" W50 0 1 A1 r R1D6 "nBank" W51 8 1 A1 r R1D7 "BkConfig" W52 0 0 W53 0 0 W54 0 0 W55 0 0 W56 0 0 W57 0 0 W58 0 0 W59 0 0 W5A 0 1 A1 r R22 1 A1 r R1D8 "MemoryAddressMatch-A" R24 50 W5B 58 0 W1 W5C 0 0 W5D 0 0 W5E 0 0 W5F 0 0 W60 0 0 W61 0 0 W62 0 0 W63 0 1 A9 a AA W64 0 0 W65 0 0 W66 0 0 W67 0 0 W68 0 0 W69 0 0 W6A 0 0 W6B 0 0 W6C 9 1 A9 a AA W1F W20 W21 W22 W23 W24 W25 W26 W27 W6D 0 1 A9 a AA W6E 0 0 W6F 0 0 W70 0 0 W71 0 0 W72 0 0 W2 W73 0 0 W74 0 0 W75 0 0 W76 0 0 W77 0 0 W78 0 0 W79 0 0 W7A 0 0 W51 W7B 0 0 W7C 0 0 W7D 0 0 W4F W7E 0 0 W7F 7 0 W3 W4 W5 W6 W7 W8 W9 W80 0 1 A9 a AA W81 0 0 W82 0 1 A9 a AA W83 0 1 A9 a AA W84 0 0 W85 0 1 A9 a AA W86 0 0 W50 W87 0 0 W88 0 0 W89 0 0 W8A 0 0 W32 W8B 0 0 W8C 7 0 WA WB WC WD WE WF W10 W8D 0 0 W8E 0 0 W5A W8F 4 0 W1 W31 W63 W5A 0 CD W90 4 0 W1 W30 W85 W5A 0 CD W91 4 0 W1 W2F W82 W5A 0 CD W92 5 0 W1 W8A W59 W2E W5A 0 C69 W93 5 0 W1 W5E W58 W2D W5A 0 C69 W94 5 0 W1 W8A W77 W55 W5A 0 C2 W95 5 0 W1 W71 W57 W2C W5A 0 C69 W96 5 0 W1 W5E W7C W54 W5A 0 C2 W97 5 0 W1 W8D W56 W2B W5A 0 C69 W98 5 0 W1 W71 W65 W53 W5A 0 C2 W99 4 0 W1 W2A W83 W5A 0 CD W9A 7 0 W1 W50 W77 W65 W6E W7C W5A 0 C8E W9B 5 0 W1 W8D W6E W52 W5A 0 C2 W9C 4 0 W1 W29 W6D W5A 0 CD W9D 4 0 W1 W28 W80 W5A 0 CD W9E 5 0 W1 W8E W4E W1E W5A 0 C69 W9F 5 0 W1 W6A W4D W1D W5A 0 C69 WA0 5 0 W1 W8E W62 W40 W5A 0 C2 WA1 5 0 W1 W8B W4C W1C W5A 0 C69 WA2 5 0 W1 W6A W6B W3F W5A 0 C2 WA3 5 0 W1 W84 W4B W1B W5A 0 C69 WA4 5 0 W1 W8B W74 W3E W5A 0 C2 WA5 5 0 W1 W89 W4A W1A W5A 0 C69 WA6 5 0 W1 W84 W78 W3D W5A 0 C2 WA7 7 0 W1 W7D W62 W74 W78 W6B W5A 0 C8E WA8 5 0 W1 W81 W49 W19 W5A 0 C69 WA9 5 0 W1 W89 W61 W3C W5A 0 C2 WAA 5 0 W1 W66 W48 W18 W5A 0 C69 WAB 5 0 W1 W81 W7A W3B W5A 0 C2 WAC 5 0 W1 W60 W47 W17 W5A 0 C69 WAD 5 0 W1 W66 W5F W3A W5A 0 C2 WAE 5 0 W1 W87 W46 W16 W5A 0 C69 WAF 7 0 W1 W88 W61 W5F W68 W7A W5A 0 C8E WB0 5 0 W1 W60 W68 W39 W5A 0 C2 WB1 5 0 W1 W75 W45 W15 W5A 0 C69 WB2 5 0 W1 W87 W76 W38 W5A 0 C2 WB3 5 0 W1 W70 W44 W14 W5A 0 C69 WB4 5 0 W1 W75 W64 W37 W5A 0 C2 WB5 5 0 W1 W7E W43 W13 W5A 0 C69 WB6 5 0 W1 W70 W79 W36 W5A 0 C2 WB7 5 0 W1 W7B W42 W12 W5A 0 C69 WB8 7 0 W1 W4F W7D W88 W67 W86 W5A 0 C70 WB9 5 0 W1 W7E W69 W35 W5A 0 C2 WBA 7 0 W1 W86 W76 W79 W69 W64 W5A 0 C8E WBB 5 0 W1 W73 W41 W11 W5A 0 C69 WBC 5 0 W1 W7B W5D W34 W5A 0 C2 WBD 4 0 W1 W5A W8C W6F 0 C95 W0 4 0 W1 0 1 A1 r R1D9 "Vdd" W2 0 1 A1 r R1DA "Gnd" W3 7 1 A1 r R4B W4 0 0 W5 0 0 W6 0 0 W7 0 0 W8 0 0 W9 0 0 WA 0 0 WB 0 1 A1 r R1DB "X" 2 A1 r R1DC "Nor7" AB r R1DD "Nor n=7" R24 3 WC 9 0 W1 W2 W3 WB WD 0 1 A1 r R1DE "One" WE 0 1 A1 r R1DF "Two" WF 2 0 WD WE W10 3 0 W4 W5 W6 W11 4 0 W7 W8 W9 WA W12 4 0 W1 W2 WF WB 0 C43 W13 4 0 W1 W2 W10 WD 0 CA W14 4 0 W1 W2 W11 WE 0 C71 WBE 5 0 W1 W73 W5C W33 W5A 0 C2 WBF 4 0 W1 W5A W7F W72 0 C95 WC0 7 0 W1 W67 W5D W6F W72 W5C W5A 0 C8E W174 11 0 W1 W3B W141 WB5 W38 WBF W3A WF3 WC3 WDD WF5 0 C96 W0 11 0 W1 0 1 A1 r R0 W2 0 1 A1 r RC W3 10 1 A1 r R43 W4 0 1 A9 a AA W5 0 0 W6 0 0 W7 0 0 W8 0 0 W9 0 0 WA 0 0 WB 0 0 WC 0 0 WD 0 0 WE 0 1 A1 r R4 WF 0 1 A1 r R1E0 "DExecute" W10 0 1 A1 r R1E1 "Clock" W11 0 1 A1 r RF W12 0 1 A1 r R1E2 "Reset" W13 7 1 A1 r RE W14 0 0 W15 0 0 W16 0 0 W17 0 0 W18 0 0 W19 0 0 W1A 0 0 W1B 0 1 A1 r R1E3 "SelP2" W1C 0 1 A1 r R22 1 A1 r R1E4 "DBusIF" R24 3 W1D 27 0 W1 W1E 0 0 W1F 0 3 A1 r R1E5 "OutPath6" A9 a AA A0 a A0 W11 W2 W20 0 3 A1 r R1E6 "OutPath7" A9 a AA A0 a A0 W3 WE W21 0 3 A1 r R1E7 "OutPath1" A9 a AA A0 a A0 W22 0 3 A1 r R1E8 "OutPath3" A9 a AA A0 a A0 W23 0 3 A1 r R1E9 "SelPath7" A9 a AA A0 a A0 WF W24 0 3 A1 r R1EA "OutPath5" A9 a AA A0 a A0 W25 0 3 A1 r R1EB "DFreeze" A9 a AA A0 a A0 W26 0 3 A1 r R1EC "OutPath4" A9 a AA A0 a A0 W27 0 3 A1 r R1ED "SelPath6" A9 a AA A0 a A0 W28 10 3 A1 r R1EE "nQ" A9 a AA A0 a A0 W29 0 0 W2A 0 0 W2B 0 0 W2C 0 0 W2D 0 0 W2E 0 0 W2F 0 0 W30 0 0 W31 0 0 W32 0 0 W1B W13 W10 W12 W33 0 3 A1 r R1EF "SelPath5" A9 a AA A0 a A0 W34 0 0 W35 0 1 A1 r R1F0 "DSerialIn" W36 0 3 A1 r R1F1 "SelPath3" A9 a AA A0 a A0 W37 0 3 A1 r R1F2 "SelPath4" A9 a AA A0 a A0 W1C W38 5 0 W1 W12 W10 W34 W1C 0 C97 W0 5 0 W1 0 1 A1 r R0 W2 0 1 A1 r R1F3 "Sync" W3 0 1 A1 r R1F4 "CK" W4 0 1 A1 r R1F5 "Raw" W5 0 1 A1 r R22 1 A1 r R1F6 "DBusSync" R24 4 W6 11 0 W1 W7 0 0 W3 W4 W8 0 1 A9 a AA W9 0 0 W2 WA 0 0 WB 0 1 A9 a AA WC 0 1 A9 a AA W5 WD 4 0 W1 WA W2 W5 0 C86 WE 6 0 W1 WC W7 WA W3 W5 0 C98 W0 6 0 W1 0 2 A1 r R0 AD l agg n 0 W2 0 2 A1 r RE2 AD l agg d 0 W3 0 2 A1 r RE1 AD l agg n 0 W4 0 2 A1 r RE4 AD l agg d 0 W5 0 2 A1 r RB3 AD l agg n 0 W6 0 2 A1 r R22 AD l agg n 0 4 A1 r R1F7 "ffMR" A14 r RE7 A12 lor 1 R92 AB r R1F8 "FlipFlopMR" R24 9 W7 11 0 W1 W3 W2 W8 0 1 A1 r R1F9 "nc" W4 W9 0 2 A1 r R1FA "slave" A1A L cs 1 WA 0 1 A1 r R1FB "master" WB 0 1 A1 r R1FC "c" W5 WC 0 2 A1 r R1FD "nmaster" A1A L cs 1 W6 WD 4 0 W1 W2 W4 W6 0 CD WE 4 0 W1 W9 W2 W6 0 CD WF 4 0 W1 W8 WB W6 0 CD W10 6 0 W1 W2 WB W8 W9 W6 1 A1 r R1FE "d" C18 W11 6 0 W1 WC W8 WB W9 W6 1 A1 r R1FC C18 W12 4 0 W1 W5 W8 W6 0 CD W13 4 0 W1 WC WA W6 0 CD W14 6 0 W1 WA W8 WB WC W6 1 A1 r R1FF "b" C18 W15 6 0 W1 W3 WB W8 WC W6 1 A1 r R200 "a" C18 WF 6 0 W1 WB W9 W7 W3 W5 0 C98 W10 6 0 W1 W8 W4 W9 W3 W5 0 C98 W39 23 0 W1 W27 W21 W34 W1B W25 WE WF W1E W23 W1F W22 W13 W24 W36 W11 W20 W37 W35 W33 W26 W2 W1C 0 C99 W0 23 0 W1 0 1 A1 r R0 W2 0 1 A1 r R1ED W3 0 1 A1 r R1E7 W4 0 1 A1 r R201 "DReset" W5 0 1 A1 r R202 "SelPath2" W6 0 1 A1 r R1EB W7 0 1 A1 r R203 "DShiftCK" W8 0 1 A1 r R204 "DExecute" W9 0 1 A1 r R205 "SelPath1" WA 0 1 A1 r R1E9 WB 0 1 A1 r R1E5 WC 0 1 A1 r R1E8 WD 7 1 A1 r R206 "DBus" WE 0 1 A1 r R207 "DSerialOut" WF 0 0 W10 0 0 W11 0 0 W12 0 0 W13 0 1 A1 r R208 "DAddress" W14 0 0 W15 0 1 A1 r R1EA W16 0 1 A1 r R1F1 W17 0 1 A1 r R209 "DSelect" W18 0 1 A1 r R1E6 W19 0 1 A1 r R1F2 W1A 0 1 A1 r R20A "DSerialIn" W1B 0 1 A1 r R1EF W1C 0 1 A1 r R1EC W1D 0 1 A1 r R20B "OutPath2" W1E 0 1 A1 r R22 1 A1 r R20C "DBusInterface" R24 17 W1F 24 0 W1 W20 8 2 A1 r R82 A0 a A0 W21 0 0 W9 W5 W16 W19 W1B W2 WA W17 W22 6 0 W1E W1E W1E W1E W1E W1E W23 8 2 A1 r R45 A0 a A0 W24 0 0 W3 W1D WC W1C W15 WB W18 W25 3 1 A9 a AA W26 0 0 W27 0 0 W28 0 0 W6 W29 0 0 W2A 4 0 W1E W1 W1E W1 W2B 0 0 W2C 0 0 W7 W4 W2D 16 1 A9 a AA W24 W2E 0 0 W2F 0 0 W30 0 0 W31 0 0 W32 0 0 W33 0 0 W34 0 0 W35 0 0 W36 0 0 W37 0 0 W38 0 0 W39 0 0 W3A 0 0 W3B 0 0 W3C 0 0 W8 W3D 0 0 W3E 3 0 W3F 0 0 W40 0 0 W41 0 0 W42 1 0 WD W43 16 0 W1E W1 W1E W1 W1E W1E W1E W1 W1 W1E W1E W1E W1E W1E W1E W1E W44 0 0 W45 6 0 W1E W1E W1E W1 W1 W1E W46 16 1 A9 a AA W47 0 0 W48 0 0 W49 0 0 W4A 0 0 W4B 0 0 W4C 0 0 W4D 0 0 W4E 0 0 W4F 0 0 W50 0 0 W51 0 0 W52 0 0 W53 0 0 W54 0 0 W55 0 0 W56 0 0 W57 3 0 W40 W41 W1A W1E W58 4 0 W1 W29 W8 W1E 0 C2A W59 4 0 W1 W11 W6 W1E 0 C2A W5A 4 0 W1 W12 W29 W1E 0 CD W5B 4 0 W1 W10 W4 W1E 0 C2A W5C 3 0 W1E W1 W22 0 C9A W0 3 0 W1 0 2 A1 r R20D "Gnd" A9 a AA W2 0 2 A1 r R20E "Vdd" A9 a AA W3 6 2 A1 r R20F "Output" A9 a AA W1 W1 W1 W1 W1 W1 1 A1 r R210 "Constant" R24 0 W0 W5D 3 0 W1E W1 W45 0 C9B W0 3 0 W1 0 2 A1 r R20D A9 a AA W2 0 2 A1 r R20E A9 a AA W3 6 2 A1 r R20F A9 a AA W1 W1 W1 W2 W2 W1 1 A1 r R210 R24 0 W0 W5E 6 0 W1 W21 W3D W12 W13 W1E 0 C9C W0 6 0 W1 0 3 A1 r R51 AC H AD l agg n 0 W2 0 3 A1 r RBD AE b agg f 0 AD l agg n 0 W3 0 4 A1 r R52 AE b agg e 0 AD l agg d 0 AF r R211 "~((A*B)+C)" W4 0 3 A1 r RBF AE b agg f 0 AD l agg n 0 W5 0 3 A1 r RBE AE b agg f 0 AD l agg n 0 W6 0 3 A1 r R56 AC L AD l agg n 0 9 A10 r R57 A5 a A11 A1 r R212 "a21o2i" A12 lor 2 R59 R5A A13 i 212992 A14 r R5B A15 rb 1 A16 r R5C AB r R213 "A21o2i" R24 6 W7 8 0 W1 W2 W8 0 0 W9 0 0 W3 W4 W5 W6 WA 4 0 W4 W9 W1 W1 0 C5 WB 4 0 W2 W9 W1 W1 0 C5 WC 3 0 W6 W5 W3 0 C7 WD 4 0 W5 W3 W9 W1 0 C5 WE 3 0 W8 W2 W3 0 C7 WF 3 0 W6 W4 W8 0 C7 W5F 4 0 W1 W3D W2B W1E 0 CD W60 3 0 W1E W1 W2A 0 C9D W0 3 0 W1 0 2 A1 r R20D A9 a AA W2 0 2 A1 r R20E A9 a AA W3 4 2 A1 r R20F A9 a AA W1 W2 W1 W2 1 A1 r R210 R24 0 W0 W61 4 0 W1 W44 W7 W1E 0 C9E W0 4 0 W1 0 2 A1 r R51 AD l agg n 0 W2 0 2 A1 r R6D AD l agg n 0 W3 0 2 A1 r R52 AD l agg d 0 W4 0 2 A1 r R56 AD l agg n 0 4 A1 r RC7 A14 r RC8 A12 lor 1 R92 AB r R214 "Buffer d=15" R8C C21 8 -1 -1 W62 9 0 W1 W43 W21 W2D W24 W2B W7 W46 W1E 0 C22 W63 4 0 W1 W14 W44 W1E 0 C2A W64 4 0 W1 W2C W1A W1E 0 C9F W0 4 0 W1 0 2 A1 r R51 AD l agg n 0 W2 0 2 A1 r R6D AD l agg n 0 W3 0 2 A1 r R52 AD l agg d 0 W4 0 2 A1 r R56 AD l agg n 0 4 A1 r RC7 A14 r RC8 A12 lor 1 R92 AB r R215 "Buffer d=8" R8C C21 4 -1 -1 W65 4 0 W1 WF W2C W1E 0 C2A W66 5 0 W1 WE W20 W23 W1E 0 C15 W67 7 0 W1 W3E W13 W57 W7 W25 W1E 1 A1 r R216 "DBusAddr" CA0 W0 7 0 W1 0 2 A1 r R0 AD l agg n 0 W2 3 2 A1 r R83 AD ls agg d 0 W3 0 0 W4 0 0 W5 0 0 W6 0 2 A1 r RCF AD l agg n 0 W7 3 2 A1 r RD0 AD ls agg n 0 W8 0 0 W9 0 0 WA 0 0 WB 0 2 A1 r RB3 AD l agg n 0 WC 3 2 A1 r RD1 AD ls agg d 0 WD 0 0 WE 0 0 WF 0 0 W10 0 2 A1 r R22 AD l agg n 0 4 A1 r R217 "register" A14 r RD3 A12 lor 1 R9A AB r R218 "Register b=3" R24 2 W11 9 0 W1 W12 0 1 A1 r RBB WC WB W2 W13 0 1 A1 r RBC W7 W6 W10 W14 8 0 W1 W12 W13 W7 WB WC W2 W10 0 CA1 W0 8 0 W1 0 2 A1 r R0 A0 a A0 W2 0 2 A1 r RD5 A0 a A0 W3 0 2 A1 r RD6 A0 a A0 W4 3 3 A1 r RC0 A19 a A19 A0 a A0 W5 0 0 W6 0 0 W7 0 0 W8 0 2 A1 r RD7 A0 a A0 W9 3 3 A1 r RD8 A19 a A19 A0 a A0 WA 0 0 WB 0 0 WC 0 0 WD 3 3 A1 r RD9 A19 a A19 A0 a A0 WE 0 0 WF 0 0 W10 0 0 W11 0 2 A1 r R22 A0 a A0 1 A1 r R219 "SeqffEn" R8C C2D 3 3 3 5 6 0 W15 5 0 W1 W13 W12 W6 W10 0 C84 W68 5 0 W1 W1E W3E W20 W17 0 CA2 W0 5 0 W1 0 2 A1 r R21A "Vdd" AD l agg n 0 W2 0 2 A1 r R21B "Gnd" AD l agg n 0 W3 3 2 A1 r R96 AD ls agg n 0 W4 0 0 W5 0 0 W6 0 0 W7 8 2 A1 r R97 AD ls agg d 0 W8 0 0 W9 0 0 WA 0 0 WB 0 0 WC 0 0 WD 0 0 WE 0 0 WF 0 0 W10 0 2 A1 r R21C "Enable" AD l agg n 0 4 A1 r R118 A14 r R119 A12 lor 1 R9A AB r R21D "Decoder a=3 s=8" R24 3 W11 8 0 W1 W2 W3 W7 W10 W12 3 1 A1 r R9C W13 0 0 W14 0 0 W15 0 0 W16 3 1 A1 r R9D W17 0 0 W18 0 0 W19 0 0 W1A 0 1 A1 r R21E "nEn" W1B 6 0 W1 W2 W12 W16 W7 W1A 0 CA3 W0 6 0 W1 0 1 A1 r R21F "Vdd" W2 0 1 A1 r R220 "Gnd" W3 3 1 A1 r R9C W4 0 0 W5 0 0 W6 0 0 W7 3 1 A1 r R9D W8 0 0 W9 0 0 WA 0 0 WB 8 1 A1 r R97 WC 0 0 WD 0 0 WE 0 0 WF 0 0 W10 0 0 W11 0 0 W12 0 0 W13 0 0 W14 0 1 A1 r R221 "nEn" 1 A1 r R11F R24 8 W15 14 0 W1 W2 W3 W7 WB W14 W16 4 0 W4 W5 W6 W14 W17 4 0 W4 W5 WA W14 W18 4 0 W4 W9 W6 W14 W19 4 0 W4 W9 WA W14 W1A 4 0 W8 W5 W6 W14 W1B 4 0 W8 W5 WA W14 W1C 4 0 W8 W9 W6 W14 W1D 4 0 W8 W9 WA W14 W1E 4 0 W1 W2 W16 W13 0 C4B W1F 4 0 W1 W2 W17 W12 0 C4B W20 4 0 W1 W2 W18 W11 0 C4B W21 4 0 W1 W2 W19 W10 0 C4B W22 4 0 W1 W2 W1A WF 0 C4B W23 4 0 W1 W2 W1B WE 0 C4B W24 4 0 W1 W2 W1C WD 0 C4B W25 4 0 W1 W2 W1D WC 0 C4B W1C 4 0 W1 W10 W1A W2 0 CA4 W0 4 0 W1 0 3 A0 a A0 A1 r R0 AD l agg n 0 W2 0 2 A1 r RA9 AD l agg n 0 W3 0 2 A1 r R48 AD l agg d 0 W4 0 3 A0 a A0 A1 r R22 AD l agg n 0 4 A1 r R222 "invDriver8" A14 r RC8 A12 lor 1 R9A AB r R223 "InvDriver d=8" R24 1 W5 4 0 W1 W3 W2 W4 W6 4 0 W1 W2 W3 W4 0 C21 W1D 5 0 W1 W12 W3 W16 W2 0 CA5 W0 5 0 W1 0 1 A1 r R0 W2 3 1 A1 r RA8 W3 0 0 W4 0 0 W5 0 0 W6 3 1 A1 r RA9 W7 0 0 W8 0 0 W9 0 0 WA 3 1 A1 r R48 WB 0 0 WC 0 0 WD 0 0 WE 0 1 A1 r R22 0 R8C C20 3 3 2 1 3 -1 W3A 7 0 W1 W3 WE W1E W35 W28 W1C 0 CA6 W0 7 0 W1 0 2 A0 a A0 A1 r R0 W2 10 1 A1 r R224 "Q" W3 0 1 A1 r R225 "OutPath" W4 0 0 W5 0 0 W6 0 0 W7 0 0 W8 0 0 W9 0 0 WA 0 0 WB 0 0 WC 0 0 WD 0 1 A1 r R203 WE 0 1 A1 r R226 "SelPath" WF 0 1 A1 r R20A W10 10 1 A1 r R1EE W11 0 0 W12 0 0 W13 0 0 W14 0 0 W15 0 0 W16 0 0 W17 0 0 W18 0 0 W19 0 0 W1A 0 0 W1B 0 2 A0 a A0 A1 r R22 1 A1 r R227 "DBusConstant" R24 1 W1C 8 0 W1 WE W10 W1D 10 2 A1 r RD0 A0 a A0 W4 W5 W6 W7 W8 W9 WA WB WC WF WD W1E 9 0 W4 W5 W6 W7 W8 W9 WA WB WC W2 W1B W1F 7 0 W1 W10 WD W2 WE W1D W1B 0 CA7 W0 7 0 W1 0 2 A1 r R0 AD l agg n 0 W2 10 2 A1 r RD1 AD ls agg d 0 W3 0 0 W4 0 0 W5 0 0 W6 0 0 W7 0 0 W8 0 0 W9 0 0 WA 0 0 WB 0 0 WC 0 0 WD 0 2 A1 r RB3 AD l agg n 0 WE 10 2 A1 r R83 AD ls agg d 0 WF 0 0 W10 0 0 W11 0 0 W12 0 0 W13 0 0 W14 0 0 W15 0 0 W16 0 0 W17 0 0 W18 0 0 W19 0 2 A1 r RCF AD l agg n 0 W1A 10 2 A1 r RD0 AD ls agg n 0 W1B 0 0 W1C 0 0 W1D 0 0 W1E 0 0 W1F 0 0 W20 0 0 W21 0 0 W22 0 0 W23 0 0 W24 0 0 W25 0 2 A1 r R22 AD l agg n 0 4 A1 r R228 "register" A14 r RD3 A12 lor 1 R9A AB r R229 "Register b=10" R24 2 W26 9 0 W1 WE W2 W1A WD W27 0 1 A1 r RBC W19 W28 0 1 A1 r RBB W25 W29 8 0 W1 W28 W27 W1A WD W2 WE W25 0 CA8 W0 8 0 W1 0 2 A1 r R0 A0 a A0 W2 0 2 A1 r RD5 A0 a A0 W3 0 2 A1 r RD6 A0 a A0 W4 10 3 A1 r RC0 A19 a A19 A0 a A0 W5 0 0 W6 0 0 W7 0 0 W8 0 0 W9 0 0 WA 0 0 WB 0 0 WC 0 0 WD 0 0 WE 0 0 WF 0 2 A1 r RD7 A0 a A0 W10 10 3 A1 r RD8 A19 a A19 A0 a A0 W11 0 0 W12 0 0 W13 0 0 W14 0 0 W15 0 0 W16 0 0 W17 0 0 W18 0 0 W19 0 0 W1A 0 0 W1B 10 3 A1 r RD9 A19 a A19 A0 a A0 W1C 0 0 W1D 0 0 W1E 0 0 W1F 0 0 W20 0 0 W21 0 0 W22 0 0 W23 0 0 W24 0 0 W25 0 0 W26 0 2 A1 r R22 A0 a A0 1 A1 r R22A "SeqffEn" R8C C2D 10 3 3 5 6 0 W2A 5 0 W1 W27 W28 W19 W25 0 CA9 W0 5 0 W1 0 2 A1 r R0 AD l agg n 0 W2 0 2 A1 r R48 AD l agg d 0 W3 0 2 A1 r RA8 AD l agg d 0 W4 0 2 A1 r RA9 AD l agg n 0 W5 0 2 A1 r R22 AD l agg n 0 4 A1 r R22B "symDriver" A14 r RAB A12 lor 1 R9A AB r R22C "SymDriver d=10" R24 2 W6 5 0 W1 W2 W4 W3 W5 W7 4 0 W1 W2 W3 W5 0 C50 W8 4 0 W1 W4 W2 W5 0 C57