DIRECTORY DABasics, RefTab, Rope, SunRPC, SunRPCAuth; SoftHdwBasics: CEDAR DEFINITIONS = BEGIN ArrayPositions: TYPE = LIST OF ArrayPosition; ArrayPosition: TYPE = REF ArrayPositionRec; ArrayPositionRec: TYPE = RECORD [ type: NodeType _ OToP, orientation: Orientation _ Vertical, chip: Position _ [0, 0], minorArray: Position _ [0, 0], grain: Position _ [0, 0]]; NodeType: TYPE = {OToP, RUToP, LDToP, LToP, PToI, PToRU, PToLD, PToL, ORUToI, LDToLD, OLDToI, ORUToL, Tristate, RUToRU, ORUToLD, LDToI, OLDToRU, LToI, RUToI, Inverter, FlipFlop, ParallelInput, InputEnabled, RAMEven, RAMOdd, Master, Input, Interchip, Long, Output, LeftDown, RightUp}; nodeNames: ARRAY NodeType OF Rope.ROPE; Orientation: TYPE = {Vertical, Horizontal}; orientationNames: ARRAY Orientation OF Rope.ROPE; Position: TYPE = DABasics.Position; CreateArrayPosition: PROC [type: NodeType _ OToP, orientation: Orientation _ Vertical, grain: Position, minorArray: Position _ [0, 0], chip: Position _ [0, 0]] RETURNS [position: ArrayPosition]; CopyArrayPosition: PROC [old: ArrayPosition] RETURNS [new: ArrayPosition]; CopyArrayPositionRec: PROC [old: ArrayPositionRec] RETURNS [new: ArrayPosition]; ArrayPositionToRope: PROC [position: ArrayPosition] RETURNS [rope: Rope.ROPE]; RopeToArrayPosition: PROC [rope: Rope.ROPE] RETURNS [position: ArrayPosition]; ArrayPositionEqual: RefTab.EqualProc; ArrayPositionHash: RefTab.HashProc; CreateBase: PROC [sizes: ArrayPosition, useConnectionMachine: BOOL _ FALSE] RETURNS [array: ArrayBase]; Initialize: PROC [array: ArrayBase]; Fetch: PROC [array: ArrayBase, bit: ArrayPosition, time: INT _ -1] RETURNS [value: BOOL]; Store: PROC [array: ArrayBase, bit: ArrayPosition, value: BOOL]; MasterToSlave: PROC [array: ArrayBase]; Relax: PROC [array: ArrayBase]; Sample: PROC [array: ArrayBase]; ArrayBase: TYPE = REF ArrayBaseRec; ArrayBaseRec: TYPE = RECORD [ sizes: ArrayPosition, useConnectionMachine: BOOL, state: ArrayBaseState, id: CARD, h: SunRPC.Handle, c: SunRPCAuth.Conversation]; ArrayBaseState: TYPE = REF ArrayBaseStateRec; ArrayBaseStateRec: TYPE = RECORD [ positionToEntity: RefTab.Ref, -- grains indexed by Output, minor arrays indexed by RAMEven, long lines by Long scheduledGrains: Grain _ NIL, scheduledMinorArrays: MinorArray _ NIL]; MinorArray: TYPE = REF MinorArrayRec; MinorArrayRec: TYPE = RECORD [ key: ArrayPosition _ NIL, scheduled: BOOL _ FALSE, nextMinorArray: MinorArray _ NIL, RAMEven, RAMOdd: BOOL _ FALSE, vertical: GrainSeq _ NIL, horizontal: GrainSeq _ NIL]; Grain: TYPE = REF GrainRec; GrainSeq: TYPE = REF GrainSeqRec; GrainSeqRec: TYPE = RECORD [elements: SEQUENCE size: CARDINAL OF Grain]; GrainRec: TYPE = RECORD [ key: ArrayPosition _ NIL, scheduled: BOOL _ FALSE, nextGrain: Grain _ NIL, vertical: BOOL _ FALSE, leftDownSelectLeftDown: BOOL _ FALSE, leftDown: BOOL _ FALSE, rightUpSelectRightUp: BOOL _ FALSE, rightUp: BOOL _ FALSE, inputSelect: InputSelectIndex _ none, input: BOOL _ FALSE, output: BOOL _ FALSE, leftDownGrain: Grain _ NIL, rightUpGrain: Grain _ NIL, ORUToL, Tristate: BOOL _ FALSE, longControl: LongControl _ off, longLine: LongLine _ NIL, minorArray: MinorArray _ NIL, flipFlop: BOOL _ FALSE, master: BOOL _ FALSE, invert: BOOL _ FALSE, parallelInput: BOOL _ FALSE, ORUToI, OLDToI, LDToI, LToI, RUToI: BOOL _ FALSE, LDToLD, ORUToLD: BOOL _ FALSE, RUToRU, OLDToRU: BOOL _ FALSE, perpendicularGrains: SEQUENCE size: CARDINAL OF PerpendicularGrain]; LongControl: TYPE = {off, on, old}; InputSelectIndex: TYPE = {none, oru, old, ld, l, ru}; PerpendicularGrain: TYPE = RECORD [ inputEnabled: BOOL, grain: Grain]; LongLine: TYPE = REF LongLineRec; LongLineRec: TYPE = RECORD [ key: ArrayPosition _ NIL, long: BOOL, grains: SEQUENCE size: CARDINAL OF Grain]; END. lSoftHdwBasics.mesa Copyright Σ 1988 by Xerox Corporation. All rights reserved. Barth, September 7, 1989 5:01:37 pm PDT Array Position Input, Interchip, Long, Output, LeftDown, and RightUp are not accessible through Fetch and Store in the actual hardware and they are not state bits in the hardware. Interchip and all of the edge tiles belong to the minor array or chip to the right or up. The pin tiles belong to the chip up or down, or left or right, depending on the proper low order bit of minorArray. The orientation of InputEnabled refers to the orientation of the output to which the input is connected. Interchip, Long vertical: chip, minorArray.x, grain.x horizontal: chip, minorArray.y, grain.y OToP, RUToP, LDToP, LToP, PToI, PToRU, PToLD, PToL vertical: chip, minorArray.x, low order bit of minorArray.y, grain.x horizontal: chip, low order bit of minorArray.x, minorArray.y, grain.y Input, Output, LeftDown, RightUp, ORUToI, LDToLD, OLDToI, ORUToL, Tristate, RUToRU, ORUToLD, LDToI, OLDToRU, LToI, RUToI, Inverter, FlipFlop, ParallelInput, Master vertical: chip, minorArray, grain.x horizontal: chip, minorArray, grain.y InputEnabled vertical: chip, minorArray, grain horizontal: chip, minorArray, grain RAMEven, RAMOdd chip, minorArray Invariant: Unused indicies in an ArrayPosition are zero. position must be treated as read-only since there is a cache. old is mutable, new is not new must be treated as immutable Simulation Ignores type and orientation. Uses the rest of the position to size things. Private Data Structures The following data structures are not meant to be understood or relied upon by clients. Κ˜codešœ™K™