C0 W0 67 0 W1 0 1 A0 CoreName r R0 "Vdd" W2 4 1 A0 r R1 "nERamAdd" W3 0 1 A1 RightPosition i 70 W4 0 1 A1 i 71 W5 0 1 A1 i 72 W6 0 1 A1 i 73 W7 0 2 A0 r R2 "nReadCBus" A2 LeftPosition i 0 W8 5 1 A0 r R3 "HRamRAdd" W9 0 1 A1 i 210 WA 0 1 A1 i 211 WB 0 1 A1 i 212 WC 0 1 A1 i 213 WD 0 1 A1 i 214 WE 0 2 A0 r R4 "nPChg" A3 BottomPosition i 50 WF 5 1 A0 r R5 "nHRamWAdd" W10 0 1 A1 i 200 W11 0 1 A1 i 201 W12 0 1 A1 i 202 W13 0 1 A1 i 203 W14 0 1 A1 i 204 W15 4 1 A0 r R6 "DataPtrDec" W16 0 1 A1 i 270 W17 0 1 A1 i 271 W18 0 1 A1 i 272 W19 0 1 A1 i 273 W1A 3 1 A0 r R7 "PrefBypDec" W1B 0 1 A1 i 295 W1C 0 1 A1 i 296 W1D 0 1 A1 i 297 W1E 0 2 A0 r R8 "WriteHRamHigh" A1 i 240 W1F 10 1 A0 r R9 "CAdrData" W20 0 1 A2 i 30 W21 0 1 A2 i 31 W22 0 1 A2 i 32 W23 0 1 A2 i 33 W24 0 1 A2 i 34 W25 0 1 A2 i 35 W26 0 1 A2 i 36 W27 0 1 A2 i 37 W28 0 1 A2 i 38 W29 0 1 A2 i 39 W2A 2 1 A0 r RA "ExtRamAccDec" W2B 0 1 A1 i 250 W2C 0 1 A1 i 251 W2D 0 2 A0 r RB "CRamWrEn" A1 i 120 W2E 5 1 A0 r RC "nHRamRAdd" W2F 0 1 A1 i 220 W30 0 1 A1 i 221 W31 0 1 A1 i 222 W32 0 1 A1 i 223 W33 0 1 A1 i 224 W34 0 2 A0 r RD "CAdrStb" A2 i 70 W35 4 1 A0 r RE "RowPD2" W36 0 1 A4 TopPosition i 70 W37 0 1 A4 i 71 W38 0 1 A4 i 72 W39 0 1 A4 i 73 W3A 2 1 A0 r RF "ReadCRamDec" W3B 0 1 A1 i 110 W3C 0 1 A1 i 111 W3D 4 1 A0 r R10 "SelRamWrDataDec" W3E 0 1 A1 i 10 W3F 0 1 A1 i 11 W40 0 1 A1 i 12 W41 0 1 A1 i 13 W42 4 1 A0 r R11 "CRamAdd" W43 0 1 A1 i 130 W44 0 1 A1 i 131 W45 0 1 A1 i 132 W46 0 1 A1 i 133 W47 0 3 A0 r R12 "nError" A1 i 30 A2 i 75 W48 0 2 A0 r R13 "OddClkb" A4 i 50 W49 7 1 A0 r R14 "CmdPtrDec" W4A 0 1 A1 i 280 W4B 0 1 A1 i 281 W4C 0 1 A1 i 282 W4D 0 1 A1 i 283 W4E 0 1 A1 i 284 W4F 0 1 A1 i 285 W50 0 1 A1 i 286 W51 0 2 A0 r R15 "wlLow" A4 i 20 W52 4 1 A0 r R16 "RowPD1" W53 0 1 A4 i 80 W54 0 1 A4 i 81 W55 0 1 A4 i 82 W56 0 1 A4 i 83 W57 4 1 A0 r R17 "nCRamAdd" W58 0 1 A1 i 140 W59 0 1 A1 i 141 W5A 0 1 A1 i 142 W5B 0 1 A1 i 143 W5C 3 1 A0 r R18 "FrameRstDec" W5D 0 1 A1 i 100 W5E 0 1 A1 i 101 W5F 0 1 A1 i 102 W60 0 2 A0 r R19 "CWriteStb" A2 i 50 W61 0 2 A0 r R1A "nSelEnb" A3 i 40 W62 2 1 A0 r R1B "VRamEnWriteDec" W63 0 1 A1 i 310 W64 0 1 A1 i 311 W65 4 1 A0 r R1C "ERamAdd" W66 0 1 A1 i 60 W67 0 1 A1 i 61 W68 0 1 A1 i 62 W69 0 1 A1 i 63 W6A 5 1 A0 r R1D "HRamWAdd" W6B 0 1 A1 i 190 W6C 0 1 A1 i 191 W6D 0 1 A1 i 192 W6E 0 1 A1 i 193 W6F 0 1 A1 i 194 W70 2 1 A0 r R1E "ReadVRamDec" W71 0 1 A1 i 320 W72 0 2 A1 i 321 A5 Static a A6 UnconnectedOk W73 0 2 A0 r R1F "CAddSel" A3 i 30 W74 0 2 A0 r R20 "VRamWriteEn" A4 i 0 W75 2 1 A0 r R21 "DrExtDataDec" W76 0 1 A1 i 5 W77 0 1 A1 i 6 W78 4 1 A0 r R22 "SelRamRdDataDec" W79 0 1 A1 i 20 W7A 0 1 A1 i 21 W7B 0 1 A1 i 22 W7C 0 1 A1 i 23 W7D 0 2 A0 r R23 "EvenClkb" A4 i 60 W7E 2 1 A0 r R24 "ReadERamDec" W7F 0 1 A1 i 40 W80 0 1 A1 i 41 W81 4 1 A0 r R25 "ColPDA" W82 0 1 A4 i 100 W83 0 1 A4 i 101 W84 0 1 A4 i 102 W85 0 1 A4 i 103 W86 0 2 A0 r R26 "ColPDBb" A4 i 120 W87 0 2 A0 r R27 "ERamWrEn" A1 i 50 W88 4 1 A0 r R28 "DecompDataSource" W89 0 1 A1 i 160 W8A 0 1 A1 i 161 W8B 0 1 A1 i 162 W8C 0 1 A1 i 163 W8D 0 2 A0 r R29 "nCS" A2 i 20 W8E 16 1 A0 r R2A "CycleAdd" W8F 0 1 A1 i 80 W90 0 1 A1 i 81 W91 0 1 A1 i 82 W92 0 1 A1 i 83 W93 0 1 A1 i 84 W94 0 1 A1 i 85 W95 0 1 A1 i 86 W96 0 1 A1 i 87 W97 0 1 A1 i 88 W98 0 1 A1 i 89 W99 0 1 A1 i 90 W9A 0 1 A1 i 91 W9B 0 1 A1 i 92 W9C 0 1 A1 i 93 W9D 0 1 A1 i 94 W9E 0 1 A1 i 95 W9F 4 1 A0 r R2B "CtlPtr" WA0 0 1 A1 i 150 WA1 0 1 A1 i 151 WA2 0 1 A1 i 152 WA3 0 1 A1 i 153 WA4 0 2 A0 r R2C "pullSense2Low" A4 i 30 WA5 10 1 A0 r R2D "CBus" WA6 0 1 A3 i 20 WA7 0 1 A3 i 21 WA8 0 1 A3 i 22 WA9 0 1 A3 i 23 WAA 0 1 A3 i 24 WAB 0 1 A3 i 25 WAC 0 1 A3 i 26 WAD 0 1 A3 i 27 WAE 0 1 A3 i 28 WAF 0 1 A3 i 29 WB0 4 1 A0 r R2E "RowPD0" WB1 0 1 A4 i 90 WB2 0 1 A4 i 91 WB3 0 1 A4 i 92 WB4 0 1 A4 i 93 WB5 8 1 A0 r R2F "SelPECol" WB6 0 1 A3 i 60 WB7 0 1 A3 i 61 WB8 0 1 A3 i 62 WB9 0 1 A3 i 63 WBA 0 1 A3 i 64 WBB 0 1 A3 i 65 WBC 0 1 A3 i 66 WBD 0 1 A3 i 67 WBE 0 2 A0 r R30 "WriteHRamLow" A1 i 230 WBF 10 1 A0 r R31 "nCBus" WC0 0 1 A3 i 10 WC1 0 1 A3 i 11 WC2 0 1 A3 i 12 WC3 0 1 A3 i 13 WC4 0 1 A3 i 14 WC5 0 1 A3 i 15 WC6 0 1 A3 i 16 WC7 0 1 A3 i 17 WC8 0 1 A3 i 18 WC9 0 1 A3 i 19 WCA 2 1 A0 r R32 "PrefetchDec" WCB 0 1 A1 i 290 WCC 0 1 A1 i 291 WCD 0 2 A0 r R33 "preClkb" A4 i 40 WCE 0 2 A0 r R34 "ReadCBus" A2 i 10 WCF 0 2 A0 r R35 "CycCK" A1 i 0 WD0 0 2 A0 r R36 "nCycCK" A1 i 1 WD1 0 2 A0 r R37 "ColPDB" A4 i 110 WD2 0 2 A0 r R38 "CReadStb" A2 i 60 WD3 2 1 A0 r R39 "ReadHRamDec" WD4 0 1 A1 i 170 WD5 0 1 A1 i 171 WD6 0 2 A0 r R3A "Start" A2 i 90 WD7 0 2 A0 r R3B "Loop" A2 i 80 WD8 0 2 A0 r R3C "nReset" A1 i 300 WD9 0 2 A0 r R3D "HRamWrEn" A1 i 180 WDA 0 2 A0 r R3E "ExtReset" A2 i 100 WDB 0 2 A0 r R3F "preb" A4 i 10 WDC 10 1 A0 r R40 "Cmd" WDD 0 1 A1 i 260 WDE 0 1 A1 i 261 WDF 0 1 A1 i 262 WE0 0 1 A1 i 263 WE1 0 1 A1 i 264 WE2 0 1 A1 i 265 WE3 0 1 A1 i 266 WE4 0 1 A1 i 267 WE5 0 1 A1 i 268 WE6 0 1 A1 i 269 WE7 2 1 A0 r R41 "VRamEnReadDec" WE8 0 1 A1 i 350 WE9 0 1 A1 i 351 WEA 0 1 A0 r R42 "Gnd" 4 A0 r R43 "DecompCtlLogic" A7 Layout a A8 SCRemote A9 numRows i 26 AA UsePublicPositions rb 1 R44 "Record" 8 WEB 93 0 W1 WEC 0 1 A0 r R45 "ResetMinus1" WED 0 1 A0 r R46 "WriteVRam" W15 W81 W57 WB0 W87 W42 WCD WDB W2 W8D WA4 WCE WEE 0 1 A0 r R47 "ResetPlus9" WEF 0 1 A0 r R48 "ResetPlus4" W1A WD0 W65 W61 W78 W7D W1E W2D WD9 WCA WF0 0 1 A0 r R49 "ResetPlus2" WF1 0 1 A0 r R4A "WriteHRam" WD8 WD3 W6A WF2 10 1 A0 r R4B "LoopAdd" WF3 0 0 WF4 0 0 WF5 0 0 WF6 0 0 WF7 0 0 WF8 0 0 WF9 0 0 WFA 0 0 WFB 0 0 WFC 0 0 WE7 WF W74 W9F W2A WD2 W3D WFD 10 1 A0 r R4C "VRamAdd" WFE 0 0 WFF 0 0 W100 0 0 W101 0 0 W102 0 0 W103 0 0 W104 0 0 W105 0 0 W106 0 0 W107 0 0 W108 10 1 A0 r R4D "ExtRamAdd" W109 0 0 W10A 0 0 W10B 0 0 W10C 0 0 W10D 0 0 W10E 0 0 W10F 0 0 W110 0 0 W111 0 0 W112 0 0 W5C WCF W113 6 1 A0 r R4E "Position" WE1 WE2 WE3 WE4 WE5 WE6 W1F W7E W114 0 1 A0 r R4F "ResetPlus1" W115 0 1 A0 r R50 "Reset" W34 WD6 WE W7 W70 W116 0 1 A0 r R51 "ResetPlus3" W8E W52 W86 W117 0 1 A0 r R52 "FetchCmd" W48 W118 0 1 A0 r R53 "VRamBypass" W49 WD7 W60 W119 0 1 A0 r R54 "Literal" W3A W8 W73 WBE WDC W11A 0 1 A0 r R55 "WriteERam" W11B 0 1 A0 r R56 "ExtRamAccess" W62 WBF W11C 0 1 A0 r R57 "CmdPtrMSB" W88 W47 W11D 0 1 A0 r R58 "SlowTiming" W11E 0 1 A0 r R59 "CmdStart" W35 W75 W11F 10 1 A0 r R5A "EndAdd" W120 0 0 W121 0 0 W122 0 0 W123 0 0 W124 0 0 W125 0 0 W126 0 0 W127 0 0 W128 0 0 W129 0 0 WD1 W12A 0 1 A0 r R5B "TestEnd" W51 W2E WA5 WB5 W12B 0 1 A0 r R5C "Prefetch" W12C 0 1 A0 r R5D "WriteCRam" W12D 0 1 A0 r R5E "ResetPlus5" WDA WEA W12E 19 0 W1 W86 WFD W52 W7D WD1 W74 WDB W48 W51 WD0 W81 WCF W35 WB0 W11D WCD WA4 WEA 0 C1 W0 19 0 W1 0 1 A0 r R0 W2 0 1 A0 r R26 W3 10 1 A0 r R5F "Add" W4 0 0 W5 0 0 W6 0 0 W7 0 0 W8 0 0 W9 0 0 WA 0 0 WB 0 0 WC 0 0 WD 0 0 WE 4 1 A0 r R16 WF 0 0 W10 0 0 W11 0 0 W12 0 0 W13 0 1 A0 r R23 W14 0 1 A0 r R37 W15 0 1 A0 r R60 "we" W16 0 1 A0 r R3F W17 0 1 A0 r R13 W18 0 1 A0 r R15 W19 0 1 A0 r R61 "nCK" W1A 4 1 A0 r R25 W1B 0 0 W1C 0 0 W1D 0 0 W1E 0 0 W1F 0 1 A0 r R62 "CK" W20 4 1 A0 r RE W21 0 0 W22 0 0 W23 0 0 W24 0 0 W25 4 1 A0 r R2E W26 0 0 W27 0 0 W28 0 0 W29 0 0 W2A 0 1 A0 r R58 W2B 0 1 A0 r R33 W2C 0 1 A0 r R2C W2D 0 1 A0 r R42 1 A0 r R63 "VRamIF" R44 39 W2E 47 0 W1 W2F 0 0 W30 0 0 W1F W31 4 0 W32 0 0 W33 0 0 W34 0 0 W35 0 0 W18 W2C W36 0 0 W16 W37 0 0 W38 0 0 W19 W1A W39 0 0 W3A 0 0 W17 W2A W3B 4 0 W3C 0 0 W3D 0 0 W3E 0 0 W3F 0 0 W40 0 0 W14 WE W41 0 0 W25 W2 W42 0 0 W43 0 1 A0 r R64 "wlLowb" W44 2 0 W7 W8 W45 0 0 W46 0 0 W13 W47 2 0 WB WC W48 0 0 W3 W49 0 0 W2B W20 W4A 0 0 W4B 0 0 W4C 0 0 W4D 0 1 A0 r R65 "ioClk" W4E 0 0 W4F 0 0 W50 4 0 W51 0 0 W52 0 0 W53 0 0 W54 0 0 W15 W55 2 0 W9 WA W56 0 0 W2D W57 4 0 W1 W4 W2 W2D 0 C2 W0 4 0 W1 0 3 A0 r R66 "Vdd" AB RoseFixedWire H AC PortData l agg n 0 W2 0 3 A0 r R67 "I" AD PortTesterDrive b agg f 0 AC l agg n 0 W3 0 4 A0 r R68 "X" AD b agg e 0 AC l agg d 0 AE Output r R69 "~I" W4 0 3 A0 r R6A "Gnd" AB L AC l agg n 0 9 AF LichenTransistorTolerances r R6B "0.8, 0.8" A0 r R6C "invBuffer" A10 CoreCutLabel lor 2 R6D "LogicMacro" R6E "Logic" A11 CellArea i 159744 A7 a A12 GetLibrary A13 RoseBehave r R6F "Combinatorial" A14 Combinatorial rb 1 A15 Library r R70 "SCLibCMOSBMask" A16 LogForStats r R71 "InvB" R44 2 W5 4 0 W1 W3 W2 W4 W6 4 0 W2 W1 W3 W1 0 C3 W0 4 0 W1 0 1 A0 r R72 "gate" W2 0 1 A0 r R73 "ch1" W3 0 1 A0 r R74 "ch2" W4 0 1 A0 r R66 2 A17 CoreTransistorWidth i 100 A18 CoreTransistorLength i 2 R75 "Transistor" pE W7 3 0 W2 W3 W4 0 C4 W0 3 0 W1 0 1 A0 r R72 W2 0 1 A0 r R73 W3 0 1 A0 r R74 2 A17 i 48 A18 i 2 R75 nE W58 4 0 W1 W39 W1E W2D 0 C2 W59 4 0 W1 W40 W14 W2D 0 C2 W5A 4 0 W1 W36 W1D W2D 0 C2 W5B 6 0 W1 W5 W6 W4D W39 W2D 0 C5 W0 6 0 W1 0 1 A0 r R0 W2 0 1 A0 r R76 "A" W3 0 1 A0 r R77 "B" W4 0 1 A0 r R62 W5 0 1 A0 r R78 "X" W6 0 1 A0 r R42 2 A0 r R79 "PCNand2" A7 a A19 Get R44 4 W7 8 0 W1 W8 0 0 W2 W9 0 0 W3 W4 W5 W6 WA 4 0 W4 W1 W5 W1 0 C6 W0 4 0 W1 0 1 A0 r R7A "gate" W2 0 1 A0 r R7B "ch1" W3 0 1 A0 r R7C "ch2" W4 0 1 A0 r R7D "Vdd" 2 A18 i 2 A17 i 16 R75 pE WB 3 0 W3 W5 W9 0 C7 W0 3 0 W1 0 1 A0 r R7A W2 0 1 A0 r R7B W3 0 1 A0 r R7C 2 A18 i 2 A17 i 24 R75 nE WC 3 0 W2 W9 W8 0 C7 WD 3 0 W4 W8 W6 0 C7 W5C 4 0 W1 W4 W40 W2D 0 C8 W0 4 0 W1 0 3 A0 r R66 AB H AC l agg n 0 W2 0 3 A0 r R67 AD b agg f 0 AC l agg n 0 W3 0 4 A0 r R68 AD b agg e 0 AC l agg d 0 AE r R69 W4 0 3 A0 r R6A AB L AC l agg n 0 9 AF r R6B A0 r R7E "inv" A10 lor 2 R6D R6E A11 i 106496 A7 a A12 A13 r R6F A14 rb 1 A15 r R70 A16 r R7F "Inv" R44 2 W5 4 0 W1 W2 W3 W4 W6 4 0 W2 W3 W1 W1 0 C9 W0 4 0 W1 0 2 A0 r R72 A1A GivenName a A1A W2 0 2 A0 r R74 A1A a A1A W3 0 2 A0 r R73 A1A a A1A W4 0 2 A0 r R66 A1A a A1A 1 A0 r R80 "p50" R44 1 W5 4 0 W1 W2 W3 W4 W6 4 0 W1 W3 W2 W4 0 CA W0 4 0 W1 0 1 A0 r R72 W2 0 1 A0 r R73 W3 0 1 A0 r R74 W4 0 1 A0 r R66 2 A17 i 50 A18 i 2 R75 pE W7 3 0 W4 W2 W3 0 CB W0 3 0 W1 0 2 A0 r R74 A1A a A1A W2 0 2 A0 r R72 A1A a A1A W3 0 2 A0 r R73 A1A a A1A 1 A0 r R81 "n24" R44 1 W4 3 0 W3 W2 W1 W5 3 0 W2 W3 W1 0 CC W0 3 0 W1 0 1 A0 r R72 W2 0 1 A0 r R73 W3 0 1 A0 r R74 2 A17 i 24 A18 i 2 R75 nE W5D 4 0 W1 W42 W1C W2D 0 C2 W5E 6 0 W1 W5 W4F W4D W36 W2D 0 C5 W5F 4 0 W1 W56 W1B W2D 0 C2 W60 6 0 W1 W4A W6 W4D W42 W2D 0 C5 W61 6 0 W1 W4A W4F W4D W56 W2D 0 C5 W62 4 0 W1 W5 W4A W2D 0 C8 W63 4 0 W1 W25 W50 W2D 0 CD W0 4 0 W1 0 2 A0 r R0 A1A a A1A W2 4 3 A0 r R82 "X" A1B Sequence a A1B A1A a A1A W3 0 0 W4 0 0 W5 0 0 W6 0 0 W7 4 3 A0 r R83 "I" A1B a A1B A1A a A1A W8 0 0 W9 0 0 WA 0 0 WB 0 0 WC 0 2 A0 r R42 A1A a A1A 1 A0 r R84 "" R85 "Sequence" CE W0 4 0 W1 0 3 A1A a A1A A0 r R0 AC l agg n 0 W2 0 2 A0 r R82 AC l agg d 0 W3 0 2 A0 r R83 AC l agg n 0 W4 0 3 A1A a A1A A0 r R42 AC l agg n 0 4 A0 r R86 "invDriver8" A16 r R87 "InvDriver d=8" A10 lor 4 R88 "LogicMacro" R88 R88 R88 A13 r R89 "LogicInv" R44 1 W5 4 0 W1 W2 W3 W4 W6 4 0 W1 W3 W2 W4 0 C2 4 2 1 2 0 W64 4 0 W1 W6 W4F W2D 0 C8 W65 4 0 W1 WE W3B W2D 0 CD W66 4 0 W1 W2D W44 W50 0 CF W0 4 0 W1 0 2 A0 r R8A "Vdd" AC l agg n 0 W2 0 2 A0 r R8B "Gnd" AC l agg n 0 W3 2 2 A0 r R8C "Address" AC ls agg n 0 W4 0 0 W5 0 0 W6 4 2 A0 r R8D "Select" AC ls agg d 0 W7 0 0 W8 0 0 W9 0 0 WA 0 0 4 A0 r R8E "DecoderS" A13 r R8F "LogicDecoderS" A10 lor 1 R88 A16 r R90 "DecoderS a=2 s=4" R44 2 WB 6 0 W1 W2 W3 W6 WC 2 1 A0 r R91 "nAd" WD 0 0 WE 0 0 WF 2 1 A0 r R92 "nnAd" W10 0 0 W11 0 0 W12 5 0 W1 W2 WC WF W6 0 C10 W0 5 0 W1 0 1 A0 r R93 "Vdd" W2 0 1 A0 r R94 "Gnd" W3 2 1 A0 r R91 W4 0 0 W5 0 0 W6 2 1 A0 r R92 W7 0 0 W8 0 0 W9 4 1 A0 r R8D WA 0 0 WB 0 0 WC 0 0 WD 0 0 1 A0 r R95 "DecoderSBody" R44 4 WE 9 0 W1 W2 W3 W6 W9 WF 2 0 W4 W5 W10 2 0 W4 W8 W11 2 0 W7 W5 W12 2 0 W7 W8 W13 4 0 W1 W2 WF WD 0 C11 W0 4 0 W1 0 1 A0 r R96 "Vdd" W2 0 1 A0 r R97 "Gnd" W3 2 1 A0 r R98 "I" W4 0 0 W5 0 0 W6 0 1 A0 r R99 "X" 2 A0 r R9A "Nor2" A16 r R9B "Nor n=2" R44 1 W0 W7 5 0 W1 W5 W6 W4 W2 0 C12 W0 5 0 W1 0 3 A0 r R66 AB H AC l agg n 0 W2 0 3 A0 r R9C "I-B" AD b agg f 0 AC l agg n 0 W3 0 4 A0 r R68 AD b agg e 0 AC l agg d 0 AE r R9D "~(I-A + I-B)" W4 0 3 A0 r R9E "I-A" AD b agg f 0 AC l agg n 0 W5 0 3 A0 r R6A AB L AC l agg n 0 8 AF r R6B A10 lor 2 R6D R6E A11 i 159744 A7 a A12 A13 r R6F A14 rb 1 A0 r R9F "nor2" A15 r R70 R44 4 W6 6 0 W1 W3 W4 W2 W7 0 0 W5 W8 4 0 W4 W7 W1 W1 0 C9 W9 3 0 W5 W2 W3 0 CB WA 4 0 W2 W3 W7 W1 0 C9 WB 3 0 W5 W4 W3 0 CB W14 4 0 W1 W2 W10 WC 0 C11 W15 4 0 W1 W2 W11 WB 0 C11 W16 4 0 W1 W2 W12 WA 0 C11 W13 5 0 W1 WF W3 WC W2 0 C13 W0 5 0 W1 0 1 A0 r R0 W2 2 1 A0 r R82 W3 0 0 W4 0 0 W5 2 1 A0 r R83 W6 0 0 W7 0 0 W8 2 1 A0 r RA0 "nX" W9 0 0 WA 0 0 WB 0 1 A0 r R42 0 R85 C14 W0 5 0 W1 0 2 A0 r R0 AC l agg n 0 W2 0 2 A0 r R82 AC l agg d 0 W3 0 2 A0 r R83 AC l agg n 0 W4 0 2 A0 r RA0 AC l agg d 0 W5 0 2 A0 r R42 AC l agg n 0 4 A0 r RA1 "symDriver3" A16 r RA2 "SymDriver d=3" A10 lor 2 R88 R88 A13 r RA3 "LogicSymDriver" R44 2 W6 5 0 W1 W3 W4 W2 W5 W7 4 0 W1 W4 W2 W5 0 C8 W8 4 0 W1 W3 W4 W5 0 C8 2 3 2 3 1 -1 W67 4 0 W1 W20 W31 W2D 0 CD W68 4 0 W1 W2D W55 W3B 0 CF W69 4 0 W1 W4D W37 W2D 0 CE W6A 4 0 W1 W2D W47 W31 0 CF W6B 6 0 W1 W16 WD W19 W13 W2D 0 C15 W0 6 0 W1 0 2 A0 r R0 A1A a A1A W2 0 2 A0 r R77 A1A a A1A W3 0 2 A0 r R76 A1A a A1A W4 0 2 A0 r R62 A1A a A1A W5 0 2 A0 r R78 A1A a A1A W6 0 2 A0 r R42 A1A a A1A 1 A0 r R84 R85 C16 W0 6 0 W1 0 1 A0 r R0 W2 0 1 A0 r R77 W3 0 1 A0 r R76 W4 0 1 A0 r R62 W5 0 1 A0 r R78 W6 0 1 A0 r R42 2 A0 r RA4 "PCNand2" A7 a A19 R44 4 W7 8 0 W1 W2 W3 W8 0 0 W4 W5 W9 0 0 W6 WA 4 0 W4 W1 W5 W1 0 C17 W0 4 0 W1 0 1 A0 r R7A W2 0 1 A0 r R7B W3 0 1 A0 r R7C W4 0 1 A0 r R7D 2 A18 i 2 A17 i 16 R75 pE WB 3 0 W2 W5 W9 0 C18 W0 3 0 W1 0 1 A0 r R7A W2 0 1 A0 r R7B W3 0 1 A0 r R7C 2 A18 i 2 A17 i 24 R75 nE WC 3 0 W3 W9 W8 0 C18 WD 3 0 W4 W8 W6 0 C18 9 0 0 W6C 6 0 W1 W16 W49 W19 W17 W2D 0 C15 W6D 4 0 W1 WD W49 W2D 0 C8 W6E 4 0 W1 W48 W4C W2D 0 C8 W6F 8 0 W1 W16 W37 W43 W4C W19 W15 W2D 0 C19 W0 8 0 W1 0 1 A0 r R0 W2 0 1 A0 r RA5 "a" W3 0 1 A0 r RA6 "x" W4 0 1 A0 r RA7 "c" W5 0 1 A0 r RA8 "d" W6 0 1 A0 r R61 W7 0 1 A0 r RA9 "b" W8 0 1 A0 r R42 2 A0 r RAA "IOClkBuf" A7 a A19 R44 6 W9 11 0 W1 WA 0 0 W3 W2 WB 0 0 W4 WC 0 0 W5 W6 W7 W8 WD 4 0 W6 W1 WC W1 0 C1A W0 4 0 W1 0 1 A0 r R7A W2 0 1 A0 r R7B W3 0 1 A0 r R7C W4 0 1 A0 r R7D 2 A18 i 2 A17 i 40 R75 pE WE 4 0 W4 WC W3 W1 0 C1A WF 3 0 W7 W3 WA 0 C1B W0 3 0 W1 0 1 A0 r R7A W2 0 1 A0 r R7B W3 0 1 A0 r R7C 2 A18 i 2 A17 i 24 R75 nE W10 3 0 W5 W3 W8 0 C1B W11 3 0 W2 WA WB 0 C1B W12 3 0 W6 WB W8 0 C1B W70 4 0 W1 W46 W48 W2D 0 C8 W71 4 0 W1 W4B W2C W2D 0 C1C W0 4 0 W1 0 2 A0 r R0 AC l agg n 0 W2 0 2 A0 r R83 AC l agg n 0 W3 0 2 A0 r R82 AC l agg d 0 W4 0 2 A0 r R42 AC l agg n 0 4 A0 r RAB "invDriver" A13 r R89 A10 lor 1 R88 A16 r RAC "InvDriver d=20" R44 2 W5 5 0 W1 W6 0 0 W3 W2 W4 W7 4 0 W1 W3 W6 W4 0 C1D W0 4 0 W1 0 2 A0 r R0 AC l agg n 0 W2 0 2 A0 r R82 AC l agg d 0 W3 0 2 A0 r R83 AC l agg n 0 W4 0 2 A0 r R42 AC l agg n 0 4 A0 r RAD "driver" A16 r RAE "Driver d=18" A10 lor 2 R88 R88 A13 r RAF "LogicDriver" R44 2 W5 5 0 W1 W2 W3 W6 0 0 W4 W7 4 0 W1 W6 W2 W4 0 C1E W0 4 0 W1 0 2 A0 r R66 AC l agg n 0 W2 0 2 A0 r R67 AC l agg n 0 W3 0 2 A0 r R68 AC l agg d 0 W4 0 2 A0 r R6A AC l agg n 0 4 A0 r RB0 "Buffer" A13 r R89 A10 lor 1 RB1 "Logic" A16 r RB2 "Buffer d=5" R85 C2 3 -1 -1 W8 4 0 W1 W3 W6 W4 0 C1F W0 4 0 W1 0 2 A0 r R66 AC l agg n 0 W2 0 2 A0 r R67 AC l agg n 0 W3 0 2 A0 r R68 AC l agg d 0 W4 0 2 A0 r R6A AC l agg n 0 4 A0 r RB0 A13 r R89 A10 lor 1 RB1 A16 r RB3 "Buffer d=2" R85 C2 1 -1 -1 W8 4 0 W1 W2 W6 W4 0 C8 W72 5 0 W1 W18 W1F W46 W2D 0 C20 W0 5 0 W1 0 2 A1A a A1A A0 r R0 W2 0 1 A0 r RB4 "I-A" W3 0 1 A0 r RB5 "I-B" W4 0 1 A0 r R82 W5 0 2 A1A a A1A A0 r R42 1 A0 r RB6 "nor2" R44 1 W6 4 0 W1 W7 2 2 A0 r R98 A1A a A1A W2 W3 W4 W5 W8 4 0 W1 W5 W7 W4 0 C11 W73 6 0 W1 W4E W2A W45 W4B W2D 0 C21 W0 6 0 W1 0 2 A0 r R66 AC l agg n 0 W2 0 2 A0 r R67 AC l agg n 0 W3 0 2 A0 r RB7 "NEN" AC l agg n 0 W4 0 2 A0 r RB8 "EN" AC l agg n 0 W5 0 2 A0 r R68 AC l agg n 0 W6 0 2 A0 r R6A AC l agg n 0 8 AF r R6B A0 r RB9 "tstDriver" A11 i 212992 A7 a A12 A15 r R70 A13 r RBA "LogicTstDriver" A10 lor 1 RB1 A16 r RBB "TstDriver" R44 4 W7 8 0 W1 W2 W3 W4 W8 0 3 A1A a A1A A1C RoseWireData L cw 0 A0 r R74 W9 0 3 A1A a A1A A1C L cw 0 A0 r R73 W5 W6 WA 4 0 W3 W8 W5 W1 0 C9 WB 3 0 W5 W4 W9 0 CB WC 4 0 W2 W1 W8 W1 0 C3 WD 3 0 W2 W9 W6 0 C4 W74 5 0 W1 W2B W18 W1F W2D 0 C22 W0 5 0 W1 0 1 A0 r R0 W2 0 1 A0 r R78 W3 0 1 A0 r R76 W4 0 1 A0 r R62 W5 0 1 A0 r R42 2 A0 r RBC "PCInvCK" A7 a A19 R44 3 W6 6 0 W1 W4 W3 W2 W7 0 0 W5 W8 4 0 W4 W1 W2 W1 0 C23 W0 4 0 W1 0 1 A0 r R7A W2 0 1 A0 r R7B W3 0 1 A0 r R7C W4 0 1 A0 r R7D 2 A18 i 2 A17 i 300 R75 pE W9 3 0 W3 W2 W7 0 C24 W0 3 0 W1 0 1 A0 r R7A W2 0 1 A0 r R7B W3 0 1 A0 r R7C 2 A18 i 2 A17 i 300 R75 nE WA 3 0 W4 W7 W5 0 C24 W75 6 0 W1 W41 W45 W2A W4B W2D 0 C21 W76 4 0 W1 W38 W4E W2D 0 C8 W77 4 0 W1 W3A W41 W2D 0 C8 W78 4 0 W1 W43 W38 W2D 0 C8 W79 4 0 W1 W30 W3A W2D 0 C8 W7A 4 0 W1 W18 W43 W2D 0 C8 W7B 4 0 W1 W2F W30 W2D 0 C8 W7C 4 0 W1 W2A W45 W2D 0 C8 W7D 4 0 W1 W4E W2F W2D 0 C8 W12F 18 0 W1 WEC WFD WD7 W12A W11F WED W12B WE7 W62 WCF W71 W115 WDA WF2 W108 W74 WEA 0 C25 W0 18 0 W1 0 1 A0 r R0 W2 0 1 A0 r R45 W3 10 1 A0 r R4C W4 0 0 W5 0 0 W6 0 0 W7 0 0 W8 0 0 W9 0 0 WA 0 0 WB 0 0 WC 0 0 WD 0 0 WE 0 1 A0 r R3B WF 0 1 A0 r R5B W10 10 1 A0 r R5A W11 0 0 W12 0 0 W13 0 0 W14 0 0 W15 0 0 W16 0 0 W17 0 0 W18 0 0 W19 0 0 W1A 0 0 W1B 0 1 A0 r R46 W1C 0 1 A0 r R5C W1D 2 1 A0 r R41 W1E 0 0 W1F 0 0 W20 2 1 A0 r R1B W21 0 0 W22 0 0 W23 0 1 A0 r R35 W24 0 1 A0 r RBD "ReadVRam" W25 0 1 A0 r R50 W26 0 1 A0 r R3E W27 10 1 A0 r R4B W28 0 0 W29 0 0 W2A 0 0 W2B 0 0 W2C 0 0 W2D 0 0 W2E 0 0 W2F 0 0 W30 0 0 W31 0 0 W32 10 1 A0 r R4D W33 0 0 W34 0 0 W35 0 0 W36 0 0 W37 0 0 W38 0 0 W39 0 0 W3A 0 0 W3B 0 0 W3C 0 0 W3D 0 1 A0 r R20 W3E 0 1 A0 r R42 1 A0 r RBE "VRamAddGen" R44 17 W3F 35 0 W1 W10 W24 W26 W1C W40 0 0 W41 0 0 W1D W42 0 0 W43 0 0 WE W3 W44 0 0 W45 0 0 W46 10 3 A0 r RBF "nOutput" A5 a A6 A1A a A1A W47 0 0 W48 0 0 W49 0 0 W4A 0 0 W4B 0 0 W4C 0 0 W4D 0 0 W4E 0 0 W4F 0 0 W50 0 0 WF W51 0 3 A0 r RC0 "Cout" A5 a A6 A1A a A1A W52 0 1 A0 r RC1 "VRamSel" W27 W1B W53 0 0 W2 W54 10 0 W55 0 0 W56 0 0 W57 0 0 W58 0 0 W59 0 0 W5A 0 0 W5B 0 0 W5C 0 0 W5D 0 0 W5E 0 0 W32 W5F 0 0 W60 0 3 A0 r RC2 "NQ" A5 a A6 A1A a A1A W61 0 0 W62 0 0 W23 W63 10 0 W64 0 0 W65 0 0 W66 0 0 W67 0 0 W68 0 0 W69 0 0 W6A 0 0 W6B 0 0 W6C 0 0 W6D 0 0 W25 W3D W20 W6E 10 0 W6F 0 0 W70 0 0 W71 0 0 W72 0 0 W73 0 0 W74 0 0 W75 0 0 W76 0 0 W77 0 0 W78 0 0 W3E W79 5 0 W1 W1E W1F W44 W3E 0 C26 W0 5 0 W1 0 2 A0 r R0 AC l agg n 0 W2 0 2 A0 r R82 AC l agg d 0 W3 0 2 A0 r RA0 AC l agg d 0 W4 0 2 A0 r R83 AC l agg n 0 W5 0 2 A0 r R42 AC l agg n 0 4 A0 r RC3 "symDriver6" A16 r RC4 "SymDriver d=4" A10 lor 3 R88 R88 R88 A13 r RA3 R44 2 W6 5 0 W1 W4 W3 W2 W5 W7 4 0 W1 W3 W2 W5 0 C2 W8 4 0 W1 W4 W3 W5 0 C2 W7A 5 0 W1 W53 W21 W22 W3E 0 C27 W0 5 0 W1 0 2 A0 r R0 AC l agg n 0 W2 0 2 A0 r R83 AC l agg n 0 W3 0 2 A0 r R82 AC l agg d 0 W4 0 2 A0 r RA0 AC l agg d 0 W5 0 2 A0 r R42 AC l agg n 0 4 A0 r RC5 "symDriver" A13 r RA3 A10 lor 1 R88 A16 r RC6 "SymDriver d=18" R44 2 W6 5 0 W1 W2 W3 W4 W5 W7 4 0 W1 W3 W4 W5 0 C1E W8 4 0 W1 W2 W3 W5 0 C28 W0 4 0 W1 0 2 A0 r R0 AC l agg n 0 W2 0 2 A0 r R83 AC l agg n 0 W3 0 2 A0 r R82 AC l agg d 0 W4 0 2 A0 r R42 AC l agg n 0 4 A0 r RC7 "driver" A16 r RC8 "Driver d=24" A10 lor 2 R88 R88 A13 r RAF R44 2 W5 5 0 W1 W6 0 0 W3 W2 W4 W7 4 0 W1 W6 W3 W4 0 C29 W0 4 0 W1 0 2 A0 r R66 AC l agg n 0 W2 0 2 A0 r R67 AC l agg n 0 W3 0 2 A0 r R68 AC l agg d 0 W4 0 2 A0 r R6A AC l agg n 0 4 A0 r RB0 A13 r R89 A10 lor 1 RB1 A16 r RC9 "Buffer d=6" R85 C2 3 -1 -1 W8 4 0 W1 W2 W6 W4 0 C1F W7B 4 0 W1 W3D W53 W3E 0 C1D W7C 5 0 W1 W5F W54 W27 W3E 0 C2A W0 5 0 W1 0 2 A0 r R0 A1A a A1A W2 0 2 A0 r RB5 A1A a A1A W3 10 3 A0 r R82 A1B a A1B A1A a A1A W4 0 0 W5 0 0 W6 0 0 W7 0 0 W8 0 0 W9 0 0 WA 0 0 WB 0 0 WC 0 0 WD 0 0 WE 10 3 A0 r RB4 A1B a A1B A1A a A1A WF 0 0 W10 0 0 W11 0 0 W12 0 0 W13 0 0 W14 0 0 W15 0 0 W16 0 0 W17 0 0 W18 0 0 W19 0 2 A0 r R42 A1A a A1A 1 A0 r R84 R85 C2B W0 5 0 W1 0 2 A1A a A1A A0 r R0 W2 0 1 A0 r RB5 W3 0 1 A0 r R82 W4 0 1 A0 r RB4 W5 0 2 A1A a A1A A0 r R42 1 A0 r RCA "and2" R44 1 W6 4 0 W1 W7 2 2 A0 r R98 A1A a A1A W4 W2 W3 W5 W8 4 0 W1 W5 W7 W3 0 C2C W0 4 0 W1 0 1 A0 r RCB "Vdd" W2 0 1 A0 r RCC "Gnd" W3 2 1 A0 r R98 W4 0 0 W5 0 0 W6 0 1 A0 r RCD "X" 2 A0 r RCE "And2" A16 r RCF "And n=2" R44 1 W0 W7 5 0 W1 W6 W5 W4 W2 0 C2D W0 5 0 W1 0 3 A0 r R66 AB H AC l agg n 0 W2 0 4 A0 r R68 AD b agg e 0 AC l agg d 0 AE r RD0 "I-A * I-B" W3 0 3 A0 r R9C AD b agg f 0 AC l agg n 0 W4 0 3 A0 r R9E AD b agg f 0 AC l agg n 0 W5 0 3 A0 r R6A AB L AC l agg n 0 8 AF r R6B A10 lor 2 R6D R6E A11 i 212992 A7 a A12 A13 r R6F A14 rb 1 A0 r RD1 "and2" A15 r R70 R44 5 W6 7 0 W1 W7 0 0 W3 W2 W4 W8 0 0 W5 W9 4 0 W1 W7 W2 W5 0 C2E W0 4 0 W1 0 1 A0 r R66 W2 0 1 A0 r R67 W3 0 1 A0 r R68 W4 0 1 A0 r R6A 1 A0 r RD2 "inv24" R44 2 W5 4 0 W1 W3 W2 W4 W6 4 0 W2 W3 W1 W1 0 C9 W7 3 0 W4 W2 W3 0 CB WA 4 0 W3 W7 W1 W1 0 C9 WB 4 0 W4 W7 W1 W1 0 C9 WC 3 0 W8 W3 W7 0 CB WD 3 0 W5 W4 W8 0 CB 10 2 2 3 0 W7D 4 0 W1 W3 W6E W3E 0 C2F W0 4 0 W1 0 2 A0 r R0 A1A a A1A W2 10 3 A0 r R82 A1B a A1B A1A a A1A W3 0 0 W4 0 0 W5 0 0 W6 0 0 W7 0 0 W8 0 0 W9 0 0 WA 0 0 WB 0 0 WC 0 0 WD 10 3 A0 r R83 A1B a A1B A1A a A1A WE 0 0 WF 0 0 W10 0 0 W11 0 0 W12 0 0 W13 0 0 W14 0 0 W15 0 0 W16 0 0 W17 0 0 W18 0 2 A0 r R42 A1A a A1A 1 A0 r R84 R85 C30 W0 4 0 W1 0 3 A1A a A1A A0 r R0 AC l agg n 0 W2 0 2 A0 r R82 AC l agg d 0 W3 0 2 A0 r R83 AC l agg n 0 W4 0 3 A1A a A1A A0 r R42 AC l agg n 0 4 A0 r RD3 "invDriver4" A13 r R89 A10 lor 1 R88 A16 r RD4 "InvDriver d=4" R44 1 W5 4 0 W1 W2 W3 W4 W6 4 0 W1 W3 W2 W4 0 C8 10 2 1 2 0 W7E 9 0 W24 W1B W26 W23 W1 W3E W44 W53 W52 0 C31 W0 9 0 W1 0 1 A0 r RD5 "ReadVRam" W2 0 1 A0 r RD6 "WriteVRam" W3 0 1 A0 r RD7 "Reset" W4 0 1 A0 r RD8 "Clock" W5 0 1 A0 r RD9 "Vdd" W6 0 1 A0 r RDA "Gnd" W7 0 1 A0 r RDB "VRamEnRead" W8 0 1 A0 r RDC "VRamEnWrite" W9 0 1 A0 r RDD "VRamSel" 1 A0 r RDE "VRamAccessFSMXlate" R44 1 WA 9 0 W9 W8 W7 W6 W5 W4 W3 W2 W1 WB 9 0 W4 W6 W1 W3 W7 W8 W9 W5 W2 0 C32 W0 9 0 W1 0 1 A0 r RD8 W2 0 1 A0 r RDA W3 0 1 A0 r RDF "ReadVRam" W4 0 1 A0 r RE0 "Reset" W5 0 1 A0 r RE1 "VRamEnRead" W6 0 1 A0 r RE2 "VRamEnWrite" W7 0 1 A0 r RE3 "VRamSel" W8 0 1 A0 r RD9 W9 0 1 A0 r RE4 "WriteVRam" 1 A0 r RE5 "VRamAccessFSM" R44 2 WA 20 0 W1 W2 W3 W4 W5 W6 W7 W8 W9 WB 0 1 A0 r RE6 "NxtVRamEnRead" WC 0 1 A0 r RE7 "NxtVRamEnWrite" WD 0 1 A0 r RE8 "NxtVRamSel" WE 0 1 A0 r RE9 "NxtXtra0" WF 0 1 A0 r REA "NxtXtra1" W10 0 1 A0 r REB "Xtra0" W11 0 1 A0 r REC "Xtra1" W12 5 0 WD WC WB WE WF W13 5 0 W7 W6 W5 W10 W11 W14 8 0 W11 W3 W4 W10 W9 W5 W6 W7 W15 5 0 WD WC WB WE WF W16 5 0 W12 W13 W1 W8 W2 0 C33 W0 5 0 W1 5 1 A0 r RED "in" W2 0 1 A0 r REE "NxtVRamSel" W3 0 1 A0 r REF "NxtVRamEnWrite" W4 0 1 A0 r RF0 "NxtVRamEnRead" W5 0 1 A0 r RF1 "NxtXtra0" W6 0 1 A0 r RF2 "NxtXtra1" W7 5 1 A0 r RF3 "out" W8 0 1 A0 r RF4 "VRamSel" W9 0 1 A0 r RF5 "VRamEnWrite" WA 0 1 A0 r RF6 "VRamEnRead" WB 0 1 A0 r RF7 "Xtra0" WC 0 1 A0 r RF8 "Xtra1" WD 0 1 A0 r RD8 WE 0 1 A0 r RD9 WF 0 1 A0 r RDA 1 A0 r RF9 "VRamAccessFSMReg" R44 5 W10 10 0 W1 W7 WD WE WF W11 0 1 A5 a A6 W12 0 1 A5 a A6 W13 0 1 A5 a A6 W14 0 1 A5 a A6 W15 0 1 A5 a A6 W16 6 0 WE W2 WD W8 W11 WF 0 C34 W0 6 0 W1 0 2 A0 r R66 AC l agg n 0 W2 0 2 A0 r RFA "D" AC l agg n 0 W3 0 2 A0 r RFB "CK" AC l agg n 0 W4 0 2 A0 r RFC "Q" AC l agg d 0 W5 0 2 A0 r RC2 AC l agg d 0 W6 0 2 A0 r R6A AC l agg n 0 8 AF r R6B A0 r RFD "ff" A11 i 532480 A7 a A12 A15 r R70 A13 r RFE "LogicFlipFlop" A10 lor 1 RB1 A16 r RFF "FlipFlop" R44 24 W7 16 0 W1 W8 0 0 W9 0 0 W4 WA 0 0 WB 0 1 A0 r R100 "slave" WC 0 0 WD 0 0 WE 0 1 A0 r R101 "C" WF 0 1 A0 r R102 "nC" W5 W2 W10 0 0 W11 0 1 A0 r R103 "master" W3 W6 W12 4 0 W5 W4 W1 W1 0 C9 W13 3 0 W6 W5 W4 0 CB W14 4 0 WB W5 W1 W1 0 C9 W15 3 0 W6 WB W5 0 CB W16 4 0 WC W1 WB W1 0 C35 W0 4 0 W1 0 1 A0 r R72 W2 0 1 A0 r R73 W3 0 1 A0 r R74 W4 0 1 A0 r R66 3 A1D RoseTransistorSize dw A17 i 3 A18 i 4 R75 pE W17 4 0 WF WA WB W1 0 C9 W18 4 0 WF W1 WE W1 0 C36 W0 4 0 W1 0 1 A0 r R72 W2 0 1 A0 r R73 W3 0 1 A0 r R74 W4 0 1 A0 r R66 2 A17 i 16 A18 i 2 R75 pE W19 3 0 WC WB W6 0 C37 W0 3 0 W1 0 1 A0 r R72 W2 0 1 A0 r R73 W3 0 1 A0 r R74 3 A1D dw A17 i 3 A18 i 4 R75 nE W1A 4 0 WB W1 WC W1 0 C38 W0 4 0 W1 0 1 A0 r R72 W2 0 1 A0 r R73 W3 0 1 A0 r R74 W4 0 1 A0 r R66 3 A1D dw A17 i 3 A18 i 2 R75 pE W1B 3 0 WB WE W10 0 CB W1C 4 0 W11 WA W1 W1 0 C9 W1D 3 0 WF WE W6 0 C39 W0 3 0 W1 0 1 A0 r R72 W2 0 1 A0 r R73 W3 0 1 A0 r R74 2 A17 i 8 A18 i 2 R75 nE W1E 3 0 WB WC W6 0 C3A W0 3 0 W1 0 1 A0 r R72 W2 0 1 A0 r R73 W3 0 1 A0 r R74 3 A1D dw A17 i 3 A18 i 2 R75 nE W1F 3 0 W6 W11 W10 0 CB W20 4 0 W3 W1 WF W1 0 C36 W21 3 0 W3 WF W6 0 C39 W22 4 0 W9 W1 W11 W1 0 C3B W0 4 0 W1 0 1 A0 r R72 W2 0 1 A0 r R73 W3 0 1 A0 r R74 W4 0 1 A0 r R66 3 A1D dw A17 i 3 A18 i 4 R75 pE W23 3 0 W9 W11 W6 0 C3C W0 3 0 W1 0 1 A0 r R72 W2 0 1 A0 r R73 W3 0 1 A0 r R74 3 A1D dw A17 i 3 A18 i 4 R75 nE W24 4 0 WE WD W11 W1 0 C9 W25 4 0 W11 W1 W9 W1 0 C3D W0 4 0 W1 0 1 A0 r R72 W2 0 1 A0 r R73 W3 0 1 A0 r R74 W4 0 1 A0 r R66 3 A1D dw A17 i 3 A18 i 2 R75 pE W26 3 0 W11 WF W8 0 CB W27 4 0 W2 WD W1 W1 0 C9 W28 3 0 W11 W9 W6 0 C3E W0 3 0 W1 0 1 A0 r R72 W2 0 1 A0 r R73 W3 0 1 A0 r R74 3 A1D dw A17 i 3 A18 i 2 R75 nE W29 3 0 W6 W2 W8 0 CB W17 6 0 WE W3 WD W9 W12 WF 0 C34 W18 6 0 WE W4 WD WA W13 WF 0 C34 W19 6 0 WE W5 WD WB W14 WF 0 C34 W1A 6 0 WE W6 WD WC W15 WF 0 C34 W17 4 0 W14 W15 W8 W2 0 C3F W0 4 0 W1 8 1 A0 r RED W2 0 1 A0 r REC W3 0 1 A0 r RDF W4 0 1 A0 r RE0 W5 0 1 A0 r REB W6 0 1 A0 r RE4 W7 0 1 A0 r RE1 W8 0 1 A0 r RE2 W9 0 1 A0 r RE3 WA 5 1 A0 r RF3 WB 0 1 A0 r RE8 WC 0 1 A0 r RE7 WD 0 1 A0 r RE6 WE 0 1 A0 r RE9 WF 0 1 A0 r REA W10 0 1 A0 r RD9 W11 0 1 A0 r RDA 1 A0 r R104 "VRamAccessFSMLogic" R44 33 W12 69 0 W1 WA W13 0 1 A0 r R105 "Factor1x006" W14 0 1 A0 r R106 "Sum0x001" WB W15 0 1 A0 r R107 "NOTXtra0" WC W16 0 1 A0 r R108 "Factor0x004" WD W17 0 1 A0 r R109 "Factor0x007" W18 0 1 A0 r R10A "Factor1x000" W19 0 1 A0 r R10B "Sum0x003" WE W1A 0 1 A0 r R10C "Factor0x006" W1B 0 1 A0 r R10D "Factor1x001" W1C 0 1 A0 r R10E "Factor1x007" W1D 0 1 A0 r R10F "NOTWriteVRam" W1E 0 1 A0 r R110 "Factor0x002" W1F 0 1 A0 r R111 "Factor1x004" W20 0 1 A0 r R112 "Sum0x002" W21 0 1 A0 r R113 "NOTVRamSel" W22 0 1 A0 r R114 "Factor0x003" W23 0 1 A0 r R115 "Factor1x009" W24 0 1 A0 r R116 "NOTVRamEnWrite" W25 0 1 A0 r R117 "Factor0x005" W26 0 1 A0 r R118 "NOTXtra1" W27 0 1 A0 r R119 "Factor0x000" W28 0 1 A0 r R11A "Factor1x008" W29 0 1 A0 r R11B "Xtra0BufX5" W2A 0 1 A0 r R11C "NOTReadVRam" W2B 0 1 A0 r R11D "NOTReset" W2C 0 1 A0 r R11E "Factor0x001" W2D 0 1 A0 r R11F "Factor1x002" W2E 0 1 A0 r R120 "Sum0x000" WF W2 W3 W4 W5 W6 W7 W8 W9 W10 W11 W2F 2 0 W2E W14 W30 4 0 W13 WC WD W18 W31 2 0 W27 W24 W32 2 0 W27 W15 W33 2 0 W2C W16 W34 2 0 W9 W29 W35 2 0 W18 W23 W36 2 0 W2C W17 W37 2 0 W21 W6 W38 2 0 W2E W20 W39 4 0 W4 W1F W1C W1B W3A 2 0 W1A W29 W3B 2 0 W9 W2 W3C 2 0 W1E W3 W3D 2 0 W1E W2 W3E 2 0 W21 W1D W3F 3 0 W2D W28 W23 W40 2 0 W2C W22 W41 2 0 W21 W3 W42 3 0 W27 W25 W29 W43 2 0 W24 W7 W44 3 0 W2B W26 W9 W45 3 0 W2C W2A W29 W46 2 0 W2B W2 W47 4 0 W10 W11 W2F WB 0 C40 W0 4 0 W1 0 1 A0 r R121 "Vdd" W2 0 1 A0 r R122 "Gnd" W3 2 1 A0 r R98 W4 0 0 W5 0 0 W6 0 1 A0 r R123 "X" 2 A0 r R124 "Nand2" A16 r R125 "Nand n=2" R44 1 W0 W7 5 0 W1 W6 W4 W5 W2 0 C41 W0 5 0 W1 0 3 A0 r R66 AB H AC l agg n 0 W2 0 4 A0 r R68 AD b agg e 0 AC l agg d 0 AE r R126 "~(I-A * I-B)" W3 0 3 A0 r R9E AD b agg f 0 AC l agg n 0 W4 0 3 A0 r R9C AD b agg f 0 AC l agg n 0 W5 0 3 A0 r R6A AB L AC l agg n 0 8 AF r R6B A10 lor 2 R6D R6E A11 i 159744 A7 a A12 A13 r R6F A14 rb 1 A0 r R127 "nand2" A15 r R70 R44 4 W6 6 0 W1 W4 W2 W3 W7 0 0 W5 W8 4 0 W4 W2 W1 W1 0 C9 W9 4 0 W3 W2 W1 W1 0 C9 WA 3 0 W7 W4 W2 0 CB WB 3 0 W5 W3 W7 0 CB W48 4 0 W10 W11 W30 W14 0 C42 W0 4 0 W1 0 1 A0 r R128 "Vdd" W2 0 1 A0 r R129 "Gnd" W3 4 1 A0 r R98 W4 0 0 W5 0 0 W6 0 0 W7 0 0 W8 0 1 A0 r R12A "X" 2 A0 r R12B "Nor4" A16 r R12C "Nor n=4" R44 1 W0 W9 7 0 W1 W7 W4 W6 W5 W8 W2 0 C43 W0 7 0 W1 0 3 A0 r R66 AB H AC l agg n 0 W2 0 3 A0 r R12D "I-D" AD b agg f 0 AC l agg n 0 W3 0 3 A0 r R9E AD b agg f 0 AC l agg n 0 W4 0 3 A0 r R12E "I-C" AD b agg f 0 AC l agg n 0 W5 0 3 A0 r R9C AD b agg f 0 AC l agg n 0 W6 0 4 A0 r R68 AD b agg e 0 AC l agg d 0 AE r R12F "~(I-A + I-B + I-C + I-D)" W7 0 3 A0 r R6A AB L AC l agg n 0 8 AF r R6B A10 lor 2 R6D R6E A11 i 266240 A7 a A12 A13 r R6F A14 rb 1 A0 r R130 "nor4" A15 r R70 R44 8 W8 10 0 W1 W2 W9 0 0 W3 WA 0 0 W4 W5 W6 WB 0 0 W7 WC 4 0 W3 WB W1 W1 0 C9 WD 4 0 W5 W9 WB W1 0 C9 WE 4 0 W4 WA W9 W1 0 C9 WF 4 0 W2 W6 WA W1 0 C9 W10 3 0 W7 W2 W6 0 CB W11 3 0 W7 W4 W6 0 CB W12 3 0 W7 W5 W6 0 CB W13 3 0 W7 W3 W6 0 CB W49 4 0 W10 W11 W31 W13 0 C11 W4A 4 0 W10 W11 W32 WC 0 C11 W4B 4 0 W10 W29 W15 W11 0 C8 W4C 4 0 W10 W11 W33 WD 0 C11 W4D 4 0 W10 W11 W34 W16 0 C40 W4E 4 0 W10 W19 WE W11 0 C8 W4F 4 0 W10 W11 W35 W19 0 C11 W50 4 0 W10 W11 W36 W18 0 C11 W51 4 0 W10 W11 W37 W17 0 C40 W52 4 0 W10 W11 W38 WF 0 C40 W53 4 0 W10 W11 W39 W20 0 C42 W54 4 0 W10 W11 W3A W1B 0 C11 W55 4 0 W10 W11 W3B W1A 0 C40 W56 4 0 W10 W11 W3C W1C 0 C11 W57 4 0 W10 W11 W3D W1F 0 C11 W58 4 0 W10 W11 W3E W1E 0 C40 W59 4 0 W10 W6 W1D W11 0 C8 W5A 4 0 W10 W11 W3F W2E 0 C44 W0 4 0 W1 0 1 A0 r R131 "Vdd" W2 0 1 A0 r R132 "Gnd" W3 3 1 A0 r R98 W4 0 0 W5 0 0 W6 0 0 W7 0 1 A0 r R133 "X" 2 A0 r R134 "Nor3" A16 r R135 "Nor n=3" R44 1 W0 W8 6 0 W1 W5 W7 W4 W6 W2 0 C45 W0 6 0 W1 0 3 A0 r R66 AB H AC l agg n 0 W2 0 3 A0 r R9C AD b agg f 0 AC l agg n 0 W3 0 4 A0 r R68 AD b agg e 0 AC l agg d 0 AE r R136 "~(I-A + I-B + I-C)" W4 0 3 A0 r R9E AD b agg f 0 AC l agg n 0 W5 0 3 A0 r R12E AD b agg f 0 AC l agg n 0 W6 0 3 A0 r R6A AB L AC l agg n 0 8 AF r R6B A10 lor 2 R6D R6E A11 i 212992 A7 a A12 A13 r R6F A14 rb 1 A0 r R137 "nor3" A15 r R70 R44 6 W7 8 0 W1 W2 W3 W4 W5 W8 0 0 W9 0 0 W6 WA 4 0 W4 W8 W1 W1 0 C9 WB 4 0 W2 W9 W8 W1 0 C9 WC 4 0 W5 W3 W9 W1 0 C9 WD 3 0 W6 W5 W3 0 CB WE 3 0 W6 W2 W3 0 CB WF 3 0 W6 W4 W3 0 CB W5B 4 0 W10 W11 W40 W23 0 C11 W5C 4 0 W10 W11 W41 W22 0 C40 W5D 4 0 W10 W9 W21 W11 0 C8 W5E 4 0 W10 W11 W42 W28 0 C44 W5F 4 0 W10 W11 W43 W25 0 C40 W60 4 0 W10 W8 W24 W11 0 C8 W61 4 0 W10 W11 W44 W27 0 C46 W0 4 0 W1 0 1 A0 r R138 "Vdd" W2 0 1 A0 r R139 "Gnd" W3 3 1 A0 r R98 W4 0 0 W5 0 0 W6 0 0 W7 0 1 A0 r R13A "X" 2 A0 r R13B "Nand3" A16 r R13C "Nand n=3" R44 1 W0 W8 6 0 W1 W5 W4 W7 W6 W2 0 C47 W0 6 0 W1 0 3 A0 r R66 AB H AC l agg n 0 W2 0 3 A0 r R9C AD b agg f 0 AC l agg n 0 W3 0 3 A0 r R9E AD b agg f 0 AC l agg n 0 W4 0 4 A0 r R68 AD b agg e 0 AC l agg d 0 AE r R13D "~(I-A * I-B * I-C)" W5 0 3 A0 r R12E AD b agg f 0 AC l agg n 0 W6 0 3 A0 r R6A AB L AC l agg n 0 8 AF r R6B A10 lor 2 R6D R6E A11 i 212992 A7 a A12 A13 r R6F A14 rb 1 A0 r R13E "nand3" A15 r R70 R44 6 W7 8 0 W1 W2 W8 0 0 W3 W4 W9 0 0 W5 W6 WA 4 0 W3 W4 W1 W1 0 C9 WB 4 0 W2 W4 W1 W1 0 C9 WC 4 0 W5 W4 W1 W1 0 C9 WD 3 0 W8 W5 W4 0 CB WE 3 0 W9 W2 W8 0 CB WF 3 0 W6 W3 W9 0 CB W62 4 0 W10 W2 W26 W11 0 C8 W63 4 0 W10 W11 W45 W2D 0 C44 W64 4 0 W10 W29 W5 W11 0 C48 W0 4 0 W1 0 2 A0 r R0 AC l agg n 0 W2 0 2 A0 r R82 AC l agg d 0 W3 0 2 A0 r R83 AC l agg n 0 W4 0 2 A0 r R42 AC l agg n 0 4 A0 r R13F "driver8" A16 r R140 "Driver d=8" A10 lor 3 R88 R88 R88 A13 r RAF R44 2 W5 5 0 W1 W3 W2 W6 0 0 W4 W7 4 0 W1 W6 W2 W4 0 C2 W8 4 0 W1 W3 W6 W4 0 C8 W65 4 0 W10 W3 W2A W11 0 C8 W66 4 0 W10 W11 W46 W2C 0 C40 W67 4 0 W10 W4 W2B W11 0 C8 W7F 4 0 W1 W25 W5F W3E 0 C8 W80 10 0 W1 W51 W41 W54 W23 W63 W42 W1 W46 W3E 0 C49 W0 10 0 W1 0 2 A0 r R0 AC l agg n 0 W2 0 2 A0 r RC0 AC l agg d 0 W3 0 2 A0 r R141 "Load" AC l agg n 0 W4 10 2 A0 r R142 "Input" AC ls agg n 0 W5 0 0 W6 0 0 W7 0 0 W8 0 0 W9 0 0 WA 0 0 WB 0 0 WC 0 0 WD 0 0 WE 0 0 WF 0 2 A0 r R143 "CK" AC l agg n 0 W10 10 2 A0 r R144 "Output" AC ls agg d 0 W11 0 0 W12 0 0 W13 0 0 W14 0 0 W15 0 0 W16 0 0 W17 0 0 W18 0 0 W19 0 0 W1A 0 0 W1B 0 2 A0 r R145 "Count" AC l agg n 0 W1C 0 2 A0 r R146 "Cin" AC l agg n 0 W1D 10 2 A0 r RBF AC ls agg d 0 W1E 0 0 W1F 0 0 W20 0 0 W21 0 0 W22 0 0 W23 0 0 W24 0 0 W25 0 0 W26 0 0 W27 0 0 W28 0 2 A0 r R42 AC l agg n 0 4 A0 r R147 "CounterUp" A13 r R148 "LogicCounterUp" A10 lor 1 R88 A16 r R149 "CounterUp b=10" R44 6 W29 15 0 W1 W10 W3 WF W1D W1B W2A 0 1 A0 r R14A "ncount" W2B 0 0 W2 W4 W2C 10 0 W2D 0 0 W2E 0 0 W2F 0 0 W30 0 0 W31 0 0 W32 0 0 W33 0 0 W34 0 0 W35 0 0 W36 0 0 W37 10 0 W38 0 0 W39 0 0 W3A 0 0 W3B 0 0 W3C 0 0 W3D 0 0 W3E 0 0 W3F 0 0 W40 0 0 W41 0 0 W42 10 0 W43 0 0 W44 0 0 W45 0 0 W46 0 0 W47 0 0 W48 0 0 W49 0 0 W4A 0 0 W4B 0 0 W4C 0 0 W1C W28 W4D 6 0 W1 W37 W1D WF W10 W28 0 C4A W0 6 0 W1 0 2 A0 r R0 AC l agg n 0 W2 10 2 A0 r R142 AC ls agg n 0 W3 0 0 W4 0 0 W5 0 0 W6 0 0 W7 0 0 W8 0 0 W9 0 0 WA 0 0 WB 0 0 WC 0 0 WD 10 2 A0 r R144 AC ls agg d 0 WE 0 0 WF 0 0 W10 0 0 W11 0 0 W12 0 0 W13 0 0 W14 0 0 W15 0 0 W16 0 0 W17 0 0 W18 0 2 A0 r R143 AC l agg n 0 W19 10 2 A0 r RBF AC ls agg d 0 W1A 0 0 W1B 0 0 W1C 0 0 W1D 0 0 W1E 0 0 W1F 0 0 W20 0 0 W21 0 0 W22 0 0 W23 0 0 W24 0 2 A0 r R42 AC l agg n 0 4 A0 r R14B "RegisterSimple" A13 r R14C "LogicRegisterSimple" A10 lor 1 R88 A16 r R14D "RegisterSimple b=10" R85 C4B W0 6 0 W1 0 2 A1A a A1A A0 r R0 W2 0 1 A0 r R142 W3 0 1 A0 r R144 W4 0 1 A0 r R143 W5 0 1 A0 r RBF W6 0 2 A1A a A1A A0 r R42 1 A0 r R14E "reg1BSimple" R44 1 W7 6 0 W1 W2 W3 W4 W5 W6 W8 6 0 W1 W2 W4 W3 W5 W6 0 C34 10 3 1 2 4 -1 W4E 6 0 W1 W3 W4 W37 W2C W28 0 C4C W0 6 0 W1 0 2 A0 r R0 AC l agg n 0 W2 0 2 A0 r R14F "Select" AC l agg n 0 W3 10 2 A0 r R150 "In1" AC ls agg n 0 W4 0 0 W5 0 0 W6 0 0 W7 0 0 W8 0 0 W9 0 0 WA 0 0 WB 0 0 WC 0 0 WD 0 0 WE 10 2 A0 r R151 "nOut" AC ls agg d 0 WF 0 0 W10 0 0 W11 0 0 W12 0 0 W13 0 0 W14 0 0 W15 0 0 W16 0 0 W17 0 0 W18 0 0 W19 10 2 A0 r R152 "In0" AC ls agg n 0 W1A 0 0 W1B 0 0 W1C 0 0 W1D 0 0 W1E 0 0 W1F 0 0 W20 0 0 W21 0 0 W22 0 0 W23 0 0 W24 0 2 A0 r R42 AC l agg n 0 4 A0 r R153 "invMux2b" A13 r R154 "LogicInvMux" A10 lor 1 R88 A16 r R155 "InvMux b=10" R44 2 W25 8 0 W1 WE W2 W26 0 1 A0 r R156 "NEN" W19 W27 0 1 A0 r R157 "EN" W3 W24 W28 7 0 W1 W26 WE W3 W19 W27 W24 0 C4D W0 7 0 W1 0 2 A0 r R0 A1A a A1A W2 0 2 A0 r R158 "A" A1A a A1A W3 10 3 A0 r R68 A1B a A1B A1A a A1A W4 0 0 W5 0 0 W6 0 0 W7 0 0 W8 0 0 W9 0 0 WA 0 0 WB 0 0 WC 0 0 WD 0 0 WE 10 3 A0 r R101 A1B a A1B A1A a A1A WF 0 0 W10 0 0 W11 0 0 W12 0 0 W13 0 0 W14 0 0 W15 0 0 W16 0 0 W17 0 0 W18 0 0 W19 10 3 A0 r R159 "B" A1B a A1B A1A a A1A W1A 0 0 W1B 0 0 W1C 0 0 W1D 0 0 W1E 0 0 W1F 0 0 W20 0 0 W21 0 0 W22 0 0 W23 0 0 W24 0 2 A0 r RFA A1A a A1A W25 0 2 A0 r R42 A1A a A1A 1 A0 r R15A "a22o2iSeq" R85 C4E W0 7 0 W1 0 3 A0 r R66 AB H AC l agg n 0 W2 0 3 A0 r R158 AD b agg f 0 AC l agg n 0 W3 0 4 A0 r R68 AD b agg e 0 AC l agg d 0 AE r R15B "~(A*B+C*D)" W4 0 3 A0 r R101 AD b agg f 0 AC l agg n 0 W5 0 3 A0 r R159 AD b agg f 0 AC l agg n 0 W6 0 3 A0 r RFA AD b agg f 0 AC l agg n 0 W7 0 3 A0 r R6A AB L AC l agg n 0 9 AF r R6B A0 r R15C "a22o2i" A10 lor 2 R6D R6E A11 i 266240 A7 a A12 A13 r R6F A14 rb 1 A15 r R70 A16 r R15D "A22o2i" R44 8 W8 10 0 W1 W2 W9 0 0 WA 0 0 WB 0 0 W3 W5 W6 W4 W7 WC 4 0 W5 WB W1 W1 0 C9 WD 4 0 W6 W3 WB W1 0 C9 WE 3 0 WA W6 W3 0 CB WF 4 0 W2 WB W1 W1 0 C9 W10 3 0 W7 W4 WA 0 CB W11 4 0 W4 W3 WB W1 0 C9 W12 3 0 W9 W2 W3 0 CB W13 3 0 W7 W5 W9 0 CB 10 3 2 3 4 0 W29 5 0 W1 W2 W27 W26 W24 0 C4F W0 5 0 W1 0 2 A0 r R0 AC l agg n 0 W2 0 2 A0 r R83 AC l agg n 0 W3 0 2 A0 r R82 AC l agg d 0 W4 0 2 A0 r RA0 AC l agg d 0 W5 0 2 A0 r R42 AC l agg n 0 4 A0 r R15E "symDriver" A13 r RA3 A10 lor 1 R88 A16 r R15F "SymDriver d=10" R44 2 W6 5 0 W1 W3 W2 W4 W5 W7 4 0 W1 W3 W4 W5 0 C50 W0 4 0 W1 0 2 A0 r R66 AC l agg n 0 W2 0 2 A0 r R67 AC l agg n 0 W3 0 2 A0 r R68 AC l agg d 0 W4 0 2 A0 r R6A AC l agg n 0 4 A0 r RB0 A13 r R89 A10 lor 1 RB1 A16 r R160 "Buffer d=3" R85 C2 2 -1 -1 W8 4 0 W1 W2 W3 W5 0 C51 W0 4 0 W1 0 2 A0 r R0 AC l agg n 0 W2 0 2 A0 r R83 AC l agg n 0 W3 0 2 A0 r R82 AC l agg d 0 W4 0 2 A0 r R42 AC l agg n 0 4 A0 r R161 "driver" A16 r R162 "Driver d=13" A10 lor 2 R88 R88 A13 r RAF R44 2 W5 5 0 W1 W6 0 0 W3 W2 W4 W7 4 0 W1 W6 W3 W4 0 C52 W0 4 0 W1 0 2 A0 r R66 AC l agg n 0 W2 0 2 A0 r R67 AC l agg n 0 W3 0 2 A0 r R68 AC l agg d 0 W4 0 2 A0 r R6A AC l agg n 0 4 A0 r RB0 A13 r R89 A10 lor 1 RB1 A16 r R163 "Buffer d=4" R85 C2 2 -1 -1 W8 4 0 W1 W2 W6 W4 0 C1F W4F 6 0 W1 W28 W10 W42 W2 W1C 0 C53 W0 6 0 W1 0 1 A0 r R164 "Vdd" W2 0 1 A0 r R165 "Gnd" W3 10 1 A0 r R166 "PIn" W4 0 0 W5 0 0 W6 0 0 W7 0 0 W8 0 0 W9 0 0 WA 0 0 WB 0 0 WC 0 0 WD 0 0 WE 10 1 A0 r R167 "nCOut" WF 0 0 W10 0 0 W11 0 0 W12 0 0 W13 0 0 W14 0 0 W15 0 0 W16 0 0 W17 0 0 W18 0 0 W19 0 1 A0 r R168 "COut" W1A 0 1 A0 r R169 "CIn" 2 A0 r R16A "CLP10" A16 r R16B "CounterCLG n=10" R44 11 W1B 12 0 W1 W2 W3 WE W19 W1A W1C 2 0 W1D 0 0 W1E 0 0 W1F 2 0 W20 0 0 W21 0 0 W22 3 0 W23 0 0 W24 0 0 W25 0 0 W26 3 0 W27 0 0 W28 0 0 W29 0 0 W2A 5 0 W2B 0 0 W2C 0 0 W2D 0 0 W2E 0 0 W2F 0 0 W30 5 0 W31 0 0 W32 0 0 W33 0 0 W34 0 0 W35 0 0 W36 7 0 W1 W2 W1F W19 W1C W1A W2 0 C54 W0 7 0 W1 0 1 A0 r R0 W2 0 1 A0 r R16C "Force" W3 2 1 A0 r R16D "COut" W4 0 0 W5 0 0 W6 0 1 A0 r R16E "COutX" W7 2 1 A0 r R16F "PIn" W8 0 0 W9 0 0 WA 0 1 A0 r R170 "CIn" WB 0 1 A0 r R42 1 A0 r R171 "counterCLP2NL" R44 4 WC 8 0 W1 W7 WD 0 0 W6 W2 W3 WA WB WE 4 0 W1 W2 W5 WB 0 C8 WF 4 0 W1 W9 W4 WB 0 C8 W10 5 0 W1 W9 W8 WD WB 0 C20 W11 5 0 W1 WD W6 WA WB 0 C2B W37 6 0 W1 W1E W25 W29 W21 W2 1 A0 r R172 "1/2" C55 W0 6 0 W1 0 1 A0 r R0 W2 0 1 A0 r R173 "POut" W3 0 1 A0 r R16F W4 0 1 A0 r R16D W5 0 1 A0 r R170 W6 0 1 A0 r R42 1 A0 r R174 "counterCLPX1" R44 2 W7 6 0 W1 W2 W3 W4 W5 W6 W8 4 0 W1 W5 W4 W6 0 C8 W9 4 0 W1 W3 W2 W6 0 C8 W38 8 0 W1 W27 W23 W28 W1D W24 W20 W2 1 A0 r R175 "0/2" C56 W0 8 0 W1 0 1 A0 r R0 W2 0 1 A0 r R176 "COut0" W3 0 1 A0 r R177 "PIn0" W4 0 1 A0 r R178 "COut1" W5 0 1 A0 r R173 W6 0 1 A0 r R179 "PIn1" W7 0 1 A0 r R170 W8 0 1 A0 r R42 1 A0 r R17A "counterCLP2P" R44 3 W9 8 0 W1 W2 W3 W5 W6 W4 W7 W8 WA 4 0 W1 W7 W4 W8 0 C8 WB 5 0 W1 W7 W2 W6 W8 0 C57 W0 5 0 W1 0 2 A1A a A1A A0 r R0 W2 0 1 A0 r RB5 W3 0 1 A0 r R82 W4 0 1 A0 r RB4 W5 0 2 A1A a A1A A0 r R42 1 A0 r R17B "nand2" R44 1 W6 4 0 W1 W3 W7 2 2 A0 r R98 A1A a A1A W4 W2 W5 W8 4 0 W1 W5 W7 W3 0 C40 WC 5 0 W1 W3 W5 W6 W8 0 C57 W39 6 0 W1 W25 W2F W35 W29 W2 1 A0 r R17C "2/3" C55 W3A 8 0 W1 W24 W33 W2E W28 W34 W2D W2 1 A0 r R17D "1/3" C58 W0 8 0 W1 0 1 A0 r R0 W2 0 1 A0 r R173 W3 0 1 A0 r R176 W4 0 1 A0 r R179 W5 0 1 A0 r R170 W6 0 1 A0 r R178 W7 0 1 A0 r R177 W8 0 1 A0 r R42 1 A0 r R17E "counterCLP2N" R44 3 W9 8 0 W1 W2 W7 W4 W5 W3 W6 W8 WA 4 0 W1 W5 W6 W8 0 C8 WB 5 0 W1 W4 W5 W3 W8 0 C20 WC 5 0 W1 W4 W7 W2 W8 0 C20 W3B 8 0 W1 W23 W31 W2C W27 W32 W2B W2 1 A0 r R17F "0/3" C58 W3C 8 0 W1 W17 WC W18 W2F WD W35 W2 1 A0 r R180 "4/5" C56 W3D 8 0 W1 W15 WA W16 W2E WB W34 W2 1 A0 r R181 "3/5" C56 W3E 8 0 W1 W13 W8 W14 W2D W9 W33 W2 1 A0 r R182 "2/5" C56 W3F 8 0 W1 W11 W6 W12 W2C W7 W32 W2 1 A0 r R183 "1/5" C56 W40 8 0 W1 WF W4 W10 W2B W5 W31 W2 1 A0 r R184 "0/5" C56 W50 6 0 W1 W1D W42 W2C W2A W28 0 C59 W0 6 0 W1 0 2 A0 r R0 A1A a A1A W2 10 1 A1B a A1B W3 0 0 W4 0 0 W5 0 0 W6 0 0 W7 0 0 W8 0 0 W9 0 0 WA 0 0 WB 0 0 WC 0 0 WD 10 3 A0 r RB4 A1B a A1B A1A a A1A WE 0 0 WF 0 0 W10 0 0 W11 0 0 W12 0 0 W13 0 0 W14 0 0 W15 0 0 W16 0 0 W17 0 0 W18 10 3 A0 r R68 A1B a A1B A1A a A1A W19 0 0 W1A 0 0 W1B 0 0 W1C 0 0 W1D 0 0 W1E 0 0 W1F 0 0 W20 0 0 W21 0 0 W22 0 0 W23 0 0 W24 0 2 A0 r R42 A1A a A1A 1 A0 r R84 R85 C5A W0 6 0 W1 0 1 A0 r R0 W2 0 0 W3 0 2 A0 r RB4 A1A a A1A W4 0 2 A0 r R68 A1A a A1A W5 0 0 W6 0 1 A0 r R42 1 A0 r R84 R44 2 W7 7 0 W1 W3 W2 W4 W8 0 0 W5 W6 W9 5 0 W1 W2 W4 W8 W6 0 C5B W0 5 0 W1 0 3 A0 r R66 AB H AC l agg n 0 W2 0 3 A0 r R9C AD b agg f 0 AC l agg n 0 W3 0 4 A0 r R68 AD b agg e 0 AC l agg d 0 AE r R185 "(I-A*I-B)+(~I-A*~I-B)" W4 0 3 A0 r R9E AD b agg f 0 AC l agg n 0 W5 0 3 A0 r R6A AB L AC l agg n 0 9 AF r R6B A0 r R186 "xnor2" A10 lor 2 R6D R6E A11 i 319488 A7 a A12 A13 r R6F A14 rb 1 A15 r R70 A16 r R187 "Xnor2" R44 10 W6 9 0 W1 W4 W7 0 0 W8 0 0 W3 W9 0 0 W2 WA 0 0 W5 WB 4 0 W9 W3 W1 W1 0 C9 WC 3 0 W8 W4 W3 0 CB WD 4 0 W2 WA W1 W1 0 C9 WE 4 0 W4 W3 WA W1 0 C9 WF 4 0 W2 W9 W1 W1 0 C9 W10 3 0 W8 W2 W3 0 CB W11 3 0 W5 W9 W8 0 CB W12 4 0 W4 W9 W1 W1 0 C9 W13 3 0 W7 W2 W9 0 CB W14 3 0 W5 W4 W7 0 CB WA 5 0 W1 W3 W5 W8 W6 0 C20 10 3 1 2 3 0 W51 4 0 W1 W2B W2A W28 0 C5C W0 4 0 W1 0 2 A0 r R0 AC l agg n 0 W2 0 2 A0 r R83 AC l agg n 0 W3 0 2 A0 r R82 AC l agg d 0 W4 0 2 A0 r R42 AC l agg n 0 4 A0 r R188 "driver" A13 r RAF A10 lor 1 R88 A16 r R189 "Driver d=10" R44 2 W5 5 0 W1 W6 0 0 W2 W3 W4 W7 4 0 W1 W6 W3 W4 0 C50 W8 4 0 W1 W2 W6 W4 0 C1F W52 5 0 W1 W1B W2B W1C W28 0 C57 W81 4 0 W1 W26 W43 W3E 0 C8 W82 6 0 W1 W45 W40 W43 W41 W3E 0 C5D W0 6 0 W1 0 2 A1A a A1A A0 r R0 W2 0 1 A0 r RB5 W3 0 1 A0 r R18A "I-C" W4 0 1 A0 r RB4 W5 0 1 A0 r R82 W6 0 2 A1A a A1A A0 r R42 1 A0 r R18B "nand3" R44 1 W7 4 0 W1 W8 3 2 A0 r R98 A1A a A1A W4 W2 W3 W5 W6 W9 4 0 W1 W6 W8 W5 0 C46 W83 5 0 W1 W25 W45 W62 W3E 0 C57 W84 6 0 W1 W52 W32 W6E W63 W3E 0 C4C W85 7 0 W1 W61 W1C W62 W40 WF W3E 0 C5E W0 7 0 W1 0 2 A1A a A1A A0 r R0 W2 0 1 A0 r R18C "I-D" W3 0 1 A0 r R18A W4 0 1 A0 r RB4 W5 0 1 A0 r R82 W6 0 1 A0 r RB5 W7 0 2 A1A a A1A A0 r R42 1 A0 r R18D "nand4" R44 1 W8 4 0 W1 W9 4 2 A0 r R98 A1A a A1A W4 W6 W3 W2 W5 W7 WA 4 0 W1 W7 W9 W5 0 C5F W0 4 0 W1 0 1 A0 r R18E "Vdd" W2 0 1 A0 r R18F "Gnd" W3 4 1 A0 r R98 W4 0 0 W5 0 0 W6 0 0 W7 0 0 W8 0 1 A0 r R190 "X" 2 A0 r R191 "Nand4" A16 r R192 "Nand n=4" R44 1 W0 W9 7 0 W1 W7 W6 W8 W4 W5 W2 0 C60 W0 7 0 W1 0 3 A0 r R66 AB H AC l agg n 0 W2 0 3 A0 r R12D AD b agg f 0 AC l agg n 0 W3 0 3 A0 r R12E AD b agg f 0 AC l agg n 0 W4 0 4 A0 r R68 AD b agg e 0 AC l agg d 0 AE r R193 "~(I-A * I-B * I-C * I-D)" W5 0 3 A0 r R9E AD b agg f 0 AC l agg n 0 W6 0 3 A0 r R9C AD b agg f 0 AC l agg n 0 W7 0 3 A0 r R6A AB L AC l agg n 0 8 AF r R6B A10 lor 2 R6D R6E A11 i 266240 A7 a A12 A13 r R6F A14 rb 1 A0 r R194 "nand4" A15 r R70 R44 8 W8 10 0 W1 W6 W9 0 0 WA 0 0 W4 W5 W2 WB 0 0 W3 W7 WC 4 0 W5 W4 W1 W1 0 C9 WD 3 0 WB W2 W4 0 CB WE 4 0 W6 W4 W1 W1 0 C9 WF 3 0 WA W3 WB 0 CB W10 4 0 W3 W4 W1 W1 0 C9 W11 3 0 W9 W6 WA 0 CB W12 4 0 W2 W4 W1 W1 0 C9 W13 3 0 W7 W5 W9 0 CB W86 5 0 W1 W10 W63 WF W3E 0 C61 W0 5 0 W1 0 2 A0 r R0 AC l agg n 0 W2 10 2 A0 r R195 "B" AC ls agg n 0 W3 0 0 W4 0 0 W5 0 0 W6 0 0 W7 0 0 W8 0 0 W9 0 0 WA 0 0 WB 0 0 WC 0 0 WD 10 2 A0 r R196 "A" AC ls agg n 0 WE 0 0 WF 0 0 W10 0 0 W11 0 0 W12 0 0 W13 0 0 W14 0 0 W15 0 0 W16 0 0 W17 0 0 W18 0 2 A0 r R197 "AEqB" AC l agg d 0 W19 0 2 A0 r R42 AC l agg n 0 4 A0 r R198 "comparator" A13 r R199 "LogicComparator" A10 lor 1 R88 A16 r R19A "Comparator b=10" R44 2 W1A 6 0 W1 W2 W18 WD W1B 10 0 W1C 0 0 W1D 0 0 W1E 0 0 W1F 0 0 W20 0 0 W21 0 0 W22 0 0 W23 0 0 W24 0 0 W25 0 0 W19 W26 4 0 W1 W19 W1B W18 0 C62 W0 4 0 W1 0 1 A0 r R19B "Vdd" W2 0 1 A0 r R19C "Gnd" W3 10 1 A0 r R98 W4 0 0 W5 0 0 W6 0 0 W7 0 0 W8 0 0 W9 0 0 WA 0 0 WB 0 0 WC 0 0 WD 0 0 WE 0 1 A0 r R19D "X" 2 A0 r R19E "And10" A16 r R19F "And n=10" R44 3 WF 9 0 W1 W2 W3 WE W10 0 1 A0 r R1A0 "One" W11 0 1 A0 r R1A1 "Two" W12 2 0 W10 W11 W13 5 0 W4 W5 W6 W7 W8 W14 5 0 W9 WA WB WC WD W15 4 0 W1 W2 W12 WE 0 C11 W16 4 0 W1 W2 W13 W10 0 C63 W0 4 0 W1 0 1 A0 r R1A2 "Vdd" W2 0 1 A0 r R1A3 "Gnd" W3 5 1 A0 r R98 W4 0 0 W5 0 0 W6 0 0 W7 0 0 W8 0 0 W9 0 1 A0 r R1A4 "X" 2 A0 r R1A5 "Nand5" A16 r R1A6 "Nand n=5" R44 3 WA 9 0 W1 W2 W3 W9 WB 0 1 A0 r R1A7 "One" WC 0 1 A0 r R1A8 "Two" WD 2 0 WB WC WE 2 0 W4 W5 WF 3 0 W6 W7 W8 W10 4 0 W1 W2 WD W9 0 C40 W11 4 0 W1 W2 WE WB 0 C2C W12 4 0 W1 W2 WF WC 0 C64 W0 4 0 W1 0 1 A0 r R1A9 "Vdd" W2 0 1 A0 r R1AA "Gnd" W3 3 1 A0 r R98 W4 0 0 W5 0 0 W6 0 0 W7 0 1 A0 r R1AB "X" 2 A0 r R1AC "And3" A16 r R1AD "And n=3" R44 1 W0 W8 6 0 W1 W5 W4 W7 W6 W2 0 C65 W0 6 0 W1 0 3 A0 r R66 AB H AC l agg n 0 W2 0 3 A0 r R9C AD b agg f 0 AC l agg n 0 W3 0 3 A0 r R9E AD b agg f 0 AC l agg n 0 W4 0 4 A0 r R68 AD b agg e 0 AC l agg d 0 AE r R1AE "I-A * I-B * I-C" W5 0 3 A0 r R12E AD b agg f 0 AC l agg n 0 W6 0 3 A0 r R6A AB L AC l agg n 0 8 AF r R6B A10 lor 2 R6D R6E A11 i 266240 A7 a A12 A13 r R6F A14 rb 1 A0 r R1AF "and3" A15 r R70 R44 7 W7 9 0 W1 W5 W3 W4 W8 0 0 W2 W9 0 0 WA 0 0 W6 WB 4 0 W1 WA W4 W6 0 C2E WC 4 0 W3 WA W1 W1 0 C9 WD 4 0 W2 WA W1 W1 0 C9 WE 4 0 W5 WA W1 W1 0 C9 WF 3 0 W9 W5 WA 0 CB W10 3 0 W8 W2 W9 0 CB W11 3 0 W6 W3 W8 0 CB W17 4 0 W1 W2 W14 W11 0 C63 W27 5 0 W1 W2 W1B WD W19 0 C66 W0 5 0 W1 0 2 A0 r R0 A1A a A1A W2 10 3 A0 r R9C A1B a A1B A1A a A1A W3 0 0 W4 0 0 W5 0 0 W6 0 0 W7 0 0 W8 0 0 W9 0 0 WA 0 0 WB 0 0 WC 0 0 WD 10 3 A0 r R68 A1B a A1B A1A a A1A WE 0 0 WF 0 0 W10 0 0 W11 0 0 W12 0 0 W13 0 0 W14 0 0 W15 0 0 W16 0 0 W17 0 0 W18 10 3 A0 r R9E A1B a A1B A1A a A1A W19 0 0 W1A 0 0 W1B 0 0 W1C 0 0 W1D 0 0 W1E 0 0 W1F 0 0 W20 0 0 W21 0 0 W22 0 0 W23 0 2 A0 r R42 A1A a A1A 1 A0 r R84 R85 C5B 10 3 1 2 3 0 W87 6 0 W1 WE W23 W61 W60 W3E 0 C34 W88 4 0 W1 W2 W62 W3E 0 C8 W89 5 0 W1 W1C W42 W2 W3E 0 C67 W0 5 0 W1 0 2 A1A a A1A A0 r R0 W2 0 1 A0 r RB5 W3 0 1 A0 r R82 W4 0 1 A0 r RB4 W5 0 2 A1A a A1A A0 r R42 1 A0 r R1B0 "or2" R44 1 W6 4 0 W1 W3 W7 2 2 A0 r R98 A1A a A1A W4 W2 W5 W8 4 0 W1 W5 W7 W3 0 C68 W0 4 0 W1 0 1 A0 r R1B1 "Vdd" W2 0 1 A0 r R1B2 "Gnd" W3 2 1 A0 r R98 W4 0 0 W5 0 0 W6 0 1 A0 r R1B3 "X" 2 A0 r R1B4 "Or2" A16 r R1B5 "Or n=2" R44 1 W0 W7 5 0 W1 W4 W6 W5 W2 0 C69 W0 5 0 W1 0 3 A0 r R66 AB H AC l agg n 0 W2 0 3 A0 r R9E AD b agg f 0 AC l agg n 0 W3 0 4 A0 r R68 AD b agg e 0 AC l agg d 0 AE r R1B6 "I-A + I-B" W4 0 3 A0 r R9C AD b agg f 0 AC l agg n 0 W5 0 3 A0 r R6A AB L AC l agg n 0 8 AF r R6B A10 lor 2 R6D R6E A11 i 212992 A7 a A12 A13 r R6F A14 rb 1 A0 r R1B7 "or2" A15 r R70 R44 5 W6 7 0 W1 W7 0 0 W4 W2 W8 0 0 W3 W5 W9 4 0 W1 W8 W3 W5 0 C2E WA 4 0 W2 W7 W1 W1 0 C9 WB 3 0 W5 W4 W8 0 CB WC 4 0 W4 W8 W7 W1 0 C9 WD 3 0 W5 W2 W8 0 CB W130 20 0 W1 W11E W113 W88 W1E WBE W8 W2E WCF W119 W6A W11B WF1 W8E W108 WD9 WF WEE W12D WEA 0 C6A W0 20 0 W1 0 1 A0 r R0 W2 0 1 A0 r R59 W3 6 1 A0 r R4E W4 0 0 W5 0 0 W6 0 0 W7 0 0 W8 0 0 W9 0 0 WA 4 1 A0 r R1B8 "DecompDataSrc" WB 0 0 WC 0 0 WD 0 0 WE 0 0 WF 0 1 A0 r R8 W10 0 1 A0 r R30 W11 5 1 A0 r R3 W12 0 0 W13 0 0 W14 0 0 W15 0 0 W16 0 0 W17 5 1 A0 r RC W18 0 0 W19 0 0 W1A 0 0 W1B 0 0 W1C 0 0 W1D 0 1 A0 r R35 W1E 0 1 A0 r R54 W1F 5 1 A0 r R1D W20 0 0 W21 0 0 W22 0 0 W23 0 0 W24 0 0 W25 0 1 A0 r R56 W26 0 1 A0 r R4A W27 16 1 A0 r R2A W28 0 0 W29 0 0 W2A 0 0 W2B 0 0 W2C 0 0 W2D 0 0 W2E 0 0 W2F 0 0 W30 0 0 W31 0 0 W32 0 0 W33 0 0 W34 0 0 W35 0 0 W36 0 0 W37 0 0 W38 10 1 A0 r R4D W39 0 0 W3A 0 0 W3B 0 0 W3C 0 0 W3D 0 0 W3E 0 0 W3F 0 0 W40 0 0 W41 0 0 W42 0 0 W43 0 1 A0 r R3D W44 5 1 A0 r R5 W45 0 0 W46 0 0 W47 0 0 W48 0 0 W49 0 0 W4A 0 1 A0 r R47 W4B 0 1 A0 r R1B9 "ResetPlus5" W4C 0 1 A0 r R42 1 A0 r R1BA "HRamAddGen" R44 28 W4D 48 0 W1 W4E 6 0 W4F 0 0 W50 0 0 W51 0 0 W52 0 0 W53 0 0 W54 0 0 W2 W55 0 3 A0 r RFC A5 a A6 A1A a A1A W56 5 0 W4F W50 W51 W52 W53 W57 5 0 W58 0 0 W59 0 0 W5A 0 0 W5B 0 0 W5C 0 0 W5D 0 0 W5E 16 1 A5 a A6 W5F 0 0 W60 0 0 W61 0 0 W62 0 0 W63 0 0 W64 0 0 W65 0 0 W66 0 0 W67 0 0 W68 0 0 W69 0 0 W6A 0 0 W6B 0 0 W6C 0 0 W6D 0 0 W6E 0 0 W6F 6 1 A5 a A6 W70 0 0 W71 0 0 W72 0 0 W73 0 0 W74 0 0 W75 0 0 W76 0 1 A5 a A6 W25 W77 5 0 W3E W3F W40 W41 W42 W78 5 1 A5 a A6 W39 W3A W3B W3C W3D W79 0 0 W11 W7A 0 1 A5 a A6 W26 W7B 0 0 W27 W7C 0 0 W7D 6 0 W4C W4C W4C W4C W4C W4C WF W4B W44 W4A W43 W1F W7E 0 0 W7F 0 0 W80 16 0 W4C W4C W4C W4C W4C W4C W4C W4C W4C W4C W4C W4C W4C W4C W4C W4C W17 W38 W81 5 0 W3E W3F W40 W41 W42 W3 W1D W82 0 0 W1E W83 0 0 W84 0 0 W85 0 0 W86 6 0 W58 W59 W5A W5B W5C W87 0 0 WA W88 0 0 W89 0 1 A5 a A6 W8A 0 0 W8B 6 1 A5 a A6 W8C 0 0 W8D 0 0 W8E 0 0 W8F 0 0 W90 0 0 W91 0 0 W10 W4C W92 3 0 W4C W1 W80 0 C6B W0 3 0 W1 0 2 A0 r R1BB "Gnd" A5 a A6 W2 0 2 A0 r R1BC "Vdd" A5 a A6 W3 16 2 A0 r R1BD "Output" A5 a A6 W1 W1 W1 W1 W1 W1 W1 W1 W1 W1 W1 W1 W1 W1 W1 W1 1 A0 r R1BE "Constant" R44 0 W0 W93 10 0 W1 W1 W80 W1 W4A W5E W27 W89 W1D W4C 0 C6C W0 10 0 W1 0 2 A0 r R0 AC l agg n 0 W2 0 2 A0 r R145 AC l agg n 0 W3 16 2 A0 r R142 AC ls agg n 0 W4 0 0 W5 0 0 W6 0 0 W7 0 0 W8 0 0 W9 0 0 WA 0 0 WB 0 0 WC 0 0 WD 0 0 WE 0 0 WF 0 0 W10 0 0 W11 0 0 W12 0 0 W13 0 0 W14 0 2 A0 r R146 AC l agg n 0 W15 0 2 A0 r R141 AC l agg n 0 W16 16 2 A0 r RBF AC ls agg d 0 W17 0 0 W18 0 0 W19 0 0 W1A 0 0 W1B 0 0 W1C 0 0 W1D 0 0 W1E 0 0 W1F 0 0 W20 0 0 W21 0 0 W22 0 0 W23 0 0 W24 0 0 W25 0 0 W26 0 0 W27 16 2 A0 r R144 AC ls agg d 0 W28 0 0 W29 0 0 W2A 0 0 W2B 0 0 W2C 0 0 W2D 0 0 W2E 0 0 W2F 0 0 W30 0 0 W31 0 0 W32 0 0 W33 0 0 W34 0 0 W35 0 0 W36 0 0 W37 0 0 W38 0 2 A0 r RC0 AC l agg d 0 W39 0 2 A0 r R143 AC l agg n 0 W3A 0 2 A0 r R42 AC l agg n 0 4 A0 r R1BF "CounterUp" A13 r R148 A10 lor 1 R88 A16 r R1C0 "CounterUp b=16" R44 6 W3B 15 0 W1 W3C 16 0 W3D 0 0 W3E 0 0 W3F 0 0 W40 0 0 W41 0 0 W42 0 0 W43 0 0 W44 0 0 W45 0 0 W46 0 0 W47 0 0 W48 0 0 W49 0 0 W4A 0 0 W4B 0 0 W4C 0 0 W15 W4D 0 0 W3 W38 W14 W27 W4E 16 0 W4F 0 0 W50 0 0 W51 0 0 W52 0 0 W53 0 0 W54 0 0 W55 0 0 W56 0 0 W57 0 0 W58 0 0 W59 0 0 W5A 0 0 W5B 0 0 W5C 0 0 W5D 0 0 W5E 0 0 W2 W5F 0 1 A0 r R14A W60 16 0 W61 0 0 W62 0 0 W63 0 0 W64 0 0 W65 0 0 W66 0 0 W67 0 0 W68 0 0 W69 0 0 W6A 0 0 W6B 0 0 W6C 0 0 W6D 0 0 W6E 0 0 W6F 0 0 W70 0 0 W16 W39 W3A W71 6 0 W1 W60 W16 W39 W27 W3A 0 C6D W0 6 0 W1 0 2 A0 r R0 AC l agg n 0 W2 16 2 A0 r R142 AC ls agg n 0 W3 0 0 W4 0 0 W5 0 0 W6 0 0 W7 0 0 W8 0 0 W9 0 0 WA 0 0 WB 0 0 WC 0 0 WD 0 0 WE 0 0 WF 0 0 W10 0 0 W11 0 0 W12 0 0 W13 16 2 A0 r R144 AC ls agg d 0 W14 0 0 W15 0 0 W16 0 0 W17 0 0 W18 0 0 W19 0 0 W1A 0 0 W1B 0 0 W1C 0 0 W1D 0 0 W1E 0 0 W1F 0 0 W20 0 0 W21 0 0 W22 0 0 W23 0 0 W24 0 2 A0 r R143 AC l agg n 0 W25 16 2 A0 r RBF AC ls agg d 0 W26 0 0 W27 0 0 W28 0 0 W29 0 0 W2A 0 0 W2B 0 0 W2C 0 0 W2D 0 0 W2E 0 0 W2F 0 0 W30 0 0 W31 0 0 W32 0 0 W33 0 0 W34 0 0 W35 0 0 W36 0 2 A0 r R42 AC l agg n 0 4 A0 r R14B A13 r R14C A10 lor 1 R88 A16 r R1C1 "RegisterSimple b=16" R85 C4B 16 3 1 2 4 -1 W72 6 0 W1 W3C W60 W3 W15 W3A 0 C6E W0 6 0 W1 0 2 A0 r R0 AC l agg n 0 W2 16 2 A0 r R152 AC ls agg n 0 W3 0 0 W4 0 0 W5 0 0 W6 0 0 W7 0 0 W8 0 0 W9 0 0 WA 0 0 WB 0 0 WC 0 0 WD 0 0 WE 0 0 WF 0 0 W10 0 0 W11 0 0 W12 0 0 W13 16 2 A0 r R151 AC ls agg d 0 W14 0 0 W15 0 0 W16 0 0 W17 0 0 W18 0 0 W19 0 0 W1A 0 0 W1B 0 0 W1C 0 0 W1D 0 0 W1E 0 0 W1F 0 0 W20 0 0 W21 0 0 W22 0 0 W23 0 0 W24 16 2 A0 r R150 AC ls agg n 0 W25 0 0 W26 0 0 W27 0 0 W28 0 0 W29 0 0 W2A 0 0 W2B 0 0 W2C 0 0 W2D 0 0 W2E 0 0 W2F 0 0 W30 0 0 W31 0 0 W32 0 0 W33 0 0 W34 0 0 W35 0 2 A0 r R14F AC l agg n 0 W36 0 2 A0 r R42 AC l agg n 0 4 A0 r R1C2 "invMux2b" A13 r R154 A10 lor 1 R88 A16 r R1C3 "InvMux b=16" R44 2 W37 8 0 W1 W38 0 1 A0 r R157 W35 W39 0 1 A0 r R156 W13 W24 W2 W36 W3A 7 0 W1 W39 W13 W24 W2 W38 W36 0 C6F W0 7 0 W1 0 2 A0 r R0 A1A a A1A W2 0 2 A0 r R158 A1A a A1A W3 16 3 A0 r R68 A1B a A1B A1A a A1A W4 0 0 W5 0 0 W6 0 0 W7 0 0 W8 0 0 W9 0 0 WA 0 0 WB 0 0 WC 0 0 WD 0 0 WE 0 0 WF 0 0 W10 0 0 W11 0 0 W12 0 0 W13 0 0 W14 16 3 A0 r R101 A1B a A1B A1A a A1A W15 0 0 W16 0 0 W17 0 0 W18 0 0 W19 0 0 W1A 0 0 W1B 0 0 W1C 0 0 W1D 0 0 W1E 0 0 W1F 0 0 W20 0 0 W21 0 0 W22 0 0 W23 0 0 W24 0 0 W25 16 3 A0 r R159 A1B a A1B A1A a A1A W26 0 0 W27 0 0 W28 0 0 W29 0 0 W2A 0 0 W2B 0 0 W2C 0 0 W2D 0 0 W2E 0 0 W2F 0 0 W30 0 0 W31 0 0 W32 0 0 W33 0 0 W34 0 0 W35 0 0 W36 0 2 A0 r RFA A1A a A1A W37 0 2 A0 r R42 A1A a A1A 1 A0 r R1C4 "a22o2iSeq" R85 C4E 16 3 2 3 4 0 W3B 5 0 W1 W39 W38 W35 W36 0 C70 W0 5 0 W1 0 2 A0 r R0 AC l agg n 0 W2 0 2 A0 r RA0 AC l agg d 0 W3 0 2 A0 r R82 AC l agg d 0 W4 0 2 A0 r R83 AC l agg n 0 W5 0 2 A0 r R42 AC l agg n 0 4 A0 r R1C5 "symDriver" A13 r RA3 A10 lor 1 R88 A16 r R1C6 "SymDriver d=16" R44 2 W6 5 0 W1 W2 W3 W4 W5 W7 4 0 W1 W3 W2 W5 0 C52 W8 4 0 W1 W3 W4 W5 0 C1D W73 6 0 W1 W3A W27 W4E W38 W14 0 C71 W0 6 0 W1 0 1 A0 r R1C7 "Vdd" W2 0 1 A0 r R1C8 "Gnd" W3 16 1 A0 r R166 W4 0 0 W5 0 0 W6 0 0 W7 0 0 W8 0 0 W9 0 0 WA 0 0 WB 0 0 WC 0 0 WD 0 0 WE 0 0 WF 0 0 W10 0 0 W11 0 0 W12 0 0 W13 0 0 W14 16 1 A0 r R167 W15 0 0 W16 0 0 W17 0 0 W18 0 0 W19 0 0 W1A 0 0 W1B 0 0 W1C 0 0 W1D 0 0 W1E 0 0 W1F 0 0 W20 0 0 W21 0 0 W22 0 0 W23 0 0 W24 0 0 W25 0 1 A0 r R1C9 "COut" W26 0 1 A0 r R1CA "CIn" 2 A0 r R1CB "CLP16" A16 r R1CC "CounterCLG n=16" R44 15 W27 12 0 W1 W2 W3 W14 W25 W26 W28 2 0 W29 0 0 W2A 0 0 W2B 2 0 W2C 0 0 W2D 0 0 W2E 4 0 W2F 0 0 W30 0 0 W31 0 0 W32 0 0 W33 4 0 W34 0 0 W35 0 0 W36 0 0 W37 0 0 W38 8 0 W39 0 0 W3A 0 0 W3B 0 0 W3C 0 0 W3D 0 0 W3E 0 0 W3F 0 0 W40 0 0 W41 8 0 W42 0 0 W43 0 0 W44 0 0 W45 0 0 W46 0 0 W47 0 0 W48 0 0 W49 0 0 W4A 7 0 W1 W2 W2B W25 W28 W26 W2 0 C54 W4B 8 0 W1 W36 W31 W37 W2A W32 W2D W2 1 A0 r R1CD "1/2" C56 W4C 8 0 W1 W34 W2F W35 W29 W30 W2C W2 1 A0 r R1CE "0/2" C56 W4D 8 0 W1 W32 W48 W40 W37 W49 W3F W2 1 A0 r R1CF "3/4" C58 W4E 8 0 W1 W31 W46 W3E W36 W47 W3D W2 1 A0 r R1D0 "2/4" C58 W4F 8 0 W1 W30 W44 W3C W35 W45 W3B W2 1 A0 r R1D1 "1/4" C58 W50 8 0 W1 W2F W42 W3A W34 W43 W39 W2 1 A0 r R1D2 "0/4" C58 W51 8 0 W1 W23 W12 W24 W40 W13 W49 W2 1 A0 r R1D3 "7/8" C56 W52 8 0 W1 W21 W10 W22 W3F W11 W48 W2 1 A0 r R1D4 "6/8" C56 W53 8 0 W1 W1F WE W20 W3E WF W47 W2 1 A0 r R1D5 "5/8" C56 W54 8 0 W1 W1D WC W1E W3D WD W46 W2 1 A0 r R1D6 "4/8" C56 W55 8 0 W1 W1B WA W1C W3C WB W45 W2 1 A0 r R1D7 "3/8" C56 W56 8 0 W1 W19 W8 W1A W3B W9 W44 W2 1 A0 r R1D8 "2/8" C56 W57 8 0 W1 W17 W6 W18 W3A W7 W43 W2 1 A0 r R1D9 "1/8" C56 W58 8 0 W1 W15 W4 W16 W39 W5 W42 W2 1 A0 r R1DA "0/8" C56 W74 6 0 W1 W16 W4E W3C W5F W3A 0 C72 W0 6 0 W1 0 2 A0 r R0 A1A a A1A W2 16 1 A1B a A1B W3 0 0 W4 0 0 W5 0 0 W6 0 0 W7 0 0 W8 0 0 W9 0 0 WA 0 0 WB 0 0 WC 0 0 WD 0 0 WE 0 0 WF 0 0 W10 0 0 W11 0 0 W12 0 0 W13 16 3 A0 r RB4 A1B a A1B A1A a A1A W14 0 0 W15 0 0 W16 0 0 W17 0 0 W18 0 0 W19 0 0 W1A 0 0 W1B 0 0 W1C 0 0 W1D 0 0 W1E 0 0 W1F 0 0 W20 0 0 W21 0 0 W22 0 0 W23 0 0 W24 16 3 A0 r R68 A1B a A1B A1A a A1A W25 0 0 W26 0 0 W27 0 0 W28 0 0 W29 0 0 W2A 0 0 W2B 0 0 W2C 0 0 W2D 0 0 W2E 0 0 W2F 0 0 W30 0 0 W31 0 0 W32 0 0 W33 0 0 W34 0 0 W35 0 0 W36 0 2 A0 r R42 A1A a A1A 1 A0 r R84 R85 C5A 16 3 1 2 3 0 W75 4 0 W1 W4D W5F W3A 0 C51 W76 5 0 W1 W2 W4D W14 W3A 0 C57 W94 4 0 W1 W11 W17 W4C 0 C73 W0 4 0 W1 0 2 A0 r R0 A1A a A1A W2 5 3 A0 r R82 A1B a A1B A1A a A1A W3 0 0 W4 0 0 W5 0 0 W6 0 0 W7 0 0 W8 5 3 A0 r R83 A1B a A1B A1A a A1A W9 0 0 WA 0 0 WB 0 0 WC 0 0 WD 0 0 WE 0 2 A0 r R42 A1A a A1A 1 A0 r R84 R85 C30 5 2 1 2 0 W95 4 0 W1 WB W79 W4C 0 C30 W96 4 0 W1 WC W84 W4C 0 C30 W97 6 0 W1 W85 W7B W54 W79 W4C 0 C5D W98 10 0 W1 W3 W1 W1D W6F W4E W2 W76 W1 W4C 0 C74 W0 10 0 W1 0 2 A0 r R0 AC l agg n 0 W2 6 2 A0 r R142 AC ls agg n 0 W3 0 0 W4 0 0 W5 0 0 W6 0 0 W7 0 0 W8 0 0 W9 0 2 A0 r R145 AC l agg n 0 WA 0 2 A0 r R143 AC l agg n 0 WB 6 2 A0 r RBF AC ls agg d 0 WC 0 0 WD 0 0 WE 0 0 WF 0 0 W10 0 0 W11 0 0 W12 6 2 A0 r R144 AC ls agg d 0 W13 0 0 W14 0 0 W15 0 0 W16 0 0 W17 0 0 W18 0 0 W19 0 2 A0 r R141 AC l agg n 0 W1A 0 2 A0 r RC0 AC l agg d 0 W1B 0 2 A0 r R146 AC l agg n 0 W1C 0 2 A0 r R42 AC l agg n 0 4 A0 r R1DB "CounterUp" A13 r R148 A10 lor 1 R88 A16 r R1DC "CounterUp b=6" R44 6 W1D 15 0 W1 W1A W12 W19 W1E 6 0 W1F 0 0 W20 0 0 W21 0 0 W22 0 0 W23 0 0 W24 0 0 W25 0 1 A0 r R14A W26 0 0 WA WB W27 6 0 W28 0 0 W29 0 0 W2A 0 0 W2B 0 0 W2C 0 0 W2D 0 0 W9 W1B W2 W2E 6 0 W2F 0 0 W30 0 0 W31 0 0 W32 0 0 W33 0 0 W34 0 0 W1C W35 6 0 W1 W2E WB WA W12 W1C 0 C75 W0 6 0 W1 0 2 A0 r R0 AC l agg n 0 W2 6 2 A0 r R142 AC ls agg n 0 W3 0 0 W4 0 0 W5 0 0 W6 0 0 W7 0 0 W8 0 0 W9 6 2 A0 r R144 AC ls agg d 0 WA 0 0 WB 0 0 WC 0 0 WD 0 0 WE 0 0 WF 0 0 W10 0 2 A0 r R143 AC l agg n 0 W11 6 2 A0 r RBF AC ls agg d 0 W12 0 0 W13 0 0 W14 0 0 W15 0 0 W16 0 0 W17 0 0 W18 0 2 A0 r R42 AC l agg n 0 4 A0 r R14B A13 r R14C A10 lor 1 R88 A16 r R1DD "RegisterSimple b=6" R85 C4B 6 3 1 2 4 -1 W36 6 0 W1 W19 W2 W2E W27 W1C 0 C76 W0 6 0 W1 0 2 A0 r R0 AC l agg n 0 W2 0 2 A0 r R14F AC l agg n 0 W3 6 2 A0 r R150 AC ls agg n 0 W4 0 0 W5 0 0 W6 0 0 W7 0 0 W8 0 0 W9 0 0 WA 6 2 A0 r R151 AC ls agg d 0 WB 0 0 WC 0 0 WD 0 0 WE 0 0 WF 0 0 W10 0 0 W11 6 2 A0 r R152 AC ls agg n 0 W12 0 0 W13 0 0 W14 0 0 W15 0 0 W16 0 0 W17 0 0 W18 0 2 A0 r R42 AC l agg n 0 4 A0 r R1DE "invMux2b" A13 r R154 A10 lor 1 R88 A16 r R1DF "InvMux b=6" R44 2 W19 8 0 W1 WA W2 W3 W1A 0 1 A0 r R156 W11 W1B 0 1 A0 r R157 W18 W1C 7 0 W1 W1A WA W3 W11 W1B W18 0 C77 W0 7 0 W1 0 2 A0 r R0 A1A a A1A W2 0 2 A0 r R158 A1A a A1A W3 6 3 A0 r R68 A1B a A1B A1A a A1A W4 0 0 W5 0 0 W6 0 0 W7 0 0 W8 0 0 W9 0 0 WA 6 3 A0 r R101 A1B a A1B A1A a A1A WB 0 0 WC 0 0 WD 0 0 WE 0 0 WF 0 0 W10 0 0 W11 6 3 A0 r R159 A1B a A1B A1A a A1A W12 0 0 W13 0 0 W14 0 0 W15 0 0 W16 0 0 W17 0 0 W18 0 2 A0 r RFA A1A a A1A W19 0 2 A0 r R42 A1A a A1A 1 A0 r R1E0 "a22o2iSeq" R85 C4E 6 3 2 3 4 0 W1D 5 0 W1 W1B W1A W2 W18 0 C26 W37 6 0 W1 W1C W12 W1E W1A W1B 0 C78 W0 6 0 W1 0 1 A0 r R1E1 "Vdd" W2 0 1 A0 r R1E2 "Gnd" W3 6 1 A0 r R166 W4 0 0 W5 0 0 W6 0 0 W7 0 0 W8 0 0 W9 0 0 WA 6 1 A0 r R167 WB 0 0 WC 0 0 WD 0 0 WE 0 0 WF 0 0 W10 0 0 W11 0 1 A0 r R1E3 "COut" W12 0 1 A0 r R1E4 "CIn" 2 A0 r R1E5 "CLP6" A16 r R1E6 "CounterCLG n=6" R44 6 W13 10 0 W1 W2 W3 WA W11 W12 W14 2 0 W15 0 0 W16 0 0 W17 2 0 W18 0 0 W19 0 0 W1A 3 0 W1B 0 0 W1C 0 0 W1D 0 0 W1E 3 0 W1F 0 0 W20 0 0 W21 0 0 W22 7 0 W1 W17 W11 W12 W14 W1 W2 0 C79 W0 7 0 W1 0 1 A0 r R0 W2 2 1 A0 r R16D W3 0 0 W4 0 0 W5 0 1 A0 r R16E W6 0 1 A0 r R170 W7 2 1 A0 r R16F W8 0 0 W9 0 0 WA 0 1 A0 r R16C WB 0 1 A0 r R42 1 A0 r R1E7 "counterCLP2PL" R44 3 WC 7 0 W1 W2 W6 W5 W7 WA WB WD 4 0 W1 WA W4 WB 0 C8 WE 4 0 W1 W9 W3 WB 0 C8 WF 6 0 W1 W6 W8 W9 W5 WB 0 C7A W0 6 0 W1 0 2 A1A a A1A A0 r R0 W2 0 1 A0 r RB4 W3 0 1 A0 r R18A W4 0 1 A0 r RB5 W5 0 1 A0 r R82 W6 0 2 A1A a A1A A0 r R42 1 A0 r R1E8 "and3" R44 1 W7 4 0 W1 W8 3 2 A0 r R98 A1A a A1A W2 W4 W3 W5 W6 W9 4 0 W1 W6 W8 W5 0 C64 W23 6 0 W1 W16 W1D W21 W19 W2 1 A0 r R1E9 "1/2" C55 W24 8 0 W1 W15 W1F W1C W18 W20 W1B W2 1 A0 r R1EA "0/2" C58 W25 8 0 W1 WF W8 W10 W1D W9 W21 W2 1 A0 r R1EB "2/3" C56 W26 8 0 W1 WD W6 WE W1C W7 W20 W2 1 A0 r R1EC "1/3" C56 W27 8 0 W1 WB W4 WC W1B W5 W1F W2 1 A0 r R1ED "0/3" C56 W38 6 0 W1 WB W1E W27 W25 W1C 0 C7B W0 6 0 W1 0 2 A0 r R0 A1A a A1A W2 6 1 A1B a A1B W3 0 0 W4 0 0 W5 0 0 W6 0 0 W7 0 0 W8 0 0 W9 6 3 A0 r RB4 A1B a A1B A1A a A1A WA 0 0 WB 0 0 WC 0 0 WD 0 0 WE 0 0 WF 0 0 W10 6 3 A0 r R68 A1B a A1B A1A a A1A W11 0 0 W12 0 0 W13 0 0 W14 0 0 W15 0 0 W16 0 0 W17 0 0 W18 0 2 A0 r R42 A1A a A1A 1 A0 r R84 R85 C5A 6 3 1 2 3 0 W39 4 0 W1 W25 W26 W1C 0 C48 W3A 5 0 W1 W9 W26 W1B W1C 0 C57 W99 4 0 W1 WD W85 W4C 0 C30 W9A 6 0 W1 W17 W25 W56 W77 W4C 0 C7C W0 6 0 W1 0 2 A0 r R0 AC l agg n 0 W2 5 2 A0 r R151 AC ls agg d 0 W3 0 0 W4 0 0 W5 0 0 W6 0 0 W7 0 0 W8 0 2 A0 r R14F AC l agg n 0 W9 5 2 A0 r R152 AC ls agg n 0 WA 0 0 WB 0 0 WC 0 0 WD 0 0 WE 0 0 WF 5 2 A0 r R150 AC ls agg n 0 W10 0 0 W11 0 0 W12 0 0 W13 0 0 W14 0 0 W15 0 2 A0 r R42 AC l agg n 0 4 A0 r R1EE "invMux2b" A13 r R154 A10 lor 1 R88 A16 r R1EF "InvMux b=5" R44 2 W16 8 0 W1 W2 W9 WF W17 0 1 A0 r R156 W18 0 1 A0 r R157 W8 W15 W19 7 0 W1 W17 W2 WF W9 W18 W15 0 C7D W0 7 0 W1 0 2 A0 r R0 A1A a A1A W2 0 2 A0 r R158 A1A a A1A W3 5 3 A0 r R68 A1B a A1B A1A a A1A W4 0 0 W5 0 0 W6 0 0 W7 0 0 W8 0 0 W9 5 3 A0 r R101 A1B a A1B A1A a A1A WA 0 0 WB 0 0 WC 0 0 WD 0 0 WE 0 0 WF 5 3 A0 r R159 A1B a A1B A1A a A1A W10 0 0 W11 0 0 W12 0 0 W13 0 0 W14 0 0 W15 0 2 A0 r RFA A1A a A1A W16 0 2 A0 r R42 A1A a A1A 1 A0 r R1F0 "a22o2iSeq" R85 C4E 5 3 2 3 4 0 W1A 5 0 W1 W18 W17 W8 W15 0 C26 W9B 6 0 W1 W85 W7B W5D W84 W4C 0 C5D W9C 4 0 W1 WE W7B W4C 0 C30 W9D 4 0 W1 W54 W5D W4C 0 C8 W9E 4 0 W1 W43 W7C W4C 0 C30 W9F 5 0 W1 W85 W7B W7E W4C 0 C57 WA0 5 0 W1 W7C W26 W25 W4C 0 C7E W0 5 0 W1 0 3 A0 r R66 AB H AC l agg n 0 W2 0 4 A0 r R68 AD b agg e 0 AC l agg d 0 AE r R1F1 "(I-A*~I-B)+(~I-A*I-B)" W3 0 3 A0 r R9C AD b agg f 0 AC l agg n 0 W4 0 3 A0 r R9E AD b agg f 0 AC l agg n 0 W5 0 3 A0 r R6A AB L AC l agg n 0 9 AF r R6B A0 r R1F2 "xor2" A10 lor 2 R6D R6E A11 i 319488 A7 a A12 A13 r R6F A14 rb 1 A15 r R70 A16 r R1F3 "Xor2" R44 10 W6 9 0 W1 W7 0 0 W2 W8 0 0 W3 W9 0 0 W4 WA 0 0 W5 WB 4 0 W3 W2 W7 W1 0 C9 WC 4 0 W8 W7 W1 W1 0 C9 WD 3 0 W9 W4 W2 0 CB WE 4 0 W4 W2 W7 W1 0 C9 WF 3 0 W5 W3 W9 0 CB W10 3 0 W5 W8 W2 0 CB W11 4 0 W4 WA W1 W1 0 C9 W12 4 0 W3 W8 WA W1 0 C9 W13 3 0 W5 W3 W8 0 CB W14 3 0 W5 W4 W8 0 CB WA1 5 0 W1 W7E W86 W4E W4C 0 C7F W0 5 0 W1 0 2 A0 r R0 AC l agg n 0 W2 0 2 A0 r R197 AC l agg d 0 W3 6 2 A0 r R195 AC ls agg n 0 W4 0 0 W5 0 0 W6 0 0 W7 0 0 W8 0 0 W9 0 0 WA 6 2 A0 r R196 AC ls agg n 0 WB 0 0 WC 0 0 WD 0 0 WE 0 0 WF 0 0 W10 0 0 W11 0 2 A0 r R42 AC l agg n 0 4 A0 r R1F4 "comparator" A13 r R199 A10 lor 1 R88 A16 r R1F5 "Comparator b=6" R44 2 W12 6 0 W1 W2 W3 WA W13 6 0 W14 0 0 W15 0 0 W16 0 0 W17 0 0 W18 0 0 W19 0 0 W11 W1A 4 0 W1 W11 W13 W2 0 C80 W0 4 0 W1 0 1 A0 r R1F6 "Vdd" W2 0 1 A0 r R1F7 "Gnd" W3 6 1 A0 r R98 W4 0 0 W5 0 0 W6 0 0 W7 0 0 W8 0 0 W9 0 0 WA 0 1 A0 r R1F8 "X" 2 A0 r R1F9 "And6" A16 r R1FA "And n=6" R44 3 WB 9 0 W1 W2 W3 WA WC 0 1 A0 r R1FB "One" WD 0 1 A0 r R1FC "Two" WE 2 0 WC WD WF 3 0 W4 W5 W6 W10 3 0 W7 W8 W9 W11 4 0 W1 W2 WE WA 0 C11 W12 4 0 W1 W2 WF WC 0 C46 W13 4 0 W1 W2 W10 WD 0 C46 W1B 5 0 W1 W3 W13 WA W11 0 C81 W0 5 0 W1 0 2 A0 r R0 A1A a A1A W2 6 3 A0 r R9C A1B a A1B A1A a A1A W3 0 0 W4 0 0 W5 0 0 W6 0 0 W7 0 0 W8 0 0 W9 6 3 A0 r R68 A1B a A1B A1A a A1A WA 0 0 WB 0 0 WC 0 0 WD 0 0 WE 0 0 WF 0 0 W10 6 3 A0 r R9E A1B a A1B A1A a A1A W11 0 0 W12 0 0 W13 0 0 W14 0 0 W15 0 0 W16 0 0 W17 0 2 A0 r R42 A1A a A1A 1 A0 r R84 R85 C5B 6 3 1 2 3 0 WA2 6 0 W1 W1E W1D W55 W85 W4C 0 C34 WA3 3 0 W4C W1 W7D 0 C82 W0 3 0 W1 0 2 A0 r R1BB A5 a A6 W2 0 2 A0 r R1BC A5 a A6 W3 6 2 A0 r R1BD A5 a A6 W1 W1 W1 W1 W1 W1 1 A0 r R1BE R44 0 W0 WA4 4 0 W1 W1F W44 W4C 0 C73 WA5 6 0 W1 W44 W25 W57 W81 W4C 0 C7C WA6 10 0 W1 W7D W1 W1D W8B W86 W4B W7A W1 W4C 0 C74 WA7 4 0 W1 W10 W82 W4C 0 CE WA8 4 0 W1 WF W7F W4C 0 CE WA9 5 0 W1 W26 W83 W82 W4C 0 C20 WAA 5 0 W1 W26 W88 W7F W4C 0 C20 WAB 5 0 W1 W4B W87 W83 W4C 0 C20 WAC 5 0 W1 W4B W8A W88 W4C 0 C20 WAD 4 0 W1 W87 W8A W4C 0 C8 W131 18 0 W1 WF0 WDC W117 WEF W12B W118 W11E WCF W15 W1A W49 W119 W113 WCA W11C W116 WEA 0 C83 W0 18 0 W1 0 1 A0 r R0 W2 0 1 A0 r R49 W3 10 1 A0 r R40 W4 0 0 W5 0 0 W6 0 0 W7 0 0 W8 0 0 W9 0 0 WA 0 0 WB 0 0 WC 0 0 WD 0 0 WE 0 1 A0 r R52 WF 0 1 A0 r R48 W10 0 1 A0 r R5C W11 0 1 A0 r R53 W12 0 1 A0 r R59 W13 0 1 A0 r R35 W14 4 1 A0 r R6 W15 0 0 W16 0 0 W17 0 0 W18 0 0 W19 3 1 A0 r R7 W1A 0 0 W1B 0 0 W1C 0 0 W1D 7 1 A0 r R14 W1E 0 0 W1F 0 0 W20 0 0 W21 0 0 W22 0 0 W23 0 0 W24 0 0 W25 0 1 A0 r R54 W26 6 1 A0 r R4E W8 W9 WA WB WC WD W27 2 1 A0 r R32 W28 0 0 W29 0 0 W2A 0 1 A0 r R57 W2B 0 1 A0 r R51 W2C 0 1 A0 r R42 1 A0 r R1FD "DecompCtl" R44 30 W2D 45 0 W1 W2B W2E 3 0 W2A W2F 0 0 W30 0 0 W1D W31 0 0 W32 0 3 A0 r R1FE "NQ" A5 a A6 A1A a A1A W33 7 0 W34 0 0 W35 0 0 W36 0 0 W37 0 0 W38 0 0 W39 0 0 W3A 0 0 W3B 2 2 A0 r R8C A1A a A1A W3C 0 0 W3D 0 0 W3E 6 1 A5 a A6 W3F 0 0 W40 0 0 W41 0 0 W42 0 0 W43 0 0 W44 0 0 W45 6 0 W46 0 0 W47 0 0 W48 0 0 W49 0 0 W4A 0 0 W4B 0 0 W4C 0 0 W4D 6 2 A0 r R152 A1A a A1A W2C W2C W4 W5 W6 W7 W26 W4E 0 1 A0 r R1FF "CmdEnd" W4F 3 0 W50 0 0 W3C W3D W27 W51 0 3 A0 r R200 "carryOut" A5 a A6 A1A a A1A W52 6 2 A0 r R8D A1A a A1A W35 W36 W37 W38 W39 W3A WF W3 W53 0 0 W2 W54 0 3 A0 r RC0 A5 a A6 A1A a A1A W55 6 1 A0 r R201 "Length" W56 0 0 W57 0 0 W58 0 0 W59 0 0 W5A 0 0 W5B 0 0 W19 W10 W5C 2 0 W2F W30 W5D 0 0 WE W5E 3 2 A0 r R196 A1A a A1A W2C W5F 0 0 W60 0 0 W61 0 0 W62 0 0 W63 0 1 A0 r R202 "LengthEqOne" W64 0 0 W25 W13 W65 4 0 W4 W5 W6 W7 W14 W66 3 1 A5 a A6 W67 0 0 W68 0 0 W69 0 0 W6A 0 0 W6B 3 2 A0 r R142 A1A a A1A W6C 0 0 W2F W30 W12 W11 W6D 4 0 W6E 0 0 W6F 0 0 W70 0 0 W71 0 0 W2C W72 4 0 W1 W10 W1A W2C 0 C8 W73 6 0 W1 W25 W26 W55 W4D W2C 0 C76 W74 6 0 W1 W1B W5D W6A W11 W2C 0 C84 W0 6 0 W1 0 2 A1A a A1A A0 r R0 W2 0 1 A0 r R82 W3 0 1 A0 r R18A W4 0 1 A0 r RB5 W5 0 1 A0 r RB4 W6 0 2 A1A a A1A A0 r R42 1 A0 r R203 "nor3" R44 1 W7 4 0 W1 W2 W8 3 2 A0 r R98 A1A a A1A W5 W4 W3 W6 W9 4 0 W1 W6 W8 W2 0 C44 W75 5 0 W1 W64 W4E W31 W2C 0 C2B W76 6 0 W1 W1C W5D W6A W62 W2C 0 C84 W77 4 0 W1 W2C W65 W25 0 C42 W78 10 0 W1 W55 W1 W13 W3E W45 W12 W54 W1 W2C 0 C74 W79 4 0 W1 W11 W62 W2C 0 C8 W7A 4 0 W1 W2C W45 W31 0 C85 W0 4 0 W1 0 2 A0 r R204 "Vdd" AC l agg n 0 W2 0 2 A0 r R205 "Gnd" AC l agg n 0 W3 6 2 A0 r R206 "In" AC ls agg n 0 W4 0 0 W5 0 0 W6 0 0 W7 0 0 W8 0 0 W9 0 0 WA 0 2 A0 r R207 "out" AC l agg d 0 5 A0 r R208 "EqConstant" A1E value i 61 A13 r R209 "LogicEqConstant" A10 lor 1 R88 A16 r R20A "EqConstant b=6 v=61" R44 1 WB 6 0 W1 W2 W3 WA WC 1 0 W8 WD 5 0 W9 W7 W6 W5 W4 WE 5 0 W1 WD WA WC W2 0 C86 W0 5 0 W1 0 1 A0 r R0 W2 5 1 A0 r R20B "in1" W3 0 0 W4 0 0 W5 0 0 W6 0 0 W7 0 0 W8 0 1 A0 r R20C "out" W9 1 1 A0 r R20D "in0" WA 0 0 WB 0 1 A0 r R42 1 A0 r R20E "eqConstant2Inputs" R44 3 WC 7 0 W1 W8 WD 0 0 W2 WE 0 0 W9 WB WF 5 0 W1 WD W8 WE WB 0 C2B W10 4 0 W1 WB W2 WE 0 C87 W0 4 0 W1 0 1 A0 r R20F "Vdd" W2 0 1 A0 r R210 "Gnd" W3 5 1 A0 r R98 W4 0 0 W5 0 0 W6 0 0 W7 0 0 W8 0 0 W9 0 1 A0 r R211 "X" 2 A0 r R212 "And5" A16 r R213 "And n=5" R44 3 WA 9 0 W1 W2 W3 W9 WB 0 1 A0 r R214 "One" WC 0 1 A0 r R215 "Two" WD 2 0 WB WC WE 2 0 W4 W5 WF 3 0 W6 W7 W8 W10 4 0 W1 W2 WD W9 0 C11 W11 4 0 W1 W2 WE WB 0 C40 W12 4 0 W1 W2 WF WC 0 C46 W11 4 0 W1 WD W9 WB 0 C88 W0 4 0 W1 0 2 A1A a A1A A0 r R0 W2 0 1 A0 r R82 W3 1 1 A0 r R83 W4 0 0 W5 0 2 A1A a A1A A0 r R42 1 A0 r R216 "wrappedInv" R44 1 W6 4 0 W1 W3 W2 W5 W7 4 0 W1 W4 W2 W5 0 C8 W7B 4 0 W1 WF W64 W2C 0 C8 W7C 6 0 W1 W63 W4E W2B WE W2C 0 C89 W0 6 0 W1 0 2 A1A a A1A A0 r R0 W2 0 1 A0 r RB5 W3 0 1 A0 r R18A W4 0 1 A0 r RB4 W5 0 1 A0 r R82 W6 0 2 A1A a A1A A0 r R42 1 A0 r R217 "or3" R44 1 W7 4 0 W1 W8 3 2 A0 r R98 A1A a A1A W4 W2 W3 W5 W6 W9 4 0 W1 W6 W8 W5 0 C8A W0 4 0 W1 0 1 A0 r R218 "Vdd" W2 0 1 A0 r R219 "Gnd" W3 3 1 A0 r R98 W4 0 0 W5 0 0 W6 0 0 W7 0 1 A0 r R21A "X" 2 A0 r R21B "Or3" A16 r R21C "Or n=3" R44 1 W0 W8 6 0 W1 W4 W7 W5 W6 W2 0 C8B W0 6 0 W1 0 3 A0 r R66 AB H AC l agg n 0 W2 0 3 A0 r R9E AD b agg f 0 AC l agg n 0 W3 0 4 A0 r R68 AD b agg e 0 AC l agg d 0 AE r R21D "I-A + I-B + I-C" W4 0 3 A0 r R9C AD b agg f 0 AC l agg n 0 W5 0 3 A0 r R12E AD b agg f 0 AC l agg n 0 W6 0 3 A0 r R6A AB L AC l agg n 0 8 AF r R6B A10 lor 2 R6D R6E A11 i 266240 A7 a A12 A13 r R6F A14 rb 1 A0 r R21E "or3" A15 r R70 R44 7 W7 9 0 W1 W8 0 0 W9 0 0 W2 W5 W3 W4 WA 0 0 W6 WB 4 0 W2 W8 W1 W1 0 C9 WC 4 0 W4 W9 W8 W1 0 C9 WD 4 0 W1 WA W3 W6 0 C2E WE 4 0 W5 WA W9 W1 0 C9 WF 3 0 W6 W5 WA 0 CB W10 3 0 W6 W4 WA 0 CB W11 3 0 W6 W2 WA 0 CB W7D 5 0 W1 W28 W29 W10 W2C 0 C70 W7E 7 0 W1 W13 W32 WE W2B W12 W2C 0 C8C W0 7 0 W1 0 1 A0 r R0 W2 0 1 A0 r R143 W3 0 1 A0 r R1FE W4 0 1 A0 r R21F "D" W5 0 1 A0 r R220 "p" W6 0 1 A0 r R221 "Q" W7 0 1 A0 r R42 1 A0 r R222 "ffP" R44 2 W8 8 0 W1 W2 W3 W4 W5 W9 0 0 W6 W7 WA 6 0 W1 W9 W2 W3 W6 W7 0 C34 WB 5 0 W1 W5 W4 W9 W7 0 C20 W7F 5 0 W1 W6A W5D W10 W2C 0 C20 W80 7 0 W1 W4E W25 W6A W2 W63 W2C 0 C8D W0 7 0 W1 0 2 A1A a A1A A0 r R0 W2 0 1 A0 r R18C W3 0 1 A0 r RB5 W4 0 1 A0 r R82 W5 0 1 A0 r RB4 W6 0 1 A0 r R18A W7 0 2 A1A a A1A A0 r R42 1 A0 r R223 "nor4" R44 1 W8 4 0 W1 W9 4 2 A0 r R98 A1A a A1A W5 W3 W6 W2 W4 W7 WA 4 0 W1 W7 W9 W4 0 C42 W81 6 0 W1 W5D W4C W2A W2 W2C 0 C84 W82 4 0 W1 W33 W1D W2C 0 C8E W0 4 0 W1 0 2 A0 r R0 A1A a A1A W2 7 3 A0 r R83 A1B a A1B A1A a A1A W3 0 0 W4 0 0 W5 0 0 W6 0 0 W7 0 0 W8 0 0 W9 0 0 WA 7 3 A0 r R82 A1B a A1B A1A a A1A WB 0 0 WC 0 0 WD 0 0 WE 0 0 WF 0 0 W10 0 0 W11 0 0 W12 0 2 A0 r R42 A1A a A1A 1 A0 r R84 R85 C8F W0 4 0 W1 0 2 A0 r R0 AC l agg n 0 W2 0 2 A0 r R83 AC l agg n 0 W3 0 2 A0 r R82 AC l agg d 0 W4 0 2 A0 r R42 AC l agg n 0 4 A0 r R224 "driver4" A16 r R225 "Driver d=4" A10 lor 2 R88 R88 A13 r RAF R44 2 W5 5 0 W1 W2 W3 W6 0 0 W4 W7 4 0 W1 W6 W3 W4 0 C8 W8 4 0 W1 W2 W6 W4 0 C8 7 2 1 2 0 W83 5 0 W1 W2F W4C W30 W2C 0 C2B W84 4 0 W1 W6A W61 W2C 0 C8 W85 5 0 W1 W2C W2E W52 WE 0 C90 W0 5 0 W1 0 2 A0 r R226 "Vdd" AC l agg n 0 W2 0 2 A0 r R227 "Gnd" AC l agg n 0 W3 3 2 A0 r R8C AC ls agg n 0 W4 0 0 W5 0 0 W6 0 0 W7 6 2 A0 r R8D AC ls agg d 0 W8 0 0 W9 0 0 WA 0 0 WB 0 0 WC 0 0 WD 0 0 WE 0 2 A0 r R228 "Enable" AC l agg n 0 4 A0 r R229 "Decoder" A13 r R22A "LogicDecoder" A10 lor 1 R88 A16 r R22B "Decoder a=3 s=6" R44 3 WF 8 0 W1 W2 W3 W7 WE W10 3 1 A0 r R91 W11 0 0 W12 0 0 W13 0 0 W14 3 1 A0 r R92 W15 0 0 W16 0 0 W17 0 0 W18 0 1 A0 r R22C "nEn" W19 6 0 W1 W2 W10 W14 W7 W18 0 C91 W0 6 0 W1 0 1 A0 r R22D "Vdd" W2 0 1 A0 r R22E "Gnd" W3 3 1 A0 r R91 W4 0 0 W5 0 0 W6 0 0 W7 3 1 A0 r R92 W8 0 0 W9 0 0 WA 0 0 WB 6 1 A0 r R8D WC 0 0 WD 0 0 WE 0 0 WF 0 0 W10 0 0 W11 0 0 W12 0 1 A0 r R22F "nEn" 1 A0 r R230 "DecoderBody" R44 6 W13 12 0 W1 W2 W3 W7 WB W12 W14 4 0 W4 W9 W6 W12 W15 4 0 W4 W9 WA W12 W16 4 0 W8 W5 W6 W12 W17 4 0 W8 W5 WA W12 W18 4 0 W8 W9 W6 W12 W19 4 0 W8 W9 WA W12 W1A 4 0 W1 W2 W14 W11 0 C42 W1B 4 0 W1 W2 W15 W10 0 C42 W1C 4 0 W1 W2 W16 WF 0 C42 W1D 4 0 W1 W2 W17 WE 0 C42 W1E 4 0 W1 W2 W18 WD 0 C42 W1F 4 0 W1 W2 W19 WC 0 C42 W1A 4 0 W1 W18 WE W2 0 CE W1B 5 0 W1 W14 W10 W3 W2 0 C92 W0 5 0 W1 0 1 A0 r R0 W2 3 1 A0 r R82 W3 0 0 W4 0 0 W5 0 0 W6 3 1 A0 r RA0 W7 0 0 W8 0 0 W9 0 0 WA 3 1 A0 r R83 WB 0 0 WC 0 0 WD 0 0 WE 0 1 A0 r R42 0 R85 C26 3 3 3 2 1 -1 W86 4 0 W1 W6D W14 W2C 0 C93 W0 4 0 W1 0 2 A0 r R0 A1A a A1A W2 4 3 A0 r R83 A1B a A1B A1A a A1A W3 0 0 W4 0 0 W5 0 0 W6 0 0 W7 4 3 A0 r R82 A1B a A1B A1A a A1A W8 0 0 W9 0 0 WA 0 0 WB 0 0 WC 0 2 A0 r R42 A1A a A1A 1 A0 r R84 R85 C8F 4 2 1 2 0 W87 4 0 W1 W2C W55 W63 0 C94 W0 4 0 W1 0 2 A0 r R231 "Vdd" AC l agg n 0 W2 0 2 A0 r R232 "Gnd" AC l agg n 0 W3 6 2 A0 r R206 AC ls agg n 0 W4 0 0 W5 0 0 W6 0 0 W7 0 0 W8 0 0 W9 0 0 WA 0 2 A0 r R233 "out" AC l agg d 0 5 A0 r R208 A1E i 62 A13 r R209 A10 lor 1 R88 A16 r R234 "EqConstant b=6 v=62" R44 1 WB 6 0 W1 W2 W3 WA WC 1 0 W9 WD 5 0 W8 W7 W6 W5 W4 WE 5 0 W1 WD WA WC W2 0 C86 W88 4 0 W1 WE W34 W2C 0 C8 W89 4 0 W1 W2C W3B W6D 0 CF W8A 5 0 W1 W6C W10 W2A W2C 0 C7E W8B 8 0 W1 W6B W61 W66 W4F W2B W13 W2C 0 C95 W0 8 0 W1 0 2 A0 r R0 AC l agg n 0 W2 3 2 A0 r R142 AC ls agg n 0 W3 0 0 W4 0 0 W5 0 0 W6 0 2 A0 r R235 "en" AC l agg n 0 W7 3 2 A0 r RBF AC ls agg d 0 W8 0 0 W9 0 0 WA 0 0 WB 3 2 A0 r R144 AC ls agg d 0 WC 0 0 WD 0 0 WE 0 0 WF 0 2 A0 r R236 "r" AC l agg n 0 W10 0 2 A0 r R143 AC l agg n 0 W11 0 2 A0 r R42 AC l agg n 0 4 A0 r R237 "registerWithReset" A13 r R238 "LogicRegisterR" A10 lor 1 R88 A16 r R239 "RegisterR b=3" R44 3 W12 11 0 W1 W10 W2 W13 0 1 A0 r R157 WB W14 0 1 A0 r R156 WF W15 0 1 A0 r R23A "R" W6 W7 W11 W16 9 0 W1 WB W15 W13 W2 W7 W10 W14 W11 0 C96 W0 9 0 W1 0 2 A0 r R0 A1A a A1A W2 3 1 A1B a A1B W3 0 0 W4 0 0 W5 0 0 W6 0 2 A0 r RB5 A1A a A1A W7 0 2 A0 r R101 A1A a A1A W8 3 3 A0 r RFA A1B a A1B A1A a A1A W9 0 0 WA 0 0 WB 0 0 WC 3 3 A0 r RC2 A1B a A1B A1A a A1A WD 0 0 WE 0 0 WF 0 0 W10 0 2 A0 r RFB A1A a A1A W11 0 2 A0 r R158 A1A a A1A W12 0 2 A0 r R42 A1A a A1A 1 A0 r R23B "reg1BRSeq" R85 C97 W0 9 0 W1 0 1 A0 r R0 W2 0 0 W3 0 2 A0 r RB5 A1A a A1A W4 0 2 A0 r R101 A1A a A1A W5 0 2 A0 r RFA A1A a A1A W6 0 2 A0 r RC2 A1A a A1A W7 0 2 A0 r RFB A1A a A1A W8 0 2 A0 r R158 A1A a A1A W9 0 1 A0 r R42 1 A0 r R23C "reg1BitReset" R44 3 WA 11 0 W1 W6 W4 WB 0 0 W8 W7 W5 W2 W3 WC 0 0 W9 WD 6 0 W1 WB W7 W2 W6 W9 0 C34 WE 5 0 W1 WC W3 WB W9 0 C20 WF 7 0 W1 W8 WC W4 W2 W5 W9 0 C4E 3 3 1 4 5 0 W17 5 0 W1 W13 W6 W14 W11 0 C14 W18 4 0 W1 WF W15 W11 0 C8F W8C 4 0 W1 W2B W53 W2C 0 C8 W8D 7 0 W1 W2C W5E W2E W4F W51 W2C 0 C98 W0 7 0 W1 0 2 A0 r R0 AC l agg n 0 W2 0 2 A0 r R23D "carryIn" AC l agg n 0 W3 3 2 A0 r R196 AC ls agg n 0 W4 0 0 W5 0 0 W6 0 0 W7 3 2 A0 r R23E "Sum" AC ls agg d 0 W8 0 0 W9 0 0 WA 0 0 WB 3 2 A0 r R23F "B" AC ls agg n 0 WC 0 0 WD 0 0 WE 0 0 WF 0 2 A0 r R200 AC l agg d 0 W10 0 2 A0 r R42 AC l agg n 0 4 A0 r R240 "Adder" A13 r R241 "LogicAdder" A10 lor 1 R88 A16 r R242 "Adder b=3" R85 C99 W0 7 0 W1 0 1 A0 r R0 W2 0 1 A0 r R23D W3 0 1 A0 r R196 W4 0 1 A0 r R23E W5 0 1 A0 r R23F W6 0 1 A0 r R200 W7 0 1 A0 r R42 2 A0 r R243 "oneBitAdder" A16 r R244 "Adder b=1" R44 9 W8 14 0 W1 W3 W4 W6 W9 0 0 WA 0 0 WB 0 0 WC 0 0 WD 0 0 W2 W5 WE 0 0 WF 0 0 W7 W10 6 0 W1 WF WA WB W6 W7 0 C5D W11 7 0 W1 WC WE W4 WD W9 W7 0 C8D W12 5 0 W1 WB W5 WD W7 0 C20 W13 5 0 W1 WF W3 WE W7 0 C20 W14 5 0 W1 W2 WB W3 W7 0 C57 W15 5 0 W1 WA W2 W9 W7 0 C20 W16 5 0 W1 W2 WF W5 W7 0 C57 W17 6 0 W1 WC W3 W5 W2 W7 0 C84 W18 5 0 W1 W3 WA W5 W7 0 C57 3 3 2 4 3 -1 W8E 5 0 W1 W25 W5F W53 W2C 0 C2B W8F 5 0 W1 WE W60 W53 W2C 0 C2B W132 12 0 W1 W108 W2A W65 W87 W47 WCF W11B WEE W11A W2 WEA 0 C9A W0 12 0 W1 0 1 A0 r R0 W2 10 1 A0 r R4D W3 0 0 W4 0 0 W5 0 0 W6 0 0 W7 0 0 W8 0 0 W9 0 0 WA 0 0 WB 0 0 WC 0 0 WD 2 1 A0 r RA WE 0 0 WF 0 0 W10 4 1 A0 r R1C W11 0 0 W12 0 0 W13 0 0 W14 0 0 W15 0 1 A0 r R27 W16 0 1 A0 r R12 W17 0 1 A0 r R35 W18 0 1 A0 r R56 W19 0 1 A0 r R47 W1A 0 1 A0 r R55 W1B 4 1 A0 r R1 W1C 0 0 W1D 0 0 W1E 0 0 W1F 0 0 W20 0 1 A0 r R42 1 A0 r R245 "ERamAddGen" R44 11 W21 27 0 W1 W22 0 0 W23 0 0 W24 6 1 A5 a A6 W3 W4 W5 W6 W7 W8 W25 4 2 A0 r R142 A1A a A1A W20 W20 W20 W20 W1A W10 W26 4 2 A0 r R150 A1A a A1A W9 WA WB WC W27 4 3 A0 r RBF A5 a A6 A1A a A1A W28 0 0 W29 0 0 W2A 0 0 W2B 0 0 W2C 0 3 A0 r R221 A5 a A6 A1A a A1A W2D 0 0 W17 W18 W19 W2E 4 0 W2F 0 0 W30 0 0 W31 0 0 W32 0 0 W33 0 0 W2 W34 0 0 W1B W35 0 0 W36 0 1 A0 r R246 "RecordError" WD W37 4 0 W38 0 0 W39 0 0 W3A 0 0 W3B 0 0 W3C 0 1 A0 r R247 "LastError" W16 W15 W20 W3D 4 0 W1 W15 W2D W20 0 C30 W3E 5 0 W1 W36 W1A W2D W20 0 C20 W3F 5 0 W1 W1B W10 W37 W20 0 C9B W0 5 0 W1 0 2 A0 r R0 A1A a A1A W2 4 3 A0 r R82 A1B a A1B A1A a A1A W3 0 0 W4 0 0 W5 0 0 W6 0 0 W7 4 3 A0 r RA0 A1B a A1B A1A a A1A W8 0 0 W9 0 0 WA 0 0 WB 0 0 WC 4 3 A0 r R83 A1B a A1B A1A a A1A WD 0 0 WE 0 0 WF 0 0 W10 0 0 W11 0 2 A0 r R42 A1A a A1A 1 A0 r R84 R85 C26 4 3 1 2 3 0 W40 5 0 W1 W18 WE WF W20 0 C9C W0 5 0 W1 0 2 A0 r R0 AC l agg n 0 W2 0 2 A0 r R83 AC l agg n 0 W3 0 2 A0 r RA0 AC l agg d 0 W4 0 2 A0 r R82 AC l agg d 0 W5 0 2 A0 r R42 AC l agg n 0 4 A0 r R248 "symDriver" A13 r RA3 A10 lor 1 R88 A16 r R249 "SymDriver d=8" R44 2 W6 5 0 W1 W3 W2 W4 W5 W7 4 0 W1 W4 W3 W5 0 C1F W8 4 0 W1 W2 W4 W5 0 C5C W41 6 0 W1 W18 W37 W26 W2E W20 0 C9D W0 6 0 W1 0 2 A0 r R0 AC l agg n 0 W2 0 2 A0 r R14F AC l agg n 0 W3 4 2 A0 r R151 AC ls agg d 0 W4 0 0 W5 0 0 W6 0 0 W7 0 0 W8 4 2 A0 r R150 AC ls agg n 0 W9 0 0 WA 0 0 WB 0 0 WC 0 0 WD 4 2 A0 r R152 AC ls agg n 0 WE 0 0 WF 0 0 W10 0 0 W11 0 0 W12 0 2 A0 r R42 AC l agg n 0 4 A0 r R24A "invMux2b" A13 r R154 A10 lor 1 R88 A16 r R24B "InvMux b=4" R44 2 W13 8 0 W1 W3 W14 0 1 A0 r R156 W2 W8 WD W15 0 1 A0 r R157 W12 W16 7 0 W1 W14 W3 W8 WD W15 W12 0 C9E W0 7 0 W1 0 2 A0 r R0 A1A a A1A W2 0 2 A0 r R158 A1A a A1A W3 4 3 A0 r R68 A1B a A1B A1A a A1A W4 0 0 W5 0 0 W6 0 0 W7 0 0 W8 4 3 A0 r R101 A1B a A1B A1A a A1A W9 0 0 WA 0 0 WB 0 0 WC 0 0 WD 4 3 A0 r R159 A1B a A1B A1A a A1A WE 0 0 WF 0 0 W10 0 0 W11 0 0 W12 0 2 A0 r RFA A1A a A1A W13 0 2 A0 r R42 A1A a A1A 1 A0 r R24C "a22o2iSeq" R85 C4E 4 3 2 3 4 0 W17 5 0 W1 W15 W14 W2 W12 0 C26 W42 10 0 W1 W3C W25 W36 W27 W1 W19 W17 W2E W20 0 C9F W0 10 0 W1 0 2 A0 r R0 AC l agg n 0 W2 0 2 A0 r RC0 AC l agg d 0 W3 4 2 A0 r R142 AC ls agg n 0 W4 0 0 W5 0 0 W6 0 0 W7 0 0 W8 0 2 A0 r R145 AC l agg n 0 W9 4 2 A0 r RBF AC ls agg d 0 WA 0 0 WB 0 0 WC 0 0 WD 0 0 WE 0 2 A0 r R146 AC l agg n 0 WF 0 2 A0 r R141 AC l agg n 0 W10 0 2 A0 r R143 AC l agg n 0 W11 4 2 A0 r R144 AC ls agg d 0 W12 0 0 W13 0 0 W14 0 0 W15 0 0 W16 0 2 A0 r R42 AC l agg n 0 4 A0 r R24D "CounterUp" A13 r R148 A10 lor 1 R88 A16 r R24E "CounterUp b=4" R44 6 W17 15 0 W1 W18 0 0 W19 4 0 W1A 0 0 W1B 0 0 W1C 0 0 W1D 0 0 W1E 4 0 W1F 0 0 W20 0 0 W21 0 0 W22 0 0 W23 0 1 A0 r R14A WE W24 4 0 W25 0 0 W26 0 0 W27 0 0 W28 0 0 W11 W9 WF W3 W10 W8 W2 W16 W29 6 0 W1 W19 W9 W10 W11 W16 0 CA0 W0 6 0 W1 0 2 A0 r R0 AC l agg n 0 W2 4 2 A0 r R142 AC ls agg n 0 W3 0 0 W4 0 0 W5 0 0 W6 0 0 W7 4 2 A0 r R144 AC ls agg d 0 W8 0 0 W9 0 0 WA 0 0 WB 0 0 WC 0 2 A0 r R143 AC l agg n 0 WD 4 2 A0 r RBF AC ls agg d 0 WE 0 0 WF 0 0 W10 0 0 W11 0 0 W12 0 2 A0 r R42 AC l agg n 0 4 A0 r R14B A13 r R14C A10 lor 1 R88 A16 r R24F "RegisterSimple b=4" R85 C4B 4 3 1 2 4 -1 W2A 6 0 W1 WF W19 W3 W24 W16 0 C9D W2B 6 0 W1 W16 W11 W1E W2 WE 0 CA1 W0 6 0 W1 0 1 A0 r R250 "Vdd" W2 0 1 A0 r R251 "Gnd" W3 4 1 A0 r R166 W4 0 0 W5 0 0 W6 0 0 W7 0 0 W8 4 1 A0 r R167 W9 0 0 WA 0 0 WB 0 0 WC 0 0 WD 0 1 A0 r R252 "COut" WE 0 1 A0 r R253 "CIn" 2 A0 r R254 "CLP4" A16 r R255 "CounterCLG n=4" R44 3 WF 8 0 W1 W2 W3 W8 WD WE W10 2 0 W11 0 0 W12 0 0 W13 2 0 W14 0 0 W15 0 0 W16 7 0 W1 W2 W13 WD W10 WE W2 0 C54 W17 8 0 W1 WB W6 WC W12 W7 W15 W2 1 A0 r R256 "1/2" C56 W18 8 0 W1 W9 W4 WA W11 W5 W14 W2 1 A0 r R257 "0/2" C56 W2C 6 0 W1 W9 W1E W24 W23 W16 0 CA2 W0 6 0 W1 0 2 A0 r R0 A1A a A1A W2 4 1 A1B a A1B W3 0 0 W4 0 0 W5 0 0 W6 0 0 W7 4 3 A0 r RB4 A1B a A1B A1A a A1A W8 0 0 W9 0 0 WA 0 0 WB 0 0 WC 4 3 A0 r R68 A1B a A1B A1A a A1A WD 0 0 WE 0 0 WF 0 0 W10 0 0 W11 0 0 W12 0 2 A0 r R42 A1A a A1A 1 A0 r R84 R85 C5A 4 3 1 2 3 0 W2D 4 0 W1 W18 W23 W16 0 C8F W2E 5 0 W1 W8 W18 WE W16 0 C57 W43 5 0 W1 W23 W36 W34 W20 0 C2B W44 4 0 W1 W3C W22 W20 0 C8 W45 5 0 W1 W22 W16 W35 W20 0 C20 W46 8 0 W1 W19 W17 W35 W34 W33 W33 W20 0 CA3 W0 8 0 W1 0 1 A0 r R0 W2 0 1 A0 r R236 W3 0 1 A0 r R143 W4 0 1 A0 r R220 W5 0 1 A0 r R1FE W6 0 1 A0 r R221 W7 0 1 A0 r R21F W8 0 1 A0 r R42 1 A0 r R258 "ffRP" R44 3 W9 10 0 W1 WA 0 0 W5 W6 W2 WB 0 0 W7 W3 W4 W8 WC 6 0 W1 WA W3 W5 W6 W8 0 C34 WD 7 0 W1 W7 WA W4 WB WB W8 0 C4E WE 4 0 W1 W2 WB W8 0 C8 W47 7 0 W1 W17 W23 W16 W19 W2C W20 0 C8C W133 9 0 W1 W42 W9F W11B W2D W12C W57 W108 WEA 0 CA4 W0 9 0 W1 0 1 A0 r R0 W2 4 1 A0 r R11 W3 0 0 W4 0 0 W5 0 0 W6 0 0 W7 4 1 A0 r R2B W8 0 0 W9 0 0 WA 0 0 WB 0 0 WC 0 1 A0 r R56 WD 0 1 A0 r RB WE 0 1 A0 r R5D WF 4 1 A0 r R17 W10 0 0 W11 0 0 W12 0 0 W13 0 0 W14 10 1 A0 r R4D W15 0 0 W16 0 0 W17 0 0 W18 0 0 W19 0 0 W1A 0 0 W1B 0 0 W1C 0 0 W1D 0 0 W1E 0 0 W1F 0 1 A0 r R42 1 A0 r R259 "CRamAddGen" R44 3 W20 12 0 W1 W2 W7 W21 4 2 A0 r R150 A1A a A1A W1B W1C W1D W1E WE WC W22 6 1 A5 a A6 W15 W16 W17 W18 W19 W1A W14 W23 4 0 W24 0 0 W25 0 0 W26 0 0 W27 0 0 WF WD W1F W28 5 0 W1 WF W2 W23 W1F 0 CA5 W0 5 0 W1 0 2 A0 r R0 A1A a A1A W2 4 3 A0 r R82 A1B a A1B A1A a A1A W3 0 0 W4 0 0 W5 0 0 W6 0 0 W7 4 3 A0 r RA0 A1B a A1B A1A a A1A W8 0 0 W9 0 0 WA 0 0 WB 0 0 WC 4 3 A0 r R83 A1B a A1B A1A a A1A WD 0 0 WE 0 0 WF 0 0 W10 0 0 W11 0 2 A0 r R42 A1A a A1A 1 A0 r R84 R85 C26 4 3 1 2 3 0 W29 4 0 W1 WE WD W1F 0 C8F W2A 6 0 W1 WC W23 W21 W7 W1F 0 C9D W134 20 0 W1 W12A WD8 WD7 W11C WCF WDA W116 W114 W115 WD6 WF0 W12B WEE WEC W117 W12D W5C WEF WEA 0 CA6 W0 20 0 W1 0 1 A0 r R0 W2 0 1 A0 r R5B W3 0 1 A0 r R3C W4 0 1 A0 r R3B W5 0 1 A0 r R57 W6 0 1 A0 r R35 W7 0 1 A0 r R3E W8 0 1 A0 r R51 W9 0 1 A0 r R4F WA 0 1 A0 r R50 WB 0 1 A0 r R3A WC 0 1 A0 r R49 WD 0 1 A0 r R5C WE 0 2 A0 r R47 A5 a A6 WF 0 1 A0 r R45 W10 0 1 A0 r R52 W11 0 1 A0 r R5E W12 3 1 A0 r R18 W13 0 0 W14 0 0 W15 0 0 W16 0 1 A0 r R48 W17 0 1 A0 r R42 1 A0 r R25A "ResetGen" R44 23 W18 41 0 W1 W19 0 0 W1A 0 0 W12 W1B 0 1 A5 a A6 W1C 0 3 A0 r RFC A5 a A6 A1A a A1A W1D 0 1 A0 r R25B "nFrame" W1E 0 0 W7 W1F 0 1 A5 a A6 W20 0 1 A0 r R25C "Stop" W21 0 0 W6 W2 WB W22 0 0 W23 0 0 W24 0 0 W25 0 0 W26 0 0 W3 W27 0 0 W28 10 1 A5 a A6 W29 0 0 W2A 0 0 W2B 0 0 W2C 0 0 W2D 0 0 W2E 0 0 W2F 0 0 W30 0 0 W31 0 0 W32 0 0 W33 0 1 A0 r R25D "Frame" W34 0 1 A5 a A6 W35 10 2 A0 r R144 A1A a A1A WE W36 0 1 A5 a A6 W37 0 1 A5 a A6 W38 0 1 A5 a A6 W11 W16 W8 WC W9 WA W39 0 0 W4 W3A 0 1 A5 a A6 W3B 0 1 A5 a A6 W3C 0 0 W10 W3D 0 1 A5 a A6 W3E 10 2 A0 r R142 A1A a A1A W36 W37 W38 W11 W16 W8 WC W9 WA WF WD W3F 0 0 W40 0 0 W41 0 0 W5 W42 0 0 W17 W43 6 0 W1 W3E W35 W6 W28 W17 0 C4A W44 5 0 W1 W3C W16 W23 W17 0 C20 W45 4 0 W1 W11 W3C W17 0 C8 W46 4 0 W1 W13 W27 W17 0 C48 W47 4 0 W1 W14 W24 W17 0 C48 W48 5 0 W1 W33 W7 W27 W17 0 C20 W49 4 0 W1 W15 W7 W17 0 C48 W4A 5 0 W1 W1D W7 W24 W17 0 C20 W4B 5 0 W1 W7 W20 W40 W17 0 C67 W4C 4 0 W1 W3 WA W17 0 CE W4D 5 0 W1 W39 W41 W42 W17 0 C2B W4E 8 0 W1 W20 W6 W23 W1D W33 W33 W17 0 CA3 W4F 6 0 W1 W22 W6 W40 W1B W17 0 C34 W50 6 0 W1 W25 W6 W22 W34 W17 0 C34 W51 6 0 W1 W42 W6 W1C W39 W17 0 C34 W52 7 0 W1 W1F W1E W6 W25 W10 W17 0 CA7 W0 7 0 W1 0 1 A0 r R0 W2 0 1 A0 r RBF W3 0 1 A0 r R142 W4 0 1 A0 r R143 W5 0 1 A0 r R144 W6 0 1 A0 r R235 W7 0 1 A0 r R42 1 A0 r R25E "reg1" R44 2 W8 8 0 W1 W2 W3 W4 W9 0 0 W5 W6 W7 WA 8 0 W1 W9 W6 W3 W4 W2 W5 W7 0 CA8 W0 8 0 W1 0 2 A0 r R66 AC l agg n 0 W2 0 2 A0 r R25F "nEn" AC l agg n 0 W3 0 2 A0 r R260 "en" AC l agg n 0 W4 0 2 A0 r RFA AC l agg n 0 W5 0 2 A0 r RFB AC l agg n 0 W6 0 2 A0 r RC2 AC l agg d 0 W7 0 2 A0 r RFC AC l agg d 0 W8 0 2 A0 r R6A AC l agg n 0 8 AF r R6B A0 r R261 "ffEn" A11 i 798720 A7 a A12 A15 r R70 A13 r R262 "LogicFlipFlopEnable" A10 lor 1 RB1 A16 r R263 "FlipFlopEnable" R44 30 W9 21 0 W1 WA 0 0 W2 WB 0 0 W6 WC 0 1 A0 r R101 W7 WD 0 0 WE 0 0 WF 0 0 W4 W10 0 0 W11 0 0 W12 0 0 W13 0 1 A0 r R100 W3 W14 0 0 W15 0 1 A0 r R103 W16 0 1 A0 r R102 W5 W8 W17 4 0 W6 W7 W1 W1 0 C9 W18 3 0 W8 W6 W7 0 CB W19 4 0 W13 W6 W1 W1 0 C9 W1A 3 0 W8 W13 W6 0 CB W1B 4 0 W11 W1 W13 W1 0 CA9 W0 4 0 W1 0 1 A0 r R72 W2 0 1 A0 r R73 W3 0 1 A0 r R74 W4 0 1 A0 r R66 3 A1D dw A17 i 3 A18 i 4 R75 pE W1C 4 0 W16 WD W13 W1 0 C9 W1D 4 0 W16 W1 WC W1 0 C36 W1E 3 0 W11 W13 W8 0 CAA W0 3 0 W1 0 1 A0 r R72 W2 0 1 A0 r R73 W3 0 1 A0 r R74 3 A1D dw A17 i 3 A18 i 4 R75 nE W1F 4 0 W13 W1 W11 W1 0 CAB W0 4 0 W1 0 1 A0 r R72 W2 0 1 A0 r R73 W3 0 1 A0 r R74 W4 0 1 A0 r R66 3 A1D dw A17 i 3 A18 i 2 R75 pE W20 3 0 W13 WC W10 0 CB W21 4 0 W15 WD W1 W1 0 C9 W22 3 0 W16 WC W8 0 C39 W23 3 0 W13 W11 W8 0 CAC W0 3 0 W1 0 1 A0 r R72 W2 0 1 A0 r R73 W3 0 1 A0 r R74 3 A1D dw A17 i 3 A18 i 2 R75 nE W24 3 0 W8 W15 W10 0 CB W25 4 0 W5 W1 W16 W1 0 C36 W26 3 0 W5 W16 W8 0 C39 W27 4 0 WA W1 W15 W1 0 CAD W0 4 0 W1 0 1 A0 r R72 W2 0 1 A0 r R73 W3 0 1 A0 r R74 W4 0 1 A0 r R66 3 A1D dw A17 i 3 A18 i 4 R75 pE W28 4 0 W4 WB W1 W1 0 C9 W29 4 0 WC WF W15 W1 0 C9 W2A 3 0 WA W15 W8 0 CAE W0 3 0 W1 0 1 A0 r R72 W2 0 1 A0 r R73 W3 0 1 A0 r R74 3 A1D dw A17 i 3 A18 i 4 R75 nE W2B 4 0 W15 W1 WA W1 0 CAF W0 4 0 W1 0 1 A0 r R72 W2 0 1 A0 r R73 W3 0 1 A0 r R74 W4 0 1 A0 r R66 3 A1D dw A17 i 3 A18 i 2 R75 pE W2C 3 0 W15 W16 W12 0 CB W2D 4 0 W13 WF WB W1 0 C9 W2E 4 0 W3 WB W1 W1 0 C9 W2F 3 0 W15 WA W8 0 CB0 W0 3 0 W1 0 1 A0 r R72 W2 0 1 A0 r R73 W3 0 1 A0 r R74 3 A1D dw A17 i 3 A18 i 2 R75 nE W30 4 0 W2 WF WB W1 0 C9 W31 3 0 WE W13 W12 0 CB W32 3 0 W8 W2 WE 0 CB W33 3 0 W14 W4 W12 0 CB W34 3 0 W8 W3 W14 0 CB WB 4 0 W1 W6 W9 W7 0 C8 W53 6 0 W1 WB W6 W42 W3B W17 0 C34 W54 6 0 W1 W5 W26 W1A W1E W17 0 CB1 W0 6 0 W1 0 2 A1A a A1A A0 r R0 W2 0 1 A0 r R14F W3 0 1 A0 r R152 W4 0 1 A0 r R150 W5 0 1 A0 r R144 W6 0 2 A1A a A1A A0 r R42 1 A0 r R264 "mux21" R44 1 W7 5 0 W1 W8 1 0 W2 W5 W9 2 2 A0 r R265 "In" A1A a A1A W3 W4 W6 WA 5 0 W1 W9 W8 W5 W6 0 CB2 W0 5 0 W1 0 1 A0 r R0 W2 2 1 A0 r R265 W3 0 0 W4 0 0 W5 1 1 A0 r R14F W6 0 0 W7 0 1 A0 r R144 W8 0 1 A0 r R42 2 A0 r R266 "NormalizedMux21" A16 r R267 "MuxN1 n=2" R44 3 W9 7 0 W1 WA 0 0 W5 WB 0 0 W2 W7 W8 WC 4 0 W1 WA W7 W8 0 C8 WD 7 0 W1 W3 WA W4 WB W6 W8 0 C4E WE 4 0 W1 W6 WB W8 0 C8 W55 8 0 W1 W20 W6 W41 WF W19 W19 W17 0 CA3 W56 7 0 W1 W3D W1A W6 W26 WD W17 0 CA7 W57 7 0 W1 W3A W3F W6 W1A WD W17 0 CA7 W58 6 0 W1 W3F WA W4 W21 W17 0 C84 W59 4 0 W1 W2 W21 W17 0 C8 W135 43 0 W1 WED W73 WF2 WFD W108 W34 W60 WEC W70 W7 W47 W75 WF1 WD2 W11B W12B WDC W11A W11D W1F W61 WB5 W3A W6A W8 W117 W118 W11F W3D W12C W78 WD3 W8D WCE WBE W7E W65 WE WBF WA5 W1E WEA 0 CB3 W0 43 0 W1 0 1 A0 r R0 W2 0 1 A0 r R46 W3 0 1 A0 r R1F W4 10 1 A0 r R4B W5 0 0 W6 0 0 W7 0 0 W8 0 0 W9 0 0 WA 0 0 WB 0 0 WC 0 0 WD 0 0 WE 0 0 WF 10 1 A0 r R4C W10 0 0 W11 0 0 W12 0 0 W13 0 0 W14 0 0 W15 0 0 W16 0 0 W17 0 0 W18 0 0 W19 0 0 W1A 10 1 A0 r R4D W1B 0 0 W1C 0 0 W1D 0 0 W1E 0 0 W1F 0 0 W20 0 0 W21 0 0 W22 0 0 W23 0 0 W24 0 0 W25 0 1 A0 r RD W26 0 1 A0 r R19 W27 0 1 A0 r R45 W28 2 1 A0 r R1E W29 0 0 W2A 0 0 W2B 0 1 A0 r R2 W2C 0 1 A0 r R12 W2D 2 1 A0 r R21 W2E 0 0 W2F 0 0 W30 0 1 A0 r R4A W31 0 1 A0 r R38 W32 0 1 A0 r R56 W33 0 1 A0 r R5C W34 10 1 A0 r R40 W35 0 0 W36 0 0 W37 0 0 W38 0 0 W39 0 0 W3A 0 0 W3B 0 0 W3C 0 0 W3D 0 0 W3E 0 0 W3F 0 1 A0 r R55 W40 0 1 A0 r R58 W41 10 1 A0 r R9 W42 0 0 W43 0 0 W44 0 0 W45 0 0 W46 0 0 W47 0 0 W48 0 0 W49 0 0 W4A 0 0 W4B 0 0 W4C 0 1 A0 r R1A W4D 8 1 A0 r R2F W4E 0 0 W4F 0 0 W50 0 0 W51 0 0 W52 0 0 W53 0 0 W54 0 0 W55 0 0 W56 2 1 A0 r RF W57 0 0 W58 0 0 W59 5 1 A0 r R1D W5A 0 0 W5B 0 0 W5C 0 0 W5D 0 0 W5E 0 0 W5F 5 1 A0 r R3 W60 0 0 W61 0 0 W62 0 0 W63 0 0 W64 0 0 W65 0 1 A0 r R52 W66 0 1 A0 r R53 W67 10 1 A0 r R5A W68 0 0 W69 0 0 W6A 0 0 W6B 0 0 W6C 0 0 W6D 0 0 W6E 0 0 W6F 0 0 W70 0 0 W71 0 0 W72 4 1 A0 r R10 W73 0 0 W74 0 0 W75 0 0 W76 0 0 W77 0 1 A0 r R5D W78 4 1 A0 r R22 W79 0 0 W7A 0 0 W7B 0 0 W7C 0 0 W7D 2 1 A0 r R39 W7E 0 0 W7F 0 0 W80 0 1 A0 r R29 W81 0 1 A0 r R34 W82 0 1 A0 r R30 W83 2 1 A0 r R24 W84 0 0 W85 0 0 W86 4 1 A0 r R1C W87 0 0 W88 0 0 W89 0 0 W8A 0 0 W8B 0 1 A0 r R268 "nPChg" W8C 10 1 A0 r R31 W8D 0 0 W8E 0 0 W8F 0 0 W90 0 0 W91 0 0 W92 0 0 W93 0 0 W94 0 0 W95 0 0 W96 0 0 W97 10 1 A0 r R2D W98 0 0 W99 0 0 W9A 0 0 W9B 0 0 W9C 0 0 W9D 0 0 W9E 0 0 W9F 0 0 WA0 0 0 WA1 0 0 WA2 0 1 A0 r R8 WA3 0 1 A0 r R42 1 A0 r R269 "CBusInterface" R44 60 WA4 81 0 W1 WA5 10 0 W66 W32 WA6 0 0 WA7 0 0 WA8 0 0 WA9 0 0 W2 W30 W3F W77 WAA 4 0 WAB 0 0 WAC 0 0 WAD 0 0 WAE 0 0 W67 WAF 0 1 A0 r R26A "CWS" W4 W78 W2C WB0 4 0 WB1 0 0 WB2 0 0 WB3 0 0 WB4 0 0 WB5 0 0 W83 WB6 4 0 WB7 0 0 WB8 0 0 WB9 0 0 WBA 0 0 WBB 0 1 A0 r R26B "nCAS" WBC 0 0 WBD 0 0 WBE 0 0 WBF 0 0 W5F WC0 4 0 WC1 0 0 WC2 0 0 WC3 0 0 WC4 0 0 WC5 4 0 WC6 10 0 W87 W88 W89 W8A WC7 0 0 W33 W65 WA2 W82 W27 WF WC8 10 0 W5A W5B W5C W5D W5E W60 W61 W62 W63 W64 W34 W81 WC9 0 0 W2B WCA 0 1 A0 r R26C "PChg" WCB 0 1 A0 r R26D "SelPE" W59 W8C W40 WCC 4 0 WC1 WC2 WC3 WC4 W7D W2D WCD 0 1 A0 r R26E "WrDCtl" WCE 4 0 WCF 0 0 WD0 0 0 WD1 0 0 WD2 0 0 WD3 0 0 WD4 0 0 WD5 0 0 WD6 0 0 W72 WD7 0 1 A0 r R26F "CAS" W28 W31 WD8 0 0 WD9 0 1 A0 r R270 "SelDecomp" W3 W4C WDA 4 1 A0 r R271 "SelStatus" WDB 0 0 WDC 0 0 WDD 0 0 WDE 0 0 WDF 0 0 W1A W41 WE0 4 0 WE1 0 0 WE2 0 0 WE3 0 0 WE4 0 0 WE5 0 0 W4D WE6 0 1 A0 r R272 "CRS" WE7 3 2 A0 r R8C A1A a A1A WE8 0 0 WE9 0 0 WEA 0 0 W97 WEB 4 0 W48 W49 W4A W4B W86 W80 WEC 4 0 WED 0 1 A0 r R273 "Wr0" WEE 0 1 A0 r R274 "Wr1" WEF 0 1 A0 r R275 "Wr2" WF0 0 1 A0 r R276 "Wr3" WF1 4 0 WB7 WB8 WB9 WBA W8B WF2 4 0 WF3 0 0 WE8 WE9 WEA WF4 0 1 A0 r R277 "WriteCBus" WF5 5 0 W77 W3F W30 W2 W66 WF6 10 0 WF7 0 0 WF8 0 0 WF9 0 0 WFA 0 0 WFB 0 0 WFC 0 0 WFD 0 0 WFE 0 0 WFF 0 0 W100 0 0 W101 3 0 W42 W43 W44 W102 0 1 A0 r R278 "nCRS" W103 0 1 A0 r R279 "DrEnb" W104 0 0 W26 W25 W105 9 2 A0 r R8D A1A a A1A WC1 WC2 WC3 WC4 WB7 WB8 WB9 WBA W106 0 0 W107 3 0 W108 0 0 W109 0 0 W10A 0 0 W10B 0 0 W10C 0 1 A0 r R27A "nCWS" W56 W10D 0 0 W10E 0 0 W10F 8 0 W110 0 0 W111 0 0 W112 0 0 W113 0 0 W114 0 0 W115 0 0 W116 0 0 W117 0 0 W118 0 0 WA3 W119 5 0 W1 W29 W2A WA6 WA3 0 C26 W11A 5 0 W1 W7E W7F WA7 WA3 0 C26 W11B 5 0 W1 W84 W85 WA8 WA3 0 C26 W11C 5 0 W1 WA5 W41 WF0 WA3 0 CB4 W0 5 0 W1 0 2 A0 r R0 AC l agg n 0 W2 10 2 A0 r R144 AC ls agg d 0 W3 0 0 W4 0 0 W5 0 0 W6 0 0 W7 0 0 W8 0 0 W9 0 0 WA 0 0 WB 0 0 WC 0 0 WD 10 2 A0 r R142 AC ls agg n 0 WE 0 0 WF 0 0 W10 0 0 W11 0 0 W12 0 0 W13 0 0 W14 0 0 W15 0 0 W16 0 0 W17 0 0 W18 0 2 A0 r R143 AC l agg n 0 W19 0 2 A0 r R42 AC l agg n 0 4 A0 r R27B "Latch" A13 r R27C "LogicLatch" A10 lor 1 R88 A16 r R27D "Latch b=10" R85 CB5 W0 5 0 W1 0 2 A1A a A1A A0 r R0 W2 0 1 A0 r R144 W3 0 1 A0 r R142 W4 0 1 A0 r R143 W5 0 2 A1A a A1A A0 r R42 1 A0 r R27E "latch1B" R44 1 W6 5 0 W1 W4 W3 W2 W5 W7 5 0 W1 W2 W3 W4 W5 0 CB6 W0 5 0 W1 0 2 A0 r R66 AC l agg n 0 W2 0 2 A0 r RFC AC l agg d 0 W3 0 2 A0 r RFA AC l agg n 0 W4 0 2 A0 r R27F "S" AC l agg n 0 W5 0 2 A0 r R6A AC l agg n 0 8 AF r R6B A0 r R280 "dLatch" A11 i 479232 A7 a A12 A15 r R70 A13 r R281 "LogicDLatch" A10 lor 1 RB1 A16 r R282 "DLatch" R44 12 W6 10 0 W1 W7 0 0 W8 0 2 A1A a A1A A0 r R74 W4 W9 0 0 WA 0 0 WB 0 2 A1A a A1A A0 r R73 W2 W3 W5 WC 4 0 W9 W2 W1 W1 0 C9 WD 3 0 W5 W9 W2 0 CB WE 4 0 W4 W7 W1 W1 0 C9 WF 3 0 W5 W4 W7 0 CB W10 4 0 WA W1 W9 W1 0 CB7 W0 4 0 W1 0 1 A0 r R72 W2 0 1 A0 r R73 W3 0 1 A0 r R74 W4 0 1 A0 r R66 3 A1D dw A17 i 4 A18 i 2 R75 pE W11 3 0 WA W9 W5 0 CB8 W0 3 0 W1 0 1 A0 r R72 W2 0 1 A0 r R73 W3 0 1 A0 r R74 3 A1D dw A17 i 3 A18 i 3 R75 nE W12 4 0 W7 W8 W9 W1 0 C9 W13 4 0 W9 W1 WA W1 0 CB7 W14 3 0 W9 W4 WB 0 CB W15 4 0 W3 W8 W1 W1 0 C9 W16 3 0 W9 WA W5 0 CB8 W17 3 0 W5 W3 WB 0 CB 10 2 2 1 -1 W11D 5 0 W1 W57 W58 WA9 WA3 0 C26 W11E 5 0 W1 W2F W2E WD6 WA3 0 C26 W11F 5 0 W1 W1A W41 WEF WA3 0 CB4 W120 4 0 W1 WA3 WF5 WD6 0 CB9 W0 4 0 W1 0 1 A0 r R283 "Vdd" W2 0 1 A0 r R284 "Gnd" W3 5 1 A0 r R98 W4 0 0 W5 0 0 W6 0 0 W7 0 0 W8 0 0 W9 0 1 A0 r R285 "X" 2 A0 r R286 "Nor5" A16 r R287 "Nor n=5" R44 3 WA 9 0 W1 W2 W3 W9 WB 0 1 A0 r R288 "One" WC 0 1 A0 r R289 "Two" WD 2 0 WB WC WE 2 0 W4 W5 WF 3 0 W6 W7 W8 W10 4 0 W1 W2 WD W9 0 C11 W11 4 0 W1 W2 WE WB 0 C68 W12 4 0 W1 W2 WF WC 0 C8A W121 6 0 W1 WF6 W10D W118 W97 WA3 0 CBA W0 6 0 W1 0 2 A0 r R0 A1A a A1A W2 10 3 A0 r R67 A1B a A1B A1A a A1A W3 0 0 W4 0 0 W5 0 0 W6 0 0 W7 0 0 W8 0 0 W9 0 0 WA 0 0 WB 0 0 WC 0 0 WD 0 2 A0 r RB7 A1A a A1A WE 0 2 A0 r RB8 A1A a A1A WF 10 3 A0 r R68 A1B a A1B A1A a A1A W10 0 0 W11 0 0 W12 0 0 W13 0 0 W14 0 0 W15 0 0 W16 0 0 W17 0 0 W18 0 0 W19 0 0 W1A 0 2 A0 r R42 A1A a A1A 1 A0 r R28A "CBusTS" R85 C21 10 2 1 4 0 W122 5 0 W1 WBE W10D W118 WA3 0 C4F W123 5 0 W1 W67 W41 WEE WA3 0 CB4 W124 6 0 W1 WC5 WB0 WE0 WF6 WA3 0 CBB W0 6 0 W1 0 2 A0 r R0 A1A a A1A W2 4 3 A0 r R67 A1B a A1B A1A a A1A W3 10 0 W4 0 0 W5 0 0 W6 0 0 W7 0 0 W8 0 0 W9 0 0 WA 0 0 WB 0 0 WC 0 0 WD 0 0 WE 10 0 WF 0 0 W10 0 0 W11 0 0 W12 0 0 W13 0 0 W14 0 0 W15 0 0 W16 0 0 W17 0 0 W18 0 0 W19 10 0 W1A 0 0 W1B 0 0 W1C 0 0 W1D 0 0 W1E 0 0 W1F 0 0 W20 0 0 W21 0 0 W22 0 0 W23 0 0 W24 10 0 W25 0 0 W26 0 0 W27 0 0 W28 0 0 W29 0 0 W2A 0 0 W2B 0 0 W2C 0 0 W2D 0 0 W2E 0 0 W2F 4 3 A0 r RB7 A1B a A1B A1A a A1A W30 0 0 W31 0 0 W32 0 0 W33 0 0 W34 4 3 A0 r RB8 A1B a A1B A1A a A1A W35 0 0 W36 0 0 W37 0 0 W38 0 0 W39 10 2 A0 r R68 A1A a A1A W3A 0 0 W3B 0 0 W3C 0 0 W3D 0 0 W3E 0 0 W3F 0 0 W40 0 0 W41 0 0 W42 0 0 W43 0 0 W44 0 2 A0 r R42 A1A a A1A 1 A0 r R84 R85 CBC W0 6 0 W1 0 2 A0 r R0 A1A a A1A W2 10 3 A0 r R67 A1B a A1B A1A a A1A W3 0 0 W4 0 0 W5 0 0 W6 0 0 W7 0 0 W8 0 0 W9 0 0 WA 0 0 WB 0 0 WC 0 0 WD 0 2 A0 r RB7 A1A a A1A WE 0 2 A0 r RB8 A1A a A1A WF 10 3 A0 r R68 A1B a A1B A1A a A1A W10 0 0 W11 0 0 W12 0 0 W13 0 0 W14 0 0 W15 0 0 W16 0 0 W17 0 0 W18 0 0 W19 0 0 W1A 0 2 A0 r R42 A1A a A1A 1 A0 r R28A R85 C21 10 2 1 4 0 4 3 1 2 3 0 W125 4 0 W1 WA3 WDA WBE 0 C42 W126 5 0 W1 W40 W4B WCD WA3 0 CB6 W127 5 0 W1 WDA WE0 WB0 WA3 0 CBD W0 5 0 W1 0 2 A0 r R0 A1A a A1A W2 4 3 A0 r R83 A1B a A1B A1A a A1A W3 0 0 W4 0 0 W5 0 0 W6 0 0 W7 4 3 A0 r R82 A1B a A1B A1A a A1A W8 0 0 W9 0 0 WA 0 0 WB 0 0 WC 4 3 A0 r RA0 A1B a A1B A1A a A1A WD 0 0 WE 0 0 WF 0 0 W10 0 0 W11 0 2 A0 r R42 A1A a A1A 1 A0 r R84 R85 C4F 4 3 1 2 3 0 W128 5 0 W1 W4 W41 WED WA3 0 CB4 W129 4 0 W1 W2C WC7 WA3 0 C8 W12A 5 0 W1 WCC WEC WE5 WA3 0 CBE W0 5 0 W1 0 2 A0 r R0 A1A a A1A W2 4 3 A0 r RB5 A1B a A1B A1A a A1A W3 0 0 W4 0 0 W5 0 0 W6 0 0 W7 4 3 A0 r R82 A1B a A1B A1A a A1A W8 0 0 W9 0 0 WA 0 0 WB 0 0 WC 0 2 A0 r RB4 A1A a A1A WD 0 2 A0 r R42 A1A a A1A 1 A0 r R84 R85 C2B 4 2 1 2 0 W12B 5 0 W1 W81 WDF WD9 WA3 0 C2B W12C 4 0 W1 W72 WCE WA3 0 CBF W0 4 0 W1 0 2 A0 r R0 A1A a A1A W2 4 3 A0 r R82 A1B a A1B A1A a A1A W3 0 0 W4 0 0 W5 0 0 W6 0 0 W7 4 3 A0 r R83 A1B a A1B A1A a A1A W8 0 0 W9 0 0 WA 0 0 WB 0 0 WC 0 2 A0 r R42 A1A a A1A 1 A0 r R84 R85 C30 4 2 1 2 0 W12D 5 0 W1 WC0 WDA WDF WA3 0 CBE W12E 5 0 W1 WF4 WE5 WD9 WA3 0 C2B W12F 4 0 W1 W78 WAA WA3 0 CBF W130 5 0 W1 WF1 WCE WE5 WA3 0 CC0 W0 5 0 W1 0 2 A0 r R0 A1A a A1A W2 4 3 A0 r RB5 A1B a A1B A1A a A1A W3 0 0 W4 0 0 W5 0 0 W6 0 0 W7 4 3 A0 r R82 A1B a A1B A1A a A1A W8 0 0 W9 0 0 WA 0 0 WB 0 0 WC 0 2 A0 r RB4 A1A a A1A WD 0 2 A0 r R42 A1A a A1A 1 A0 r R84 R85 C57 4 2 1 2 0 W131 5 0 W1 WB6 WAA WDF WA3 0 CC0 W132 4 0 W1 WE6 W102 WA3 0 C8 W133 4 0 W1 WA3 WF2 W105 0 CC1 W0 4 0 W1 0 2 A0 r R28B "Vdd" AC l agg n 0 W2 0 2 A0 r R28C "Gnd" AC l agg n 0 W3 4 2 A0 r R8C AC ls agg n 0 W4 0 0 W5 0 0 W6 0 0 W7 0 0 W8 9 2 A0 r R8D AC ls agg d 0 W9 0 0 WA 0 0 WB 0 0 WC 0 0 WD 0 0 WE 0 0 WF 0 0 W10 0 0 W11 0 0 4 A0 r R8E A13 r R8F A10 lor 1 R88 A16 r R28D "DecoderS a=4 s=9" R44 2 W12 6 0 W1 W2 W3 W8 W13 4 1 A0 r R91 W14 0 0 W15 0 0 W16 0 0 W17 0 0 W18 4 1 A0 r R92 W19 0 0 W1A 0 0 W1B 0 0 W1C 0 0 W1D 5 0 W1 W2 W13 W18 W8 0 CC2 W0 5 0 W1 0 1 A0 r R28E "Vdd" W2 0 1 A0 r R28F "Gnd" W3 4 1 A0 r R91 W4 0 0 W5 0 0 W6 0 0 W7 0 0 W8 4 1 A0 r R92 W9 0 0 WA 0 0 WB 0 0 WC 0 0 WD 9 1 A0 r R8D WE 0 0 WF 0 0 W10 0 0 W11 0 0 W12 0 0 W13 0 0 W14 0 0 W15 0 0 W16 0 0 1 A0 r R95 R44 9 W17 14 0 W1 W2 W3 W8 WD W18 4 0 W4 WA WB WC W19 4 0 W9 W5 W6 W7 W1A 4 0 W9 W5 W6 WC W1B 4 0 W9 W5 WB W7 W1C 4 0 W9 W5 WB WC W1D 4 0 W9 WA W6 W7 W1E 4 0 W9 WA W6 WC W1F 4 0 W9 WA WB W7 W20 4 0 W9 WA WB WC W21 4 0 W1 W2 W18 W16 0 C42 W22 4 0 W1 W2 W19 W15 0 C42 W23 4 0 W1 W2 W1A W14 0 C42 W24 4 0 W1 W2 W1B W13 0 C42 W25 4 0 W1 W2 W1C W12 0 C42 W26 4 0 W1 W2 W1D W11 0 C42 W27 4 0 W1 W2 W1E W10 0 C42 W28 4 0 W1 W2 W1F WF 0 C42 W29 4 0 W1 W2 W20 WE 0 C42 W1E 5 0 W1 W3 W13 W18 W2 0 CC3 W0 5 0 W1 0 1 A0 r R0 W2 4 1 A0 r R83 W3 0 0 W4 0 0 W5 0 0 W6 0 0 W7 4 1 A0 r RA0 W8 0 0 W9 0 0 WA 0 0 WB 0 0 WC 4 1 A0 r R82 WD 0 0 WE 0 0 WF 0 0 W10 0 0 W11 0 1 A0 r R42 0 R85 C9C 4 3 1 2 3 -1 W134 4 0 W1 W10F W4D WA3 0 CC4 W0 4 0 W1 0 2 A0 r R0 A1A a A1A W2 8 3 A0 r R83 A1B a A1B A1A a A1A W3 0 0 W4 0 0 W5 0 0 W6 0 0 W7 0 0 W8 0 0 W9 0 0 WA 0 0 WB 8 3 A0 r R82 A1B a A1B A1A a A1A WC 0 0 WD 0 0 WE 0 0 WF 0 0 W10 0 0 W11 0 0 W12 0 0 W13 0 0 W14 0 2 A0 r R42 A1A a A1A 1 A0 r R84 R85 C5C 8 2 1 2 0 W135 5 0 W1 W106 WCD WE5 WA3 0 C2B W136 4 0 W1 WAF W10C WA3 0 C8 W137 8 0 W1 W81 W41 W8C W97 W103 W8B WA3 0 CC5 W0 8 0 W1 0 2 A0 r R0 A1A a A1A W2 0 2 A0 r R290 "Rcv" A1A a A1A W3 10 3 A0 r R291 "D" A1B a A1B A1A a A1A W4 0 0 W5 0 0 W6 0 0 W7 0 0 W8 0 0 W9 0 0 WA 0 0 WB 0 0 WC 0 0 WD 0 0 WE 10 3 A0 r R292 "nC" A1B a A1B A1A a A1A WF 0 0 W10 0 0 W11 0 0 W12 0 0 W13 0 0 W14 0 0 W15 0 0 W16 0 0 W17 0 0 W18 0 0 W19 10 3 A0 r R293 "C" A1B a A1B A1A a A1A W1A 0 0 W1B 0 0 W1C 0 0 W1D 0 0 W1E 0 0 W1F 0 0 W20 0 0 W21 0 0 W22 0 0 W23 0 0 W24 0 2 A0 r R294 "Dr" A1A a A1A W25 0 2 A0 r R268 A1A a A1A W26 0 2 A0 r R42 A1A a A1A 1 A0 r R295 "CBusDriverSeq" R85 CC6 W0 8 0 W1 0 1 A0 r R0 W2 0 1 A0 r R290 W3 0 1 A0 r R291 W4 0 1 A0 r R292 W5 0 1 A0 r R293 W6 0 1 A0 r R294 W7 0 1 A0 r R268 W8 0 1 A0 r R42 1 A0 r R296 "CBusDriver" R44 5 W9 8 0 W1 W6 W7 W4 W2 W3 W5 W8 WA 4 0 W1 W5 W7 W8 0 CC7 W0 4 0 W1 0 1 A0 r R66 W2 0 2 A0 r R68 AC l agg dw 0 W3 0 2 A0 r R67 AC l agg n 0 W4 0 2 A5 a A6 A0 r R6A 7 AF r R6B A0 r R297 "puw" A11 i 106496 A7 a A12 A15 r R70 A1F MintDiscardMe a A20 TRUE A16 r R298 "Tr2 type=$puw" R44 1 W5 4 0 W1 W2 W3 W4 W6 4 0 W3 W1 W2 W1 0 CC8 W0 4 0 W1 0 1 A0 r R72 W2 0 1 A0 r R73 W3 0 1 A0 r R74 W4 0 1 A0 r R66 3 A1D dw A17 i 3 A18 i 2 R75 pE WB 5 0 W1 W3 W5 W2 W8 0 CC9 W0 5 0 W1 0 1 A0 r R0 W2 0 1 A0 r R82 W3 0 1 A0 r R83 W4 0 1 A0 r R157 W5 0 1 A0 r R42 1 A0 r R299 "3BufferNI" R44 3 W6 7 0 W1 W4 W7 0 0 W2 W3 W8 0 0 W5 W9 4 0 W1 W4 W8 W5 0 C8 WA 6 0 W1 W7 W8 W4 W2 W5 0 C21 WB 4 0 W1 W3 W7 W5 0 C8 WC 4 0 W1 W4 W7 W8 0 CC7 WD 5 0 W1 W5 W3 W6 W8 0 CC9 WE 5 0 W1 W3 W6 W4 W8 0 CCA W0 5 0 W1 0 1 A0 r R0 W2 0 1 A0 r R29A "I" W3 0 1 A0 r R29B "EN" W4 0 1 A0 r R82 W5 0 1 A0 r R42 1 A0 r R29C "3BufferI" R44 2 W6 6 0 W1 W3 W2 W4 W7 0 0 W5 W8 4 0 W1 W3 W7 W5 0 C8 W9 6 0 W1 W2 W7 W3 W4 W5 0 C21 10 3 2 3 4 0 W138 4 0 W1 WD7 WBB WA3 0 C8 W139 5 0 W1 W31 WE6 W10E WA3 0 C2B W13A 4 0 W1 W8B WB5 WA3 0 C48 W13B 5 0 W1 WF2 WEB W25 WA3 0 CCB W0 5 0 W1 0 2 A0 r R0 AC l agg n 0 W2 4 2 A0 r R144 AC ls agg d 0 W3 0 0 W4 0 0 W5 0 0 W6 0 0 W7 4 2 A0 r R142 AC ls agg n 0 W8 0 0 W9 0 0 WA 0 0 WB 0 0 WC 0 2 A0 r R143 AC l agg n 0 WD 0 2 A0 r R42 AC l agg n 0 4 A0 r R27B A13 r R27C A10 lor 1 R88 A16 r R29D "Latch b=4" R85 CB5 4 2 2 1 -1 W13C 5 0 W1 W26 WAF W10E WA3 0 C2B W13D 4 0 W1 W8B WCA WA3 0 C8 W13E 4 0 W1 WB5 WBD WA3 0 C48 W13F 4 0 W1 W80 W10E WA3 0 C8 W140 5 0 W1 W25 WD7 W10E WA3 0 C2B W141 5 0 W1 WD4 WBD WD5 WA3 0 C57 W142 4 0 W1 W81 W2B WA3 0 CE W143 5 0 W1 WA3 WE7 W10F WCB 0 CCC W0 5 0 W1 0 2 A0 r R29E "Vdd" AC l agg n 0 W2 0 2 A0 r R29F "Gnd" AC l agg n 0 W3 3 2 A0 r R8C AC ls agg n 0 W4 0 0 W5 0 0 W6 0 0 W7 8 2 A0 r R8D AC ls agg d 0 W8 0 0 W9 0 0 WA 0 0 WB 0 0 WC 0 0 WD 0 0 WE 0 0 WF 0 0 W10 0 2 A0 r R2A0 "Enable" AC l agg n 0 4 A0 r R229 A13 r R22A A10 lor 1 R88 A16 r R2A1 "Decoder a=3 s=8" R44 3 W11 8 0 W1 W2 W3 W7 W10 W12 3 1 A0 r R91 W13 0 0 W14 0 0 W15 0 0 W16 3 1 A0 r R92 W17 0 0 W18 0 0 W19 0 0 W1A 0 1 A0 r R2A2 "nEn" W1B 6 0 W1 W2 W12 W16 W7 W1A 0 CCD W0 6 0 W1 0 1 A0 r R2A3 "Vdd" W2 0 1 A0 r R2A4 "Gnd" W3 3 1 A0 r R91 W4 0 0 W5 0 0 W6 0 0 W7 3 1 A0 r R92 W8 0 0 W9 0 0 WA 0 0 WB 8 1 A0 r R8D WC 0 0 WD 0 0 WE 0 0 WF 0 0 W10 0 0 W11 0 0 W12 0 0 W13 0 0 W14 0 1 A0 r R2A5 "nEn" 1 A0 r R230 R44 8 W15 14 0 W1 W2 W3 W7 WB W14 W16 4 0 W4 W5 W6 W14 W17 4 0 W4 W5 WA W14 W18 4 0 W4 W9 W6 W14 W19 4 0 W4 W9 WA W14 W1A 4 0 W8 W5 W6 W14 W1B 4 0 W8 W5 WA W14 W1C 4 0 W8 W9 W6 W14 W1D 4 0 W8 W9 WA W14 W1E 4 0 W1 W2 W16 W13 0 C42 W1F 4 0 W1 W2 W17 W12 0 C42 W20 4 0 W1 W2 W18 W11 0 C42 W21 4 0 W1 W2 W19 W10 0 C42 W22 4 0 W1 W2 W1A WF 0 C42 W23 4 0 W1 W2 W1B WE 0 C42 W24 4 0 W1 W2 W1C WD 0 C42 W25 4 0 W1 W2 W1D WC 0 C42 W1C 4 0 W1 W1A W10 W2 0 CE W1D 5 0 W1 W16 W12 W3 W2 0 CCE W0 5 0 W1 0 1 A0 r R0 W2 3 1 A0 r R82 W3 0 0 W4 0 0 W5 0 0 W6 3 1 A0 r RA0 W7 0 0 W8 0 0 W9 0 0 WA 3 1 A0 r R83 WB 0 0 WC 0 0 WD 0 0 WE 0 1 A0 r R42 0 R85 C26 3 3 3 2 1 -1 W144 6 0 W1 WD5 WD7 WAF WE6 WA3 0 C84 W145 6 0 W1 WD4 W3 WF4 W81 WA3 0 C84 W146 4 0 W1 W2B W104 WA3 0 CE W147 4 0 W1 WF4 WBF WA3 0 C48 W148 5 0 W1 WCA W102 W104 WA3 0 C20 W149 4 0 W1 W3 WC9 WA3 0 C1D W14A 4 0 W1 W103 WD8 WA3 0 CE W14B 6 0 W1 WBC W10A W109 WD9 WA3 0 C7A W14C 5 0 W1 WCA W10C WBF WA3 0 C20 W14D 4 0 W1 WD3 W4C WA3 0 C28 W14E 5 0 W1 W10B WCB WBC WA3 0 C2B W14F 5 0 W1 WCA WBB WC9 WA3 0 C20 W150 4 0 W1 W108 WBC WA3 0 C8 W151 5 0 W1 W3 WF4 WD8 WA3 0 C20 W152 5 0 W1 W81 WF4 WD3 WA3 0 C20 W153 5 0 W1 W10A W10B W109 WA3 0 C57 W154 5 0 W1 W107 W101 W25 WA3 0 CCF W0 5 0 W1 0 2 A0 r R0 AC l agg n 0 W2 3 2 A0 r R144 AC ls agg d 0 W3 0 0 W4 0 0 W5 0 0 W6 3 2 A0 r R142 AC ls agg n 0 W7 0 0 W8 0 0 W9 0 0 WA 0 2 A0 r R143 AC l agg n 0 WB 0 2 A0 r R42 AC l agg n 0 4 A0 r R27B A13 r R27C A10 lor 1 R88 A16 r R2A6 "Latch b=3" R85 CB5 3 2 2 1 -1