Introduction
We present an architecture for emulating digital VLSI designs and show how it compares to custom layout and a commercial programmable logic architecture.
The design process of this architecture enumerated existing designs and made the new architecture take equivalent space and time in O() notation as custom layout. Random logic, data paths and routing are the major divisions of these existing designs and so we split the study of the new architecture along these lines. Routing is easy to evaluate, data paths are evaluated by studying the regular structures and one dimensional interconnection of which they are composed, and random logic is evaluated through the utilization of an automatic place and route program.
For brevity we do not describe the many twists and turns the design went through during its development, but simply describe the result. The implementation of this architecture is discussed in some detail to alleviate concern that this is only a paper design. Finally, we compare the space and time costs of digital systems implemented with this architecture, custom integrated circuits, and Xilinx programmable gate arrays.