DIRECTORY CD, Rope; DesignRules: CEDAR DEFINITIONS = BEGIN Rules: TYPE = REF RulesRec; RulesRec: TYPE = RECORD [ id: ATOM, technology: CD.Technology, -- compatibility hack micronsPerLambdaValue: INT, micronsPerLambdaScale: INT, layers: LayerList _ NIL, holes: HoleTypeList _ NIL, mosTransistors: MOSTransistorTypeList _ NIL, values: RuleValueList _ NIL]; LayerList: TYPE = LIST OF Layer; Layer: TYPE = REF LayerRec; LayerRec: TYPE = RECORD [ id: ATOM, cifSymbol: Rope.ROPE, name: Rope.ROPE, description: Rope.ROPE, cdLayer: CD.Layer, -- compatibility hack implicitLayers: ImplicitLayerList _ NIL]; ImplicitLayerList: TYPE = LIST OF ImplicitLayer; ImplicitLayer: TYPE = REF ImplicitLayerRec; ImplicitLayerRec: TYPE = RECORD [ layer: Layer _ NIL, surround: RuleValue _ NIL]; HoleTypeList: TYPE = LIST OF HoleType; HoleType: TYPE = REF HoleTypeRec; HoleTypeRec: TYPE = RECORD [ id: ATOM _ NIL, layer1, layer2, cutLayer: Layer _ NIL, layer1Surround, layer2Surround: RuleValue _ NIL]; MOSTransistorTypeList: TYPE = LIST OF MOSTransistorType; MOSTransistorType: TYPE = REF MOSTransistorTypeRec; MOSTransistorTypeRec: TYPE = RECORD [ id: ATOM, gate, sourceDrain, bulk: Layer, gateExtension, sourceDrainExtension, bulkSurround: RuleValue]; RuleValueList: TYPE = LIST OF RuleValue; RuleValue: TYPE = REF RuleValueRec; RuleValueRec: TYPE = RECORD [ id: ATOM, type: RuleType, layer1, layer2: Layer, value: INT, scale: INT, name: Rope.ROPE, micronRule: BOOL]; RuleType: TYPE = {width, maxWidth, intraspace, interspace, surround, overlap, extension, special}; DesignRuleError: SIGNAL [msg: Rope.ROPE]; NewRules: PROC [id: ATOM, technology: CD.Technology, micronsPerLambdaValue: INT, micronsPerLambdaScale: INT _ 1] RETURNS [rules: Rules]; NewLayer: PROC [rules: Rules, id: ATOM, cifSymbol: Rope.ROPE, name: Rope.ROPE, description: Rope.ROPE, cdLayer: CD.Layer] RETURNS [layer: Layer]; NewImplicitLayer: PROC [rules: Rules, layer, implicit: Layer, surround: RuleValue]; NewHoleType: PROC [rules: Rules, id: ATOM, layer1, layer2, cutLayer: Layer, layer1SurroundRule, layer2SurroundRule: RuleValue]; NewMOSTransistorType: PROC [rules: Rules, id: ATOM, gate, sourceDrain, bulk: Layer, gateExtension, sourceDrainExtension, bulkSurround: RuleValue]; NewRule: PROC [rules: Rules, id: ATOM, type: RuleType, layer1, layer2: Layer, value: INT, name: Rope.ROPE, scale: INT _ 1]; NewMicronRule: PROC [rules: Rules, id: ATOM, type: RuleType, layer1, layer2: Layer, value: INT, name: Rope.ROPE, scale: INT _ 1]; FindRuleValue: PROC [rules: Rules, id: ATOM] RETURNS [ruleValue: RuleValue]; RegisterRuleSet: PROC [rules: Rules]; GetRuleSet: PROC [id: ATOM] RETURNS [rules: Rules]; CopyRuleSet: PROC [rules: Rules] RETURNS [newRules: Rules]; SetValue: PROC [rules: Rules, id: ATOM, value: INT, scale: INT _ 1]; FillInTemplate: PROC [rules: Rules, template: Rope.ROPE, filled: Rope.ROPE]; FetchRulesID: PROC [design: CD.Design] RETURNS [id: ATOM]; StoreRulesID: PROC [design: CD.Design, id: ATOM]; GetScaledValue: PROC [rules: Rules, id: ATOM] RETURNS [v: CD.Number, d: Rope.ROPE]; MinWidth: PROC [rules: Rules, layer: CD.Layer] RETURNS [w: CD.Number, d: Rope.ROPE]; MaxWidth: PROC [rules: Rules, layer: CD.Layer] RETURNS [w: CD.Number, d: Rope.ROPE]; MinSpace: PROC [rules: Rules, l1, l2: CD.Layer] RETURNS [s: CD.Number, d: Rope.ROPE]; Rectangle: PROC [rules: Rules, layer: CD.Layer, l: INT, w: INT _ 0, scale: INT _ 1] RETURNS [rectangle: CD.Object]; END. ¦DesignRules.mesa Copyright Ó 1987 by Xerox Corporation. All rights reserved. Barth, April 27, 1987 2:53:57 pm PDT gbb April 17, 1987 5:17:14 pm PDT Theory This interface defines the design rules of a process. Types and Errors Creation These procedures are merely sugar to assist in creating the data structure. The data structure passed to RegisterRuleSet may be computed in any fashion. However you should have a good reason to bypass these procedures since they provide some degree of insulation from changes. Create a new set of rules. Add a layer to the rule set. Add an implicit layer to the layer. Add a hole type to the rule set. Add a MOS transistor type to the rule set. Add a new lambda rule value to the rule set. Add a new micron rule value to the rule set. Operations Register a set of rules. Checks that the rule set id is new, that each id in the rule set is unique, and that every value can be scaled with the current of value of lamda in the technology and microns/lambda. Signals DesignRuleError if any condition is violated. Find a rule set in the global rule set name space. Overwrites the value. If id is not found or value cannot be scaled then signal DesignRuleError. Read the file specified by template. For each placeholder of the form $id look for id in rules and replace it by the value. Write the result on a file named filled. If some id is not found then signal DesignRuleError. Access All of the numbers declared in the database are multiplied by the number of ChipNDale units per lambda prior to returning them. In addition they are divided by microns per lambda if the rule is a micron rule. The use of CD layers is a compatibility hack. If id is not found or value cannot be scaled then signal DesignRuleError. d is the rule description. Returns zero if no minimum width specified for the layer. Signals DesignRuleError if the layer is not part of the technology of the rule set. d is the rule description. Returns zero if no maximum width specified for the layer. Signals DesignRuleError if the layer is not part of the technology of the rule set. d is the rule description. Returns zero if no minimum space specified for the layers. Signals DesignRuleError if either layer is not part of the technology of the rule set. d is the rule description. Object Construction Signals DesignRuleError if the layer is not part of the technology of the rule set or if the size violates the minimum width of the layer. w and l are both scaled by "scale". A minimum width rectangle is returned if w is zero. The following two procedures are not implemented yet because the interface to current ChipNDale technologies is much too technology dependent. Hole: PROC [rules: Rules, l1, l2: CD.Layer, l, w: INT _ 0, scale: INT _ 1] RETURNS [hole: CD.Object]; Returns minimum size hole if w and l are zero. Signals DesignRuleError if the layers cannot be connected by a hole, the size violates a minimum design rule, w or l cannot be scaled, or if either layer is not part of the technology of the rule set. w and l are both scaled by "scale". Object must be treated readonly. MOSTransistor: PROC [rules: Rules, l, w, a: INT _ 0, scale: INT _ 1] RETURNS [transistor: CD.Object]; Returns minimum size straight transistor if l, w, and a are zero. l is the channel length, w is the channel width of a straight transistor or the length of one arm (including the overlap of the other arm) of an angle transistor, a is additional channel width of the other arm of an angle transistor. If a is zero then a straight transistor is returned. Signals DesignRuleError if the requested size violates the design rules. w, l and a are all scaled by "scale". Object must be treated readonly. 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