PWRouteTestB.mesa
Copyright Ó 1985, 1986, 1987 by Xerox Corporation. All rights reversed.
Bryan Preas December 18, 1986 3:38:15 pm PST
Use with the file PWRouteTestB.dale to test routing:
CDCmosB
PWRoute.load
cdread PWRouteTest -- NOTE: PWRouteTest.dale must be in the /// directory
run PWRouteTest
middle click P in the ChipNDale viewer
select the appropriate generator
DIRECTORY CD, CDCells, PW, PWRoute, Rope, RTBasic;
PWRouteTestB:
CEDAR
PROGRAM
IMPORTS CD, CDCells, PW, PWRoute, Rope, RTBasic =
TestIFUA:
PW.GeneratorProc =
BEGIN
routerParams: PWRoute.RouterParams ← NEW[PWRoute.RouterParamsRec ← ["metal", "metal2", design.technology.key]];
left: CD.Object ← PW.Get[design, "IFUALeft"];
right: CD.Object ← PW.Get[design, "IFUARight"];
top: CD.Object ← NIL;
bottom: CD.Object ← PW.Get[design, "IFUABottom"];
test: CD.Object ← PWRoute.MakeChannel[bottom, top, left, right, NIL -- rect --, routerParams, FALSE, channel];
test: CD.Object ← PWRoute.AbutChRouteListY[LIST[bottom, top], LIST[left], LIST[right], routerParams];
RETURN[test];
END;
EUWireWidth: PWRoute.WireWidthProc ~ {
IF Rope.Equal[netName, "Vdd"] OR Rope.Equal[netName, "Gnd"] THEN wireWidth ← 736
ELSE wireWidth ← 32};
TestEURightChannel:
PW.GeneratorProc =
BEGIN
use design RightChannel.dale
routerParams: PWRoute.RouterParams ← NEW[PWRoute.RouterParamsRec ← [trunkLayer: "metal2", branchLayer: "metal", technologyKey: design.technology.key, wireWidthProc: EUWireWidth]];
left: CD.Object ← PW.Get[design, "EUALeft"];
right: CD.Object ← PW.Get[design, "EUARight"];
top: CD.Object ← PW.Get[design, "EUATop"];
bottom: CD.Object ← PW.Get[design, "EUABottom"];
test: CD.Object ← PWRoute.AbutChRouteListX[LIST[left, right], LIST[bottom], LIST[top], routerParams];
RETURN[test];
END;
TestEUControl:
PW.GeneratorProc =
BEGIN
use design EUControl.dale
routerParams: PWRoute.RouterParams ← NEW[PWRoute.RouterParamsRec ← [trunkLayer: "metal", branchLayer: "metal2", technologyKey: design.technology.key]];
left: CD.Object ← PW.Get[design, "EULeft"];
right: CD.Object ← PW.Get[design, "EURight"];
top: CD.Object ← PW.Get[design, "EUTop"];
bottom: CD.Object ← PW.Get[design, "EUBottom"];
test: CD.Object ← PWRoute.AbutChRouteListY[LIST[bottom, top], LIST[left], LIST[right], routerParams];
RETURN[test];
END;
TestSb2SidesB:
PW.GeneratorProc =
BEGIN
routerParams: PWRoute.RouterParams ← NEW[PWRoute.RouterParamsRec ← [trunkLayer: "metal", branchLayer: "metal2", signalSinglePinNets: TRUE]];
vertical: CD.Object ← PW.Get[design, "Vertical"];
horizontal: CD.Object ← PW.Get[design, "Horizontal"];
sb: CD.Object ← PWRoute.AbutSbRoute[NIL, vertical, horizontal, NIL, horizontal, routerParams];
row: CD.Object ← PW.AbutListX[LIST[sb, vertical]];
test: CD.Object ← CDCells.CreateEmptyCell[];
dy: INT ← RTBasic.IRSize[row].y;
[] ← CDCells.IncludeOb[cell: test, ob: horizontal, trans: [[0, dy], original]];
[] ← CDCells.IncludeOb[cell: test, ob: row, trans: [[0 , 0], original]];
RTBasic.RepositionCell[test];
RETURN[test];
END;
TestIFULeftColumn:
PW.GeneratorProc =
BEGIN
use design IFULeftColumn.dale
routerParams: PWRoute.RouterParams ← NEW[PWRoute.RouterParamsRec ← [trunkLayer: "metal2", branchLayer: "metal", technologyKey: design.technology.key, opt: noIncompletes]];
left: CD.Object ← PW.Get[design, "IFULtColumnLeft"];
right: CD.Object ← PW.Get[design, "IFULtColumnRight"];
bottom: CD.Object ← PW.Get[design, "IFULtColumnBottom"];
test: CD.Object ← PWRoute.AbutChRouteListX[LIST[left, right], LIST[bottom], NIL, routerParams];
RETURN[test];
END;
PW.RegisterGenerator[TestIFULeftColumn, "TestIFULeftColumn"];
PW.RegisterGenerator[TestEURightChannel, "TestEURightChannel"];
PW.RegisterGenerator[TestEUControl, "TestEUControl"];
PW.RegisterGenerator[TestIFUA, "TestIFUControl"];
PW.RegisterGenerator[TestSb2SidesB, "TestSb2SidesB"];
END.