<> <> <> <> <> <> DIRECTORY Core, CoreClasses, IO, Pipal, PipalConnect, PipalCore, RefTab; PipalSinix: CEDAR DEFINITIONS = BEGIN <> <> <> <> <> Mode: TYPE = REF ModeRec; layoutMode: Mode; <> schematicsMode: Mode; <> rawLayoutMode: Mode; <> <> Context: TYPE = REF; ExtractProc: TYPE = PROC [object: Pipal.Object, mode: Mode, context: Context _ NIL] RETURNS [result: REF, props: Core.Properties _ NIL]; <> <> <<- NIL. The object should be forgotten completely.>> <<- a Core.Wire. The returned wire is decorated with mode.decoration.portsProp. There might be a name. The returned wire is always copied by Sinix, so caching should not be feared... Dagness is considered. props must be NIL. >> <<- a LIST OF Core.Wire. The returned wires are decorated with mode.decoration.portsProp. There might be a name. The returned wire are always copied by Sinix, so caching should not be feared... Dagness is considered across returned wires. props must be NIL. >> <<- a Core.CellType. The returned cellType has its public decorated with mode.decoration. Returned props allows putting properties on CellInstances.>> <> Extract: ExtractProc; <> <> <> <<>> RegisterExtractProc: PROC [key: ATOM, extractProc: ExtractProc]; <> FetchExtractProc: PROC [key: ATOM] RETURNS [extractProc: ExtractProc _ NIL]; <> <<>> ExtractConnectized: ExtractProc; <> ExtractCellAsWire: ExtractProc; <> ExtractNull: ExtractProc; <> <> <> iconClass: Core.CellClass; CreateIcon: PROC [cellType: Core.CellType, name: Core.ROPE _ NIL, props: Core.Properties _ NIL] RETURNS [icon: Core.CellType]; <> <> <<>> InternalBug: SIGNAL []; <> CallerBug: SIGNAL []; <> FusionPropMismatch: SIGNAL [object: Pipal.Object, prop: ATOM, value1, value2: REF]; <