IMSTester.mesa
Copyright © 1985 by Xerox Corporation. All rights reserved.
Barth, December 3, 1985 12:38:36 pm PST
Gasbarro November 27, 1985 12:53:31 pm PST
Gunther, December 2, 1985 4:45:40 pm PST
Last Edited by: Gasbarro February 11, 1987 4:53:05 pm PST
DIRECTORY IO, Rope;
IMSTester: CEDAR DEFINITIONS = BEGIN
Theory
Note: This interface does not support all the functionality of the hardware. If you don't see it here and need it then ask for it.
This interface provides a procedural abstraction for the Integrated Measurement Systems Model 1000 test system.
Types
ROPE: TYPE = Rope.ROPE;
Delay: TYPE = [0..31000); --valid in 1nS increments
Width: TYPE = [20..31000); --valid in 10nS increments
Sample: TYPE = [0..31000); --valid in 1nS increments
Period: TYPE = [50..40000); --valid in 10nS increments
ForceGroups: TYPE = LIST OF ForceGroup;
ForceGroup: TYPE = REF ForceGroupRec;
ForceGroupRec: TYPE = RECORD [
name: ROPE,
podTimingGroups: PodTimingGroups,
format: FormatType,
delay: Delay, -- only if format is not NRZ, 0nS to 30.99uS, 1nS increments
width: Width, -- only if format is not NRZ or DNRZ, 20nS to 30.99uS, 10nS increments
programable: BOOL, -- indicates programable driver group
hiDrive: REAL, -- only if programable driver, +/-5 volt range, 10mV increments
loDrive: REAL]; -- only if programable driver, +/-5 volt range, 10mV increments
FormatType: TYPE = {NRZ, DNRZ, RZ, R1, RC, RI};
AcquireGroups: TYPE = LIST OF AcquireGroup;
AcquireGroup: TYPE = REF AcquireGroupRec;
AcquireGroupRec: TYPE = RECORD [
name: ROPE,
podTimingGroups: PodTimingGroups,
sample: Sample, -- 0nS to 30.99uS, 1nS increments
compare: BOOL, -- must have an adjacent pattern generator module
programable: BOOL, -- indicates programable receiver group
threshold: REAL]; -- only if programable receiver, +/-5 volt range, 10mV increments
PodTimingGroups: TYPE = LIST OF PodTimingGroup;
PodTimingGroup: TYPE = REF PodTimingGroupRec;
PodTimingGroupRec: TYPE = RECORD [
slot: SlotNumber,
board: Board,
podTiming: PodTiming,
pins: Pins];
SlotNumber: TYPE = [1..24]; -- Each module slot in the IMS mainframe is numbered 1 through 12, starting with the master and continuing up to a maximum of three slaves.
Board: TYPE = [0..16); -- Current number of purchased Force/Acquire board pairs.
PodTiming: TYPE = {A, B, AT, BT}; -- AT, BT must be RZ or R1
Pins: TYPE = LIST OF Pin;
Pin: TYPE = REF PinRec;
PinRec: TYPE = RECORD[
channel: Channel, --ignored if AT or BT
signalName: ROPE,
packagePin: NAT];
Channel: TYPE = [0..8);
Buffer: TYPE = REF BufferRec;
BufferRec: TYPE = RECORD[cycles: SEQUENCE cycle: Cycle OF CycleData];
Cycle: TYPE = [0..16*1024);
CycleData: TYPE = REF CycleDataRec;
CycleDataRec: TYPE = RECORD[eachCycle: ARRAY Board OF PACKED ARRAY PodChannel OF Data];
PodChannel: TYPE = [0..18); -- 0..7 = A0-A7, 8..15 = B0-B7, 16 = AT, 17 = BT
Data: TYPE = RECORD[
forceData: BOOL,
inhibit: BOOL,
compareData: BOOL,
mask: BOOL];
Jumps: TYPE = LIST OF Jump;
Jump: TYPE = RECORD [
source: Cycle,
destination: Cycle];
Errors: TYPE = LIST OF Error;
Error: TYPE = RECORD [
cycle: Cycle,
group: AcquireGroup,
podTimingGroup: PodTimingGroup,
pin: Pin,
expected: BOOL,
acquired: BOOL];
Globals
checkSyntax: BOOL;
If TRUE the text that would normally be sent to the IMS is dumped into the file IMSTester.log.
Operations
IMSError: SIGNAL [msg: ROPE];
RunDiagnostics: PROC [extended: BOOLTRUE];
If extended is true then the state of the IMS memory is lost.
Initialize: PROC [wDir: ROPE] RETURNS [forceBoard, acquireBoard, programable: PACKED ARRAY SlotNumber OF BOOLEAN];
Forces the IMS to its power up state. Interrrogates the IMS to determine the slot number, type, and characteristics of each module plugged into the system.
DefineGroups: PROC [forceGroups: ForceGroups ← NIL, acquireGroups: AcquireGroups ← NIL];
Executes Resource, Format, HiDrive, LoDrive, Polarity, Radix, Sample, and Threshold commands. The polarity is always set to POS. The radix is always set to binary. DO NOT REORDER THE GROUPS OR THE POD TIMING GROUPS AFTER CALLING THIS PROCEDURE!
RedefineGroups: PROC [forceGroups: ForceGroups ← NIL, acquireGroups: AcquireGroups ← NIL];
Executes Format, HiDrive, LoDrive, Sample, and Threshold commands, but NOT Resource. Used to modify drive parameters after group has already been defined.
SetCyclePeriod: PROC [period: Period];
SetIMSMemory: PROC [forceGroups: ForceGroups, acquireGroups: AcquireGroups, buffer: Buffer, cycles: Cycle, start: Cycle, halt: Cycle, jumps: Jumps ← NIL];
Transfers stimulus from force and inhibit buffers to IMS. Set the halt instruction and any jump instructions.
ErrorCount: PROC [] RETURNS [count: LONG CARDINAL];
A fast operation to determine the number of errors.
GetErrors: PROC [acquireGroups: AcquireGroups, buffer: Buffer, testStart, testEnd, startCycle, cyclesJumped: Cycle] RETURNS [errors: Errors];
Looks for errors between startCycle and testEnd. Reports list of failing bits.
GetRawErrors: PROC [out: IO.STREAM, forceGroups: ForceGroups, acquireGroups: AcquireGroups, testEnd, startCycle, cyclesJumped: Cycle] RETURNS [valid: BOOL, errorCycle: Cycle ← 0];
Looks for errors between startCycle and testEnd. The format is the raw binary format returned by the IMS "mem? <cycle>" command.
GetMemory: PROC [out: IO.STREAM, cycle: Cycle, forceGroups: ForceGroups, acquireGroups: AcquireGroups, cyclesJumped: Cycle];
Gets the contents of the specified cycle of IMS memory. The format is the raw binary format returned by the IMS "mem? <cycle>" command.
Upload: PROC [fName: ROPE];
Saves all of the current state of the tester in binary form on the named file.
Download: PROC [fName: ROPE];
Restores the tester to the state specified by the contents of the named file.
Start: PROC; -- starts the tester running at location zero
Stop: PROC; -- forces any running test to halt
Wait: PROC; -- waits for HALT instruction to be executed by the IMS
Abort: PROC; -- Aborts the current IMS operation
END.