DIRECTORY Ports, Rope, Rosemary; DPRosemary: CEDAR PROGRAM IMPORTS Ports, Rosemary = BEGIN DPEdgeFFName: Rope.ROPE = Rosemary.Register[roseClassName: "DP.DPEdgeFF.schSeq", init: DPEdgeFFSeqInit, evalSimple: DPEdgeFFSeqSimple, scheduleIfClockEval: TRUE]; DPEdgeFFSeqState: TYPE = REF DPEdgeFFSeqStateRec; DPEdgeFFSeqStateRec: TYPE = RECORD [ in, out, ck: Ports.Port _ NIL, master, slave: Ports.LevelSequence]; DPEdgeFFSeqInit: Rosemary.InitProc = { state: DPEdgeFFSeqState; IF oldStateAny=NIL THEN { size: NAT _ p[Ports.PortIndex[cellType.public, "D"]].ls.size; state _ NEW[DPEdgeFFSeqStateRec]; state.master _ NEW[Ports.LevelSequenceRec[size]]; state.slave _ NEW[Ports.LevelSequenceRec[size]]; } ELSE state _ NARROW[oldStateAny]; state.ck _ p[Ports.PortIndex[cellType.public, "CK"]]; state.in _ p[Ports.PortIndex[cellType.public, "D"]]; state.out _ p[Ports.PortIndex[cellType.public, "Q"]]; state.out.d _ drive; Ports.SetLS[state.master, X]; Ports.SetLS[state.slave, X]; Ports.SetLS[state.out.ls, X]; stateAny _ state; }; DPEdgeFFSeqSimple: Rosemary.EvalProc = { state: DPEdgeFFSeqState _ NARROW[stateAny]; IF ~clockEval THEN { SELECT state.ck.l FROM L => Ports.CopyLS[from: state.in.ls, to: state.master]; H => Ports.CopyLS[from: state.master, to: state.slave]; ENDCASE => { IF state.slave#state.master THEN Ports.SetLS[state.slave, X]; IF state.master#state.in.ls THEN Ports.SetLS[state.master, X]; }; }; Ports.CopyLS[from: state.slave, to: state.out.ls]; }; DPTSLatchName: Rope.ROPE = Rosemary.Register[roseClassName: "DP.DPTSLatch.schSeq", init: DPTSLatchSeqInit, evalSimple: DPTSLatchSeqSimple, scheduleIfClockEval: TRUE]; DPTSLatchSeqState: TYPE = REF DPTSLatchSeqStateRec; DPTSLatchSeqStateRec: TYPE = RECORD [ in, out, ck, en, dis: Ports.Port _ NIL, slave: Ports.LevelSequence ]; DPTSLatchSeqInit: Rosemary.InitProc = { state: DPTSLatchSeqState; IF oldStateAny=NIL THEN { size: NAT _ p[Ports.PortIndex[cellType.public, "D"]].ls.size; state _ NEW[DPTSLatchSeqStateRec]; state.slave _ NEW[Ports.LevelSequenceRec[size]]; } ELSE state _ NARROW[oldStateAny]; state.ck _ p[Ports.PortIndex[cellType.public, "CK"]]; state.in _ p[Ports.PortIndex[cellType.public, "D"]]; state.out _ p[Ports.PortIndex[cellType.public, "Q"]]; state.en _ p[Ports.PortIndex[cellType.public, "en"]]; state.dis _ p[Ports.PortIndex[cellType.public, "dis"]]; state.out.d _ drive; Ports.SetLS[state.out.ls, X]; Ports.SetLS[state.slave, X]; stateAny _ state; }; DPTSLatchSeqSimple: Rosemary.EvalProc = { state: DPTSLatchSeqState _ NARROW[stateAny]; IF ~clockEval THEN {IF state.ck.l=H THEN Ports.CopyLS[from: state.in.ls, to: state.slave]}; IF state.en.l=H AND state.dis.l=L THEN { state.out.d _ drive; Ports.CopyLS[from: state.slave, to: state.out.ls]} ELSE state.out.d _ none; }; DPNOr3Name: Rope.ROPE = Rosemary.Register[roseClassName: "DP.DPNOr3.schSeq", init: DPNOr3SeqInit, evalSimple: DPNOr3SeqSimple]; DPNOr3SeqState: TYPE = REF DPNOr3SeqStateRec; DPNOr3SeqStateRec: TYPE = RECORD [ in0, in1, in2, out: Ports.Port]; DPNOr3SeqInit: Rosemary.InitProc = { state: DPNOr3SeqState _ IF oldStateAny=NIL THEN NEW[DPNOr3SeqStateRec] ELSE NARROW[oldStateAny]; state.in0 _ p[Ports.PortIndex[cellType.public, "in0"]]; state.in1 _ p[Ports.PortIndex[cellType.public, "in1"]]; state.in2 _ p[Ports.PortIndex[cellType.public, "in2"]]; state.out _ p[Ports.PortIndex[cellType.public, "out0"]]; state.out.d _ drive; stateAny _ state; }; DPNOr3SeqSimple: Rosemary.EvalProc = { state: DPNOr3SeqState _ NARROW[stateAny]; FOR index: NAT IN [0..state.in0.ls.size) DO state.out.ls[index] _ SELECT TRUE FROM state.in0.ls[index]=H OR state.in1.ls[index]=H OR state.in2.ls[index]=H => L, state.in0.ls[index]=X OR state.in1.ls[index]=X OR state.in2.ls[index]=X => X, ENDCASE => H; ENDLOOP; }; DPXOrName: Rope.ROPE = Rosemary.Register[roseClassName: "DP.DPXOr.schSeq", init: DPXOrSeqInit, evalSimple: DPXOrSeqSimple]; DPXOrTopName: Rope.ROPE = Rosemary.Register[roseClassName: "DP.DPXOrTop.schSeq", init: DPXOrSeqInit, evalSimple: DPXOrSeqSimple]; DPXOrBotName: Rope.ROPE = Rosemary.Register[roseClassName: "DP.DPXOrBot.schSeq", init: DPXOrSeqInit, evalSimple: DPXOrSeqSimple]; DPXOrSeqState: TYPE = REF DPXOrSeqStateRec; DPXOrSeqStateRec: TYPE = RECORD [ in0, in1, out: Ports.Port]; DPXOrSeqInit: Rosemary.InitProc = { state: DPXOrSeqState _ IF oldStateAny=NIL THEN NEW[DPXOrSeqStateRec] ELSE NARROW[oldStateAny]; state.in0 _ p[Ports.PortIndex[cellType.public, "in0"]]; state.in1 _ p[Ports.PortIndex[cellType.public, "in1"]]; state.out _ p[Ports.PortIndex[cellType.public, "out0"]]; state.out.d _ drive; stateAny _ state; }; DPXOrSeqSimple: Rosemary.EvalProc = { state: DPXOrSeqState _ NARROW[stateAny]; FOR index: NAT IN [0..state.in0.ls.size) DO state.out.ls[index] _ SELECT TRUE FROM state.in0.ls[index]=X OR state.in1.ls[index]=X => X, state.in0.ls[index] = state.in1.ls[index] => L, ENDCASE => H; ENDLOOP; }; DPInvName: Rope.ROPE = Rosemary.Register[roseClassName: "DP.DPInv.schSeq", init: DPInvSeqInit, evalSimple: DPInvSeqSimple]; DPInvDrName: Rope.ROPE = Rosemary.Register[roseClassName: "DP.DPInvDr.schSeq", init: DPInvSeqInit, evalSimple: DPInvSeqSimple]; DPInvSeqState: TYPE = REF DPInvSeqStateRec; DPInvSeqStateRec: TYPE = RECORD [ in, out: Ports.Port]; DPInvSeqInit: Rosemary.InitProc = { state: DPInvSeqState _ IF oldStateAny=NIL THEN NEW[DPInvSeqStateRec] ELSE NARROW[oldStateAny]; state.in _ p[Ports.PortIndex[cellType.public, "in0"]]; state.out _ p[Ports.PortIndex[cellType.public, "out0"]]; state.out.d _ drive; stateAny _ state; }; DPInvSeqSimple: Rosemary.EvalProc = { state: DPInvSeqState _ NARROW[stateAny]; Ports.NotLS[state.in.ls, state.out.ls]; }; DPTriDrInvName: Rope.ROPE = Rosemary.Register[roseClassName: "DP.DPTriDrInv.schSeq", init: DPTriDrSeqInit, evalSimple: DPTriDrSeqSimple]; DPSCTriInvName: Rope.ROPE = Rosemary.Register[roseClassName: "DP.DPSCTriInv.schSeq", init: DPTriDrSeqInit, evalSimple: DPTriDrSeqSimple]; DPTriDrSeqState: TYPE = REF DPTriDrSeqStateRec; DPTriDrSeqStateRec: TYPE = RECORD [ in, out, en, dis: Ports.Port]; DPTriDrSeqInit: Rosemary.InitProc = { state: DPTriDrSeqState _ IF oldStateAny=NIL THEN NEW[DPTriDrSeqStateRec] ELSE NARROW[oldStateAny]; state.in _ p[Ports.PortIndex[cellType.public, "in"]]; state.out _ p[Ports.PortIndex[cellType.public, "out"]]; state.en _ p[Ports.PortIndex[cellType.public, "en"]]; state.dis _ p[Ports.PortIndex[cellType.public, "dis"]]; state.out.d _ drive; stateAny _ state; }; DPTriDrSeqSimple: Rosemary.EvalProc = { state: DPTriDrSeqState _ NARROW[stateAny]; Ports.NotLS[state.in.ls, state.out.ls]; state.out.d _ IF state.en.l=H AND state.dis.l=L THEN drive ELSE none; }; DPBufName: Rope.ROPE = Rosemary.Register[roseClassName: "DP.DPBuf.schSeq", init: DPBufSeqInit, evalSimple: DPBufSeqSimple]; DPSCBufName: Rope.ROPE = Rosemary.Register[roseClassName: "DP.DPSCBuf.schSeq", init: DPBufSeqInit, evalSimple: DPBufSeqSimple]; DPBufSeqState: TYPE = REF DPBufSeqStateRec; DPBufSeqStateRec: TYPE = RECORD [ in, out: Ports.Port]; DPBufSeqInit: Rosemary.InitProc = { state: DPBufSeqState _ IF oldStateAny=NIL THEN NEW[DPBufSeqStateRec] ELSE NARROW[oldStateAny]; state.in _ p[Ports.PortIndex[cellType.public, "in0"]]; state.out _ p[Ports.PortIndex[cellType.public, "out0"]]; state.out.d _ drive; stateAny _ state; }; DPBufSeqSimple: Rosemary.EvalProc = { state: DPBufSeqState _ NARROW[stateAny]; Ports.CopyLS[state.in.ls, state.out.ls]; }; DPMuxSwitchName: Rope.ROPE = Rosemary.Register[roseClassName: "DP.DPMuxSwitch.schSeq", init: DPMuxSwitchSeqInit, evalSimple: DPMuxSwitchSeqSimple]; DPMuxSwitchSeqState: TYPE = REF DPMuxSwitchSeqStateRec; DPMuxSwitchSeqStateRec: TYPE = RECORD [ in, out, enb: Ports.Port]; DPMuxSwitchSeqInit: Rosemary.InitProc = { state: DPMuxSwitchSeqState _ IF oldStateAny=NIL THEN NEW[DPMuxSwitchSeqStateRec] ELSE NARROW[oldStateAny]; state.in _ p[Ports.PortIndex[cellType.public, "ch1"]]; state.out _ p[Ports.PortIndex[cellType.public, "ch2"]]; state.enb _ p[Ports.PortIndex[cellType.public, "gate"]]; state.out.d _ drive; stateAny _ state; }; DPMuxSwitchSeqSimple: Rosemary.EvalProc = { state: DPMuxSwitchSeqState _ NARROW[stateAny]; Ports.CopyLS[state.in.ls, state.out.ls]; state.out.d _ IF state.enb.l=H THEN drive ELSE none; }; END. PDPRosemary.mesa Copyright Σ 1987 by Xerox Corporation. All rights reserved. Gasbarro June 12, 1987 4:50:09 pm PDT Barth, June 12, 1987 5:49:33 pm PDT Last Edited by: Gasbarro September 24, 1987 12:25:19 pm PDT DPEdgeFF DPTSLatch DPNOr3 DPXOr, DPXOrTop, DPXOrBot DPInv, DPInvDr DPTriDrInv, DPSCTriInv DPBuf, DPSCBuf DPMuxSwitch ΚΝ– "cedar" style˜codešœ™Kšœ<™Kšœ˜—K˜——Kšœ2˜2Kšœ˜K˜——šœ ™ šž œœˆœ˜¦K˜—Kšœœœ˜3šœœœ˜%Kšœ#˜'Kšœ˜Kšœ˜K˜—šžœ˜'Kšœ˜šœ œœ˜Kšœœ4˜=Kšœœ˜"Kšœœ˜0Kšœœ œ˜#—Kšœ5˜5Kšœ4˜4Kšœ5˜5Kšœ5˜5Kšœ7˜7Kšœ˜Kšœ˜Kšœ˜Kšœ˜Kšœ˜K˜—šžœ˜)Kšœœ ˜,Kšœ œœœ3˜[šœœœ˜(Kšœ˜Kšœ3˜3—Kšœ˜Kšœ˜K˜——šž™šž œœj˜K˜—Kšœœœ˜-šœœœ˜"šœ ˜ K˜——šž œ˜$Kš œœ œœœœœ˜`Kšœ7˜7Kšœ7˜7Kšœ7˜7Kšœ8˜8Kšœ˜Kšœ˜Kšœ˜K˜—šžœ˜&Kšœœ ˜)šœœœ˜+šœœœ˜&Kšœœœ˜MKšœœœ˜MKšœ˜ —Kšœ˜—Kšœ˜K˜——šž™Kšž œœg˜{Kšž œœj˜Kšž œœk˜‚K˜Kšœœœ˜+šœœœ˜!šœ˜K˜——šž œ˜#Kš œœ œœœœœ˜^Kšœ7˜7Kšœ7˜7Kšœ8˜8Kšœ˜Kšœ˜Kšœ˜K˜—šžœ˜%Kšœœ ˜(šœœœ˜+šœœœ˜&Kšœœ˜4Kšœ/˜/Kšœ˜ —Kšœ˜—Kšœ˜K˜——šž™Kšž œœg˜{Kšž œœi˜Kšœœœ˜+šœœœ˜!šœ˜K˜——šž œ˜#Kš œœ œœœœœ˜^Kšœ6˜6Kšœ8˜8Kšœ˜Kšœ˜Kšœ˜K˜—šžœ˜%Kšœœ ˜(Kšœ'˜'Kšœ˜——šœ™Kšžœœp˜‰Kšžœœp˜‰K˜Kšœœœ˜/šœœœ˜#šœ˜K˜——šžœ˜%Kš œœ œœœœœ˜bKšœ5˜5Kšœ7˜7Kšœ5˜5Kšœ7˜7Kšœ˜Kšœ˜Kšœ˜K˜—šžœ˜'Kšœœ ˜*Kšœ'˜'Kš œœœœœ˜EKšœ˜K˜——šœ™Kšž œœg˜{Kšž œœi˜K˜Kšœœœ˜+šœœœ˜!šœ˜K˜——šž œ˜#Kš œœ œœœœœ˜^Kšœ6˜6Kšœ8˜8Kšœ˜Kšœ˜Kšœ˜K˜—šžœ˜%Kšœœ ˜(Kšœ(˜(Kšœ˜K˜——šœ ™ Kšžœœy˜“Kšœœœ˜7šœœœ˜'šœ˜K˜——šžœ˜)Kš œœ œœœœœ˜jKšœ6˜6Kšœ7˜7Kšœ8˜8Kšœ˜Kšœ˜Kšœ˜K˜—šžœ˜+Kšœœ ˜.Kšœ(˜(Kšœœœœ˜4Kšœ˜K˜——Kšœ˜K˜—…— "*?