DataPath.mesa
Copyright © 1985 by Xerox Corporation. All rights reserved.
Don Curry November 10, 1987 12:46:43 pm PST
DIRECTORY CD, CDRoutingObjects, Core, CoreClasses, CoreCreate, CoreGeometry, Sisyph, CMosB, RefTab;
DataPath: CEDAR DEFINITIONS = BEGIN
Form: TYPE = REF RowSeqRec;
RowSeqRec:
TYPE =
RECORD[
schIR: CD.Rect, -- schematics ir not including public wire tails
layIR: CD.Rect, -- layout ir
obj: Object,
cell: CellType,
wpo: RefTab.Ref,
spec: DPSpec,
seq: SEQUENCE size: CARDINAL OF ColSeq];
ColSeq: TYPE = REF ColSeqRec;
ColSeqRec:
TYPE =
RECORD[
schIR: CD.Rect, -- schematics row ir not including public wire tails
obj: Object, -- eg. switchbox;
layY: Interval,
ch: RefTab.Ref ← NIL,
seq: SEQUENCE size: CARDINAL OF Section];
Section:
TYPE =
RECORD[
schIR: CD.Rect, -- schematics section ir
schInst: CellInstance, -- schematics cell instance
wpo: RefTab.Ref, -- wire to PObjs (Layout)
devBOff: INT ← 0, -- device bus offset (=0 for muxes)
routeCell: CellType ← NIL,
devCells: CellTypeSeq ← NIL ];
Interval: TYPE = RECORD[loc, size: INT ← 0];
Intervals: TYPE = LIST OF Interval ← NIL;
LayoutCoord:
TYPE =
RECORD [
hor: BOOL,
inBody: BOOL,
sides: Sides,
horSize: NAT ← 0,
horLayBot, horLayTop: CD.Layer,
rowBot, rowTop: NAT ← 0,
yBot, yTop: NAT ← 0,
colLt, colRt: NAT ← 0,
busLt, busRt: NAT ← 0 ];
DPSpec: TYPE = REF DPSpecRec;
DPSpecRec:
TYPE =
RECORD [
n: INT ← 0,
cols: INT ← 0,
chPolyBits: INT ← 0,
buses: INT ← 0,
interleave: BOOL ← FALSE,
schBusW: INT ← 4* CMosB.lambda,
schDWidth: INT ← 8* 4* CMosB.lambda, -- must be multiple of schbusW
layBusW: INT ← 8* CMosB.lambda,
layDWidth: INT ← 64* CMosB.lambda, -- Full width = layDWidth+layBusW*buses
metPitch: INT ← 8* CMosB.lambda,
met2Pitch: INT ← 8* CMosB.lambda,
leftTail: INT ← 4* CMosB.lambda, -- to center of 0th bus
rightTail: INT ← 4* CMosB.lambda, -- metPitch-leftTail
initialYSize: INT ← 3* CMosB.lambda, -- for channel use (=>top
gndBus: INT ← -1,
vddBus: INT ← -1,
pwrW: INT ← 4* CMosB.lambda,
metW: INT ← 3* CMosB.lambda,
met2W: INT ← 4* CMosB.lambda,
polW: INT ← 2* CMosB.lambda,
difW: INT ← 2* CMosB.lambda,
pinSize: INT ← 2* CMosB.lambda ];
CellType: TYPE = Core.CellType;
CellTypeSeq: TYPE = REF CellTypeSeqRec;
CellTypeSeqRec: TYPE = RECORD[SEQUENCE size: CARDINAL OF CellType];
Object: TYPE = CD.Object;
PObj: TYPE = CDRoutingObjects.PlacedObject;
PObjs: TYPE = LIST OF PObj ← NIL;
ROPE: TYPE = Core.ROPE;
Wire: TYPE = Core.Wire;
Wires: TYPE = Core.Wires;
CellInstance: TYPE = CoreClasses.CellInstance;
Side: TYPE = CoreGeometry.Side;
Sides: TYPE = CoreGeometry.Sides;
RegisterDataPathSpec: PROC[key: ROPE, spec: DPSpec];
NewCellTypeSpec: PROC[cellType: CellType] RETURNS[spec: DPSpec];
BitPosX: PROC[spec: DPSpec, col, bit: NAT] RETURNS[pos: INT];
SchHalfBus: PROC[spec: DPSpec, pos: INT] RETURNS[bus: INT];
BitWidth: PROC[spec: DPSpec] RETURNS[bitWidth: INT];
GetMuxCellTypes: PROC[spec: DPSpec, inst: CellInstance] RETURNS[cells: CellTypeSeq];
GetChanY: PROC[ch: RefTab.Ref, wire: Wire]RETURNS[loc: INT, layer: CD.Layer];
AddChanNode: PROC[dp: Form, row: INT, wire: Wire, lc: LayoutCoord];
AddPowerPassBuses: PROC[dp: Form, row: INT];
BuildChan: PROC[dp: Form, row: INT];
END.