Some DA Trends Japan, Oct 1988 Bertrand Serlet Xerox Palo Alto Research Center · Fabrication technologies AsGa, Analog, Imaging, Optics, Superconductors, 3-D ... => DA extended in multiple directions · Better usage of silicon e.g. RISC / CISC Packing transistors limited by DA => Higher-level tools · Focus around 4 axis: Memory / Processor / ASIC / Analog ASICs: away from TTL towards custom; include memories & analog => 4 styles unified · Progress acceleration Latest (technology + architecture) chip is the fastest => Chips by Friday · Better hardware Use of parallel processors · Enhance each tool Capture, Simulation, Layout, Analysis, Fabrication, Test ... => problem: large amount of code · Improve design methodology Implications for several tools e.g. High level synthesis for control circuitry Gate array - like methodologies Programmable logic devices => problem: integrating these methodologies · Capture, simulation, layout improvements Interest: design Analysis, Fabrication, Test and Debug · Feasibility Reduce code size Frameworks & integration · Towards Silicon Compilation ? · Schematics versus text Parameterized schematics · High level capture of designers' intents Architectural tools (mix of different levels) Control structures + synthesis tools · Multi purpose manipulation system Basics: text, schematics and layout editor Extensions: packaging, mechanical design, etc... High-level: FSM, architecture diagrams, ... · Integrated environment Front end for all tools Graphical input / feedback Most of design time is spend in Capture / Simulation · Faster Specialized hardware Improve algorithms Incremental · More informative Timing information for the same speed => hierarchical, mixed mode Better behavioral modeling (languages) Symbolic calculus · Easier debug Source level debugging (e.g. possibility to explore old states) Soft-Hardware · Leaf cell layout Symbolic layout, compaction vs hand crafted polygons Cell generators; expert systems for layout · Assembly Powerful assembly operators (e.g. place and route) Balance automatic <-> full control Research in engine, and in the overall framework · Reduce source 1 source, multiple source only iff orthogonal Avoid redundancy, except for checks Problem: cross-product of functionalities => extremely large code · Better languages Modules Object oriented => avoid cost of cross-product · Better runtime Exceptions Light weight processes Garbage collection Dynamic loading · Better language tools Debuggers Profilers Problem: re-inventing the wheel · Standards packages Unix Programmers' libraries Display Postscript X-Windows · Standard software engineering tools Tools for building user interfaces Powerful editors Input/Output; Data bases Interpreters Debuggers · File formats standards Net List standard (e.g. VHDL, EDIF, ...) Layout standard (e.g. CIF, EDIF, ...) Behavioral standard (e.g. VHDL, VERILOG, ...) · Data structure standards Procedural interface to file formats · Need for more standards Specific (e.g. test vectors) How to relate different descriptions · Tool Framework Registration, parsing, etc ... Backbone for a variety of tools · Net List Framework Structural description Common across most tools Structure used for describing layout, net lists, behavior · Layout Framework Layout generators · Editing Framework ? General editor (manipulation system) · Programmers' advantages Smaller and better code Re-usability; polish re-used code Easier to write (reduced up-to-speed time) (but only if small and good standard) · Users' advantages Uniformity Better user-interface Simple user model · No magic solution No push-button silicon compiler No high-level general solution · Encapsulation of functionalities high-level and low-level Based on a solid environment multiple methodologies: full custom -> fully automatic · Silicon Assembler ²JapanDATalk.tioga Copyright Ó 1988 by Xerox Corporation. All rights reserved. Bertrand Serlet September 7, 1988 4:02:39 pm PDT Some Trends in Design Automation Trends in Circuits How to Improve Tools? Overview Capture Simulation Layout Reducing the Size: Write Better Code Reducing the Size: Displace Code to the Environment DA Standards Emerging Frameworks Advantages of Standards and Frameworks The Ultimate Silicon Compiler Ê‚–"slides" style˜™Icode™˜>N˜—šž˜N˜6N˜——™šž˜N˜—šž˜Nšœ<˜