GenerateStdCellsCmosBLibrary.mesa
Copyright Ó 1987 by Xerox Corporation. All rights reserved.
Bertrand Serlet June 4, 1987 4:33:51 pm PDT
Louis Monier October 26, 1987 2:37:51 pm PST
Last tweaked by Mike Spreitzer on February 17, 1988 11:51:06 am PST
DIRECTORY
CD, CDDirectory, Combinatorial, Core, CoreDirectory, CoreIO, CoreProperties, PW, PWCore, PWCoreLichen, Rope, Sinix, Sisyph, SymTab, TerminalIO;
GenerateStdCellsCmosBLibrary: CEDAR PROGRAM
IMPORTS CD, CDDirectory, Combinatorial, CoreIO, CoreProperties, PW, PWCore, PWCoreLichen, Rope, Sinix, Sisyph, SymTab, TerminalIO
= BEGIN
AddCell: PROC [name: Rope.ROPE, iSCombinatorial: BOOLFALSE] ~ {
cellType, maskCT: Core.CellType;
ob: CD.Object;
lichenTolerance: Rope.ROPE ← "0.8, 0.8";
schName: Rope.ROPE ← Rope.Cat[name, ".sch"];
maskName: Rope.ROPE ← Rope.Cat[name, ".mask"];
cellType ← Sisyph.ES[schName, sourceCX];
ob ← CDDirectory.Fetch[sourceDesign, maskName];
maskCT ← NARROW [Sinix.Extract[ob, PWCore.extractMode].result];
CoreProperties.PutCellTypeProp[on: cellType, prop: $CellArea, value: NEW[INTCD.InterestSize[ob].x*CD.InterestSize[ob].y]];
-- the area in square CD units, for Extract and Measure
IF iSCombinatorial THEN {
CoreProperties.PutCellTypeProp[cellType, $Combinatorial, NEW [BOOLTRUE]];
Combinatorial.BindCombinatorial[cellType];
Combinatorial.CheckTransistorsAgainstExpressions[cellType];
};
CoreProperties.PutCellTypeProp[cellType, $LichenTransistorTolerances, lichenTolerance];
-- that's length and width
[] ← SymTab.Store[schLibrary, schName, cellType];
[] ← SymTab.Store[maskLibrary, maskName, maskCT];
};
Check: SymTab.EachPairAction = {[] ← PWCoreLichen.Compare[NARROW [val], [design: NIL]]};
sourceDesign: CD.Design ← PW.OpenDesign["SCLibCMOSB"];
sourceCX: Sisyph.Context ← Sisyph.Create[sourceDesign];
schLibrary: CoreDirectory.Library ← SymTab.Create[];
maskLibrary: CoreDirectory.Library ← SymTab.Create[];
AddCell["vdd"];
AddCell["gnd"];
AddCell["feedthru"];
AddCell["inv", TRUE];
AddCell["invBuffer", TRUE];
AddCell["tstDriver"];
AddCell["rec2V"];
AddCell["recTTL", TRUE];
AddCell["nand2", TRUE];
AddCell["nand3", TRUE];
AddCell["nand4", TRUE];
AddCell["and2", TRUE];
AddCell["and3", TRUE];
AddCell["and4", TRUE];
AddCell["nor2", TRUE];
AddCell["nor3", TRUE];
AddCell["nor4", TRUE];
AddCell["or2", TRUE];
AddCell["or3", TRUE];
AddCell["or4", TRUE];
AddCell["xor2", TRUE];
AddCell["xnor2", TRUE];
AddCell["a22o2i", TRUE];
AddCell["o22a2i", TRUE];
AddCell["a21o2i", TRUE];
AddCell["o21a2i", TRUE];
AddCell["dLatch"];
AddCell["ff"];
AddCell["ffEn"];
AddCell["pd"];
AddCell["pu"];
AddCell["pdw"];
AddCell["puw"];
CoreIO.SaveLibrary[schLibrary, "SCLibCMOSBSch"];
TerminalIO.PutF["SCLibCMOSBSch library generated.\n"];
CoreIO.SaveLibrary[maskLibrary, "SCLibCMOSBMask"];
TerminalIO.PutF["SCLibCMOSBMask library generated.\n"];
END.